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DAG: Handle fminnum_ieee/fmaxnum_ieee in basic legalization
Handle these in promote float and vector widening. Currently we happen to avoid emitting these unless legal or custom. Avoids regression in a future commit which wants to unconditionally emit these.
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2 files changed

+8
-2
lines changed

2 files changed

+8
-2
lines changed

llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -2488,6 +2488,8 @@ void DAGTypeLegalizer::PromoteFloatResult(SDNode *N, unsigned ResNo) {
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case ISD::FMINIMUM:
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case ISD::FMAXNUM:
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case ISD::FMINNUM:
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case ISD::FMAXNUM_IEEE:
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case ISD::FMINNUM_IEEE:
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case ISD::FMUL:
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case ISD::FPOW:
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case ISD::FREM:

llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp

Lines changed: 6 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -4237,8 +4237,12 @@ void DAGTypeLegalizer::WidenVectorResult(SDNode *N, unsigned ResNo) {
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case ISD::SHL: case ISD::VP_SHL:
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case ISD::SRA: case ISD::VP_SRA:
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case ISD::SRL: case ISD::VP_SRL:
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case ISD::FMINNUM: case ISD::VP_FMINNUM:
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case ISD::FMAXNUM: case ISD::VP_FMAXNUM:
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case ISD::FMINNUM:
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case ISD::FMINNUM_IEEE:
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case ISD::VP_FMINNUM:
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case ISD::FMAXNUM:
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case ISD::FMAXNUM_IEEE:
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case ISD::VP_FMAXNUM:
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case ISD::FMINIMUM:
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case ISD::VP_FMINIMUM:
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case ISD::FMAXIMUM:

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