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[GlobalISel] Add sext(constant) -> constant artifact combine.
This is the G_SEXT counterpart to the existing G_ZEXT/G_ANYEXT combines. Differential Revision: https://reviews.llvm.org/D95729
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5 files changed

+150
-150
lines changed

5 files changed

+150
-150
lines changed

‎llvm/include/llvm/CodeGen/GlobalISel/LegalizationArtifactCombiner.h

Lines changed: 14 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -81,7 +81,6 @@ class LegalizationArtifactCombiner {
8181
}
8282

8383
// Try to fold aext(g_constant) when the larger constant type is legal.
84-
// Can't use MIPattern because we don't have a specific constant in mind.
8584
auto *SrcMI = MRI.getVRegDef(SrcReg);
8685
if (SrcMI->getOpcode() == TargetOpcode::G_CONSTANT) {
8786
const LLT DstTy = MRI.getType(DstReg);
@@ -142,7 +141,6 @@ class LegalizationArtifactCombiner {
142141
}
143142

144143
// Try to fold zext(g_constant) when the larger constant type is legal.
145-
// Can't use MIPattern because we don't have a specific constant in mind.
146144
auto *SrcMI = MRI.getVRegDef(SrcReg);
147145
if (SrcMI->getOpcode() == TargetOpcode::G_CONSTANT) {
148146
const LLT DstTy = MRI.getType(DstReg);
@@ -197,6 +195,20 @@ class LegalizationArtifactCombiner {
197195
return true;
198196
}
199197

198+
// Try to fold sext(g_constant) when the larger constant type is legal.
199+
auto *SrcMI = MRI.getVRegDef(SrcReg);
200+
if (SrcMI->getOpcode() == TargetOpcode::G_CONSTANT) {
201+
const LLT DstTy = MRI.getType(DstReg);
202+
if (isInstLegal({TargetOpcode::G_CONSTANT, {DstTy}})) {
203+
auto &CstVal = SrcMI->getOperand(1);
204+
Builder.buildConstant(
205+
DstReg, CstVal.getCImm()->getValue().sext(DstTy.getSizeInBits()));
206+
UpdatedDefs.push_back(DstReg);
207+
markInstAndDefDead(MI, *SrcMI, DeadInsts);
208+
return true;
209+
}
210+
}
211+
200212
return tryFoldImplicitDef(MI, DeadInsts, UpdatedDefs);
201213
}
202214

@@ -211,7 +223,6 @@ class LegalizationArtifactCombiner {
211223
Register SrcReg = lookThroughCopyInstrs(MI.getOperand(1).getReg());
212224

213225
// Try to fold trunc(g_constant) when the smaller constant type is legal.
214-
// Can't use MIPattern because we don't have a specific constant in mind.
215226
auto *SrcMI = MRI.getVRegDef(SrcReg);
216227
if (SrcMI->getOpcode() == TargetOpcode::G_CONSTANT) {
217228
const LLT DstTy = MRI.getType(DstReg);

‎llvm/test/CodeGen/AArch64/GlobalISel/legalize-extract-vector-elt.mir

Lines changed: 2 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -8,9 +8,8 @@ body: |
88
liveins: $q0
99
; CHECK-LABEL: name: test_eve_1
1010
; CHECK: [[COPY:%[0-9]+]]:_(<2 x s64>) = COPY $q0
11-
; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
12-
; CHECK: [[SEXT:%[0-9]+]]:_(s64) = G_SEXT [[C]](s32)
13-
; CHECK: [[EVEC:%[0-9]+]]:_(s64) = G_EXTRACT_VECTOR_ELT [[COPY]](<2 x s64>), [[SEXT]](s64)
11+
; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
12+
; CHECK: [[EVEC:%[0-9]+]]:_(s64) = G_EXTRACT_VECTOR_ELT [[COPY]](<2 x s64>), [[C]](s64)
1413
; CHECK: $x0 = COPY [[EVEC]](s64)
1514
; CHECK: RET_ReallyLR
1615
%0:_(<2 x s64>) = COPY $q0

‎llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-saddo.mir

Lines changed: 62 additions & 66 deletions
Original file line numberDiff line numberDiff line change
@@ -54,16 +54,15 @@ body: |
5454
; CHECK: [[COPY2:%[0-9]+]]:_(s32) = COPY [[COPY]](s32)
5555
; CHECK: [[COPY3:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32)
5656
; CHECK: [[ADD:%[0-9]+]]:_(s32) = G_ADD [[COPY2]], [[COPY3]]
57-
; CHECK: [[C:%[0-9]+]]:_(s16) = G_CONSTANT i16 0
5857
; CHECK: [[COPY4:%[0-9]+]]:_(s32) = COPY [[ADD]](s32)
5958
; CHECK: [[SEXT_INREG:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY4]], 16
6059
; CHECK: [[COPY5:%[0-9]+]]:_(s32) = COPY [[COPY]](s32)
6160
; CHECK: [[SEXT_INREG1:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY5]], 16
6261
; CHECK: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(slt), [[SEXT_INREG]](s32), [[SEXT_INREG1]]
6362
; CHECK: [[COPY6:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32)
6463
; CHECK: [[SEXT_INREG2:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY6]], 16
65-
; CHECK: [[SEXT:%[0-9]+]]:_(s32) = G_SEXT [[C]](s16)
66-
; CHECK: [[ICMP1:%[0-9]+]]:_(s1) = G_ICMP intpred(slt), [[SEXT_INREG2]](s32), [[SEXT]]
64+
; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
65+
; CHECK: [[ICMP1:%[0-9]+]]:_(s1) = G_ICMP intpred(slt), [[SEXT_INREG2]](s32), [[C]]
6766
; CHECK: [[XOR:%[0-9]+]]:_(s1) = G_XOR [[ICMP1]], [[ICMP]]
6867
; CHECK: [[COPY7:%[0-9]+]]:_(s32) = COPY [[ADD]](s32)
6968
; CHECK: [[ZEXT:%[0-9]+]]:_(s32) = G_ZEXT [[XOR]](s1)
@@ -162,7 +161,6 @@ body: |
162161
; CHECK: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C]](s32)
163162
; CHECK: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]]
164163
; CHECK: [[BITCAST2:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR]](s32)
165-
; CHECK: [[C2:%[0-9]+]]:_(s16) = G_CONSTANT i16 0
166164
; CHECK: [[BITCAST3:%[0-9]+]]:_(s32) = G_BITCAST [[COPY]](<2 x s16>)
167165
; CHECK: [[LSHR2:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST3]], [[C]](s32)
168166
; CHECK: [[COPY8:%[0-9]+]]:_(s32) = COPY [[ADD]](s32)
@@ -179,21 +177,21 @@ body: |
179177
; CHECK: [[LSHR3:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST4]], [[C]](s32)
180178
; CHECK: [[COPY12:%[0-9]+]]:_(s32) = COPY [[BITCAST4]](s32)
181179
; CHECK: [[SEXT_INREG4:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY12]], 16
182-
; CHECK: [[SEXT:%[0-9]+]]:_(s32) = G_SEXT [[C2]](s16)
183-
; CHECK: [[ICMP2:%[0-9]+]]:_(s1) = G_ICMP intpred(slt), [[SEXT_INREG4]](s32), [[SEXT]]
184-
; CHECK: [[COPY13:%[0-9]+]]:_(s32) = COPY [[LSHR3]](s32)
185-
; CHECK: [[SEXT_INREG5:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY13]], 16
186-
; CHECK: [[SEXT1:%[0-9]+]]:_(s32) = G_SEXT [[C2]](s16)
187-
; CHECK: [[ICMP3:%[0-9]+]]:_(s1) = G_ICMP intpred(slt), [[SEXT_INREG5]](s32), [[SEXT1]]
180+
; CHECK: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
181+
; CHECK: [[COPY13:%[0-9]+]]:_(s32) = COPY [[C2]](s32)
182+
; CHECK: [[ICMP2:%[0-9]+]]:_(s1) = G_ICMP intpred(slt), [[SEXT_INREG4]](s32), [[COPY13]]
183+
; CHECK: [[COPY14:%[0-9]+]]:_(s32) = COPY [[LSHR3]](s32)
184+
; CHECK: [[SEXT_INREG5:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY14]], 16
185+
; CHECK: [[ICMP3:%[0-9]+]]:_(s1) = G_ICMP intpred(slt), [[SEXT_INREG5]](s32), [[C2]]
188186
; CHECK: [[XOR:%[0-9]+]]:_(s1) = G_XOR [[ICMP2]], [[ICMP]]
189187
; CHECK: [[XOR1:%[0-9]+]]:_(s1) = G_XOR [[ICMP3]], [[ICMP1]]
190188
; CHECK: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[XOR]](s1)
191189
; CHECK: [[ANYEXT1:%[0-9]+]]:_(s32) = G_ANYEXT [[XOR1]](s1)
192190
; CHECK: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
193-
; CHECK: [[COPY14:%[0-9]+]]:_(s32) = COPY [[ANYEXT]](s32)
194-
; CHECK: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY14]], [[C3]]
195-
; CHECK: [[COPY15:%[0-9]+]]:_(s32) = COPY [[ANYEXT1]](s32)
196-
; CHECK: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY15]], [[C3]]
191+
; CHECK: [[COPY15:%[0-9]+]]:_(s32) = COPY [[ANYEXT]](s32)
192+
; CHECK: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY15]], [[C3]]
193+
; CHECK: [[COPY16:%[0-9]+]]:_(s32) = COPY [[ANYEXT1]](s32)
194+
; CHECK: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY16]], [[C3]]
197195
; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[AND2]](s32), [[AND3]](s32)
198196
; CHECK: $vgpr0 = COPY [[BITCAST2]](<2 x s16>)
199197
; CHECK: $vgpr1_vgpr2 = COPY [[BUILD_VECTOR]](<2 x s32>)
@@ -235,7 +233,6 @@ body: |
235233
; CHECK: [[ADD2:%[0-9]+]]:_(s32) = G_ADD [[COPY6]], [[COPY7]]
236234
; CHECK: [[DEF:%[0-9]+]]:_(s16) = G_IMPLICIT_DEF
237235
; CHECK: [[DEF1:%[0-9]+]]:_(<2 x s16>) = G_IMPLICIT_DEF
238-
; CHECK: [[C1:%[0-9]+]]:_(s16) = G_CONSTANT i16 0
239236
; CHECK: [[UV6:%[0-9]+]]:_(<2 x s16>), [[UV7:%[0-9]+]]:_(<2 x s16>), [[UV8:%[0-9]+]]:_(<2 x s16>) = G_UNMERGE_VALUES [[COPY]](<6 x s16>)
240237
; CHECK: [[BITCAST4:%[0-9]+]]:_(s32) = G_BITCAST [[UV6]](<2 x s16>)
241238
; CHECK: [[LSHR4:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST4]], [[C]](s32)
@@ -263,16 +260,16 @@ body: |
263260
; CHECK: [[LSHR7:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST7]], [[C]](s32)
264261
; CHECK: [[COPY14:%[0-9]+]]:_(s32) = COPY [[BITCAST6]](s32)
265262
; CHECK: [[SEXT_INREG6:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY14]], 16
266-
; CHECK: [[SEXT:%[0-9]+]]:_(s32) = G_SEXT [[C1]](s16)
267-
; CHECK: [[ICMP3:%[0-9]+]]:_(s1) = G_ICMP intpred(slt), [[SEXT_INREG6]](s32), [[SEXT]]
268-
; CHECK: [[COPY15:%[0-9]+]]:_(s32) = COPY [[LSHR6]](s32)
269-
; CHECK: [[SEXT_INREG7:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY15]], 16
270-
; CHECK: [[SEXT1:%[0-9]+]]:_(s32) = G_SEXT [[C1]](s16)
271-
; CHECK: [[ICMP4:%[0-9]+]]:_(s1) = G_ICMP intpred(slt), [[SEXT_INREG7]](s32), [[SEXT1]]
272-
; CHECK: [[COPY16:%[0-9]+]]:_(s32) = COPY [[BITCAST7]](s32)
273-
; CHECK: [[SEXT_INREG8:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY16]], 16
274-
; CHECK: [[SEXT2:%[0-9]+]]:_(s32) = G_SEXT [[C1]](s16)
275-
; CHECK: [[ICMP5:%[0-9]+]]:_(s1) = G_ICMP intpred(slt), [[SEXT_INREG8]](s32), [[SEXT2]]
263+
; CHECK: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
264+
; CHECK: [[COPY15:%[0-9]+]]:_(s32) = COPY [[C1]](s32)
265+
; CHECK: [[ICMP3:%[0-9]+]]:_(s1) = G_ICMP intpred(slt), [[SEXT_INREG6]](s32), [[COPY15]]
266+
; CHECK: [[COPY16:%[0-9]+]]:_(s32) = COPY [[LSHR6]](s32)
267+
; CHECK: [[SEXT_INREG7:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY16]], 16
268+
; CHECK: [[COPY17:%[0-9]+]]:_(s32) = COPY [[C1]](s32)
269+
; CHECK: [[ICMP4:%[0-9]+]]:_(s1) = G_ICMP intpred(slt), [[SEXT_INREG7]](s32), [[COPY17]]
270+
; CHECK: [[COPY18:%[0-9]+]]:_(s32) = COPY [[BITCAST7]](s32)
271+
; CHECK: [[SEXT_INREG8:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY18]], 16
272+
; CHECK: [[ICMP5:%[0-9]+]]:_(s1) = G_ICMP intpred(slt), [[SEXT_INREG8]](s32), [[C1]]
276273
; CHECK: [[XOR:%[0-9]+]]:_(s1) = G_XOR [[ICMP3]], [[ICMP]]
277274
; CHECK: [[XOR1:%[0-9]+]]:_(s1) = G_XOR [[ICMP4]], [[ICMP1]]
278275
; CHECK: [[XOR2:%[0-9]+]]:_(s1) = G_XOR [[ICMP5]], [[ICMP2]]
@@ -287,35 +284,35 @@ body: |
287284
; CHECK: [[BITCAST9:%[0-9]+]]:_(s32) = G_BITCAST [[UV13]](<2 x s16>)
288285
; CHECK: [[LSHR9:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST9]], [[C]](s32)
289286
; CHECK: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535
290-
; CHECK: [[COPY17:%[0-9]+]]:_(s32) = COPY [[ADD]](s32)
291-
; CHECK: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY17]], [[C2]]
292-
; CHECK: [[COPY18:%[0-9]+]]:_(s32) = COPY [[ADD1]](s32)
293-
; CHECK: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY18]], [[C2]]
287+
; CHECK: [[COPY19:%[0-9]+]]:_(s32) = COPY [[ADD]](s32)
288+
; CHECK: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY19]], [[C2]]
289+
; CHECK: [[COPY20:%[0-9]+]]:_(s32) = COPY [[ADD1]](s32)
290+
; CHECK: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY20]], [[C2]]
294291
; CHECK: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C]](s32)
295292
; CHECK: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]]
296293
; CHECK: [[BITCAST10:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR]](s32)
297-
; CHECK: [[COPY19:%[0-9]+]]:_(s32) = COPY [[ADD2]](s32)
298-
; CHECK: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY19]], [[C2]]
299-
; CHECK: [[COPY20:%[0-9]+]]:_(s32) = COPY [[BITCAST8]](s32)
300-
; CHECK: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY20]], [[C2]]
294+
; CHECK: [[COPY21:%[0-9]+]]:_(s32) = COPY [[ADD2]](s32)
295+
; CHECK: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY21]], [[C2]]
296+
; CHECK: [[COPY22:%[0-9]+]]:_(s32) = COPY [[BITCAST8]](s32)
297+
; CHECK: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY22]], [[C2]]
301298
; CHECK: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C]](s32)
302299
; CHECK: [[OR1:%[0-9]+]]:_(s32) = G_OR [[AND2]], [[SHL1]]
303300
; CHECK: [[BITCAST11:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR1]](s32)
304-
; CHECK: [[COPY21:%[0-9]+]]:_(s32) = COPY [[LSHR8]](s32)
305-
; CHECK: [[AND4:%[0-9]+]]:_(s32) = G_AND [[COPY21]], [[C2]]
306-
; CHECK: [[COPY22:%[0-9]+]]:_(s32) = COPY [[BITCAST9]](s32)
307-
; CHECK: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY22]], [[C2]]
301+
; CHECK: [[COPY23:%[0-9]+]]:_(s32) = COPY [[LSHR8]](s32)
302+
; CHECK: [[AND4:%[0-9]+]]:_(s32) = G_AND [[COPY23]], [[C2]]
303+
; CHECK: [[COPY24:%[0-9]+]]:_(s32) = COPY [[BITCAST9]](s32)
304+
; CHECK: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY24]], [[C2]]
308305
; CHECK: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[C]](s32)
309306
; CHECK: [[OR2:%[0-9]+]]:_(s32) = G_OR [[AND4]], [[SHL2]]
310307
; CHECK: [[BITCAST12:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR2]](s32)
311308
; CHECK: [[CONCAT_VECTORS:%[0-9]+]]:_(<6 x s16>) = G_CONCAT_VECTORS [[BITCAST10]](<2 x s16>), [[BITCAST11]](<2 x s16>), [[BITCAST12]](<2 x s16>)
312309
; CHECK: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
313-
; CHECK: [[COPY23:%[0-9]+]]:_(s32) = COPY [[ANYEXT]](s32)
314-
; CHECK: [[AND6:%[0-9]+]]:_(s32) = G_AND [[COPY23]], [[C3]]
315-
; CHECK: [[COPY24:%[0-9]+]]:_(s32) = COPY [[ANYEXT1]](s32)
316-
; CHECK: [[AND7:%[0-9]+]]:_(s32) = G_AND [[COPY24]], [[C3]]
317-
; CHECK: [[COPY25:%[0-9]+]]:_(s32) = COPY [[ANYEXT2]](s32)
318-
; CHECK: [[AND8:%[0-9]+]]:_(s32) = G_AND [[COPY25]], [[C3]]
310+
; CHECK: [[COPY25:%[0-9]+]]:_(s32) = COPY [[ANYEXT]](s32)
311+
; CHECK: [[AND6:%[0-9]+]]:_(s32) = G_AND [[COPY25]], [[C3]]
312+
; CHECK: [[COPY26:%[0-9]+]]:_(s32) = COPY [[ANYEXT1]](s32)
313+
; CHECK: [[AND7:%[0-9]+]]:_(s32) = G_AND [[COPY26]], [[C3]]
314+
; CHECK: [[COPY27:%[0-9]+]]:_(s32) = COPY [[ANYEXT2]](s32)
315+
; CHECK: [[AND8:%[0-9]+]]:_(s32) = G_AND [[COPY27]], [[C3]]
319316
; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[AND6]](s32), [[AND7]](s32), [[AND8]](s32)
320317
; CHECK: $vgpr0_vgpr1_vgpr2 = COPY [[CONCAT_VECTORS]](<6 x s16>)
321318
; CHECK: $vgpr0_vgpr1_vgpr2 = COPY [[BUILD_VECTOR]](<3 x s32>)
@@ -379,7 +376,6 @@ body: |
379376
; CHECK: [[OR1:%[0-9]+]]:_(s32) = G_OR [[AND2]], [[SHL1]]
380377
; CHECK: [[BITCAST5:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR1]](s32)
381378
; CHECK: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s16>) = G_CONCAT_VECTORS [[BITCAST4]](<2 x s16>), [[BITCAST5]](<2 x s16>)
382-
; CHECK: [[C2:%[0-9]+]]:_(s16) = G_CONSTANT i16 0
383379
; CHECK: [[UV4:%[0-9]+]]:_(<2 x s16>), [[UV5:%[0-9]+]]:_(<2 x s16>) = G_UNMERGE_VALUES [[COPY]](<4 x s16>)
384380
; CHECK: [[BITCAST6:%[0-9]+]]:_(s32) = G_BITCAST [[UV4]](<2 x s16>)
385381
; CHECK: [[LSHR4:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST6]], [[C]](s32)
@@ -412,20 +408,20 @@ body: |
412408
; CHECK: [[LSHR7:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST9]], [[C]](s32)
413409
; CHECK: [[COPY22:%[0-9]+]]:_(s32) = COPY [[BITCAST8]](s32)
414410
; CHECK: [[SEXT_INREG8:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY22]], 16
415-
; CHECK: [[SEXT:%[0-9]+]]:_(s32) = G_SEXT [[C2]](s16)
416-
; CHECK: [[ICMP4:%[0-9]+]]:_(s1) = G_ICMP intpred(slt), [[SEXT_INREG8]](s32), [[SEXT]]
417-
; CHECK: [[COPY23:%[0-9]+]]:_(s32) = COPY [[LSHR6]](s32)
418-
; CHECK: [[SEXT_INREG9:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY23]], 16
419-
; CHECK: [[SEXT1:%[0-9]+]]:_(s32) = G_SEXT [[C2]](s16)
420-
; CHECK: [[ICMP5:%[0-9]+]]:_(s1) = G_ICMP intpred(slt), [[SEXT_INREG9]](s32), [[SEXT1]]
421-
; CHECK: [[COPY24:%[0-9]+]]:_(s32) = COPY [[BITCAST9]](s32)
422-
; CHECK: [[SEXT_INREG10:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY24]], 16
423-
; CHECK: [[SEXT2:%[0-9]+]]:_(s32) = G_SEXT [[C2]](s16)
424-
; CHECK: [[ICMP6:%[0-9]+]]:_(s1) = G_ICMP intpred(slt), [[SEXT_INREG10]](s32), [[SEXT2]]
425-
; CHECK: [[COPY25:%[0-9]+]]:_(s32) = COPY [[LSHR7]](s32)
426-
; CHECK: [[SEXT_INREG11:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY25]], 16
427-
; CHECK: [[SEXT3:%[0-9]+]]:_(s32) = G_SEXT [[C2]](s16)
428-
; CHECK: [[ICMP7:%[0-9]+]]:_(s1) = G_ICMP intpred(slt), [[SEXT_INREG11]](s32), [[SEXT3]]
411+
; CHECK: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
412+
; CHECK: [[COPY23:%[0-9]+]]:_(s32) = COPY [[C2]](s32)
413+
; CHECK: [[ICMP4:%[0-9]+]]:_(s1) = G_ICMP intpred(slt), [[SEXT_INREG8]](s32), [[COPY23]]
414+
; CHECK: [[COPY24:%[0-9]+]]:_(s32) = COPY [[LSHR6]](s32)
415+
; CHECK: [[SEXT_INREG9:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY24]], 16
416+
; CHECK: [[COPY25:%[0-9]+]]:_(s32) = COPY [[C2]](s32)
417+
; CHECK: [[ICMP5:%[0-9]+]]:_(s1) = G_ICMP intpred(slt), [[SEXT_INREG9]](s32), [[COPY25]]
418+
; CHECK: [[COPY26:%[0-9]+]]:_(s32) = COPY [[BITCAST9]](s32)
419+
; CHECK: [[SEXT_INREG10:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY26]], 16
420+
; CHECK: [[COPY27:%[0-9]+]]:_(s32) = COPY [[C2]](s32)
421+
; CHECK: [[ICMP6:%[0-9]+]]:_(s1) = G_ICMP intpred(slt), [[SEXT_INREG10]](s32), [[COPY27]]
422+
; CHECK: [[COPY28:%[0-9]+]]:_(s32) = COPY [[LSHR7]](s32)
423+
; CHECK: [[SEXT_INREG11:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY28]], 16
424+
; CHECK: [[ICMP7:%[0-9]+]]:_(s1) = G_ICMP intpred(slt), [[SEXT_INREG11]](s32), [[C2]]
429425
; CHECK: [[XOR:%[0-9]+]]:_(s1) = G_XOR [[ICMP4]], [[ICMP]]
430426
; CHECK: [[XOR1:%[0-9]+]]:_(s1) = G_XOR [[ICMP5]], [[ICMP1]]
431427
; CHECK: [[XOR2:%[0-9]+]]:_(s1) = G_XOR [[ICMP6]], [[ICMP2]]
@@ -435,14 +431,14 @@ body: |
435431
; CHECK: [[ANYEXT2:%[0-9]+]]:_(s32) = G_ANYEXT [[XOR2]](s1)
436432
; CHECK: [[ANYEXT3:%[0-9]+]]:_(s32) = G_ANYEXT [[XOR3]](s1)
437433
; CHECK: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
438-
; CHECK: [[COPY26:%[0-9]+]]:_(s32) = COPY [[ANYEXT]](s32)
439-
; CHECK: [[AND4:%[0-9]+]]:_(s32) = G_AND [[COPY26]], [[C3]]
440-
; CHECK: [[COPY27:%[0-9]+]]:_(s32) = COPY [[ANYEXT1]](s32)
441-
; CHECK: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY27]], [[C3]]
442-
; CHECK: [[COPY28:%[0-9]+]]:_(s32) = COPY [[ANYEXT2]](s32)
443-
; CHECK: [[AND6:%[0-9]+]]:_(s32) = G_AND [[COPY28]], [[C3]]
444-
; CHECK: [[COPY29:%[0-9]+]]:_(s32) = COPY [[ANYEXT3]](s32)
445-
; CHECK: [[AND7:%[0-9]+]]:_(s32) = G_AND [[COPY29]], [[C3]]
434+
; CHECK: [[COPY29:%[0-9]+]]:_(s32) = COPY [[ANYEXT]](s32)
435+
; CHECK: [[AND4:%[0-9]+]]:_(s32) = G_AND [[COPY29]], [[C3]]
436+
; CHECK: [[COPY30:%[0-9]+]]:_(s32) = COPY [[ANYEXT1]](s32)
437+
; CHECK: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY30]], [[C3]]
438+
; CHECK: [[COPY31:%[0-9]+]]:_(s32) = COPY [[ANYEXT2]](s32)
439+
; CHECK: [[AND6:%[0-9]+]]:_(s32) = G_AND [[COPY31]], [[C3]]
440+
; CHECK: [[COPY32:%[0-9]+]]:_(s32) = COPY [[ANYEXT3]](s32)
441+
; CHECK: [[AND7:%[0-9]+]]:_(s32) = G_AND [[COPY32]], [[C3]]
446442
; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[AND4]](s32), [[AND5]](s32), [[AND6]](s32), [[AND7]](s32)
447443
; CHECK: $vgpr0_vgpr1 = COPY [[CONCAT_VECTORS]](<4 x s16>)
448444
; CHECK: $vgpr2_vgpr3_vgpr4_vgpr5 = COPY [[BUILD_VECTOR]](<4 x s32>)

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