PR7774: Fix undefined shifts in Alpha backend. As a bonus, this actually

improves the generated code in some cases.

llvm-svn: 109985

Author: eefriedman

llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp

@@ -113,8 +113,8 @@ namespace {
     static uint64_t getNearPower2(uint64_t x) {
       if (!x) return 0;
       unsigned at = CountLeadingZeros_64(x);
-      uint64_t complow = 1 << (63 - at);
-      uint64_t comphigh = 1 << (64 - at);
+      uint64_t complow = 1ULL << (63 - at);
+      uint64_t comphigh = 1ULL << (64 - at);
       //cerr << x << ":" << complow << ":" << comphigh << "\n";
       if (abs64(complow - x) <= abs64(comphigh - x))
         return complow;

llvm/test/CodeGen/Alpha/2010-08-01-mulreduce64.ll

@@ -0,0 +1,11 @@
+; RUN: llc < %s -march=alpha | FileCheck %s
+
+define fastcc i64 @getcount(i64 %s) {
+	%tmp431 = mul i64 %s, 12884901888
+	ret i64 %tmp431
+}
+
+; CHECK: sll $16,33,$0
+; CHECK-NEXT: sll $16,32,$1
+; CHECK-NEXT: addq $0,$1,$0
+