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[ValueTracking] Teach computeKnownBits about riscv.vsetvli.opt and riscv.vsetvlimax.opt intrinsics.
These are like the intrinsic without opt, but don't have side effects. Add missing test cases for riscv.vsetvlimax.
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‎llvm/lib/Analysis/ValueTracking.cpp

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@@ -1735,7 +1735,9 @@ static void computeKnownBitsFromOperator(const Operator *I,
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Known.Zero.setBitsFrom(32);
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break;
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case Intrinsic::riscv_vsetvli:
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case Intrinsic::riscv_vsetvli_opt:
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case Intrinsic::riscv_vsetvlimax:
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case Intrinsic::riscv_vsetvlimax_opt:
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// Assume that VL output is positive and would fit in an int32_t.
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// TODO: VLEN might be capped at 16 bits in a future V spec update.
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if (BitWidth >= 32)

‎llvm/test/Transforms/InstCombine/RISCV/riscv-vsetvli-knownbits.ll

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@@ -3,6 +3,12 @@
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declare i32 @llvm.riscv.vsetvli.i32(i32, i32, i32)
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declare i64 @llvm.riscv.vsetvli.i64(i64, i64, i64)
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declare i32 @llvm.riscv.vsetvlimax.i32(i32, i32)
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declare i64 @llvm.riscv.vsetvlimax.i64(i64, i64)
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declare i32 @llvm.riscv.vsetvli.opt.i32(i32, i32, i32)
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declare i64 @llvm.riscv.vsetvli.opt.i64(i64, i64, i64)
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declare i32 @llvm.riscv.vsetvlimax.opt.i32(i32, i32)
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declare i64 @llvm.riscv.vsetvlimax.opt.i64(i64, i64)
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define i32 @vsetvli_i32() nounwind {
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; CHECK-LABEL: @vsetvli_i32(
@@ -41,3 +47,117 @@ entry:
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%2 = zext i32 %1 to i64
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ret i64 %2
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}
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define i32 @vsetvlimax_i32() nounwind {
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; CHECK-LABEL: @vsetvlimax_i32(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.riscv.vsetvlimax.i32(i32 1, i32 1)
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; CHECK-NEXT: ret i32 [[TMP0]]
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;
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entry:
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%0 = call i32 @llvm.riscv.vsetvlimax.i32(i32 1, i32 1)
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%1 = and i32 %0, 2147483647
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ret i32 %1
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}
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define i64 @vsetvlimax_sext_i64() nounwind {
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; CHECK-LABEL: @vsetvlimax_sext_i64(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 1, i64 1)
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; CHECK-NEXT: ret i64 [[TMP0]]
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;
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entry:
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%0 = call i64 @llvm.riscv.vsetvlimax.i64(i64 1, i64 1)
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%1 = trunc i64 %0 to i32
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%2 = sext i32 %1 to i64
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ret i64 %2
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}
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define i64 @vsetvlimax_zext_i64() nounwind {
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; CHECK-LABEL: @vsetvlimax_zext_i64(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 1, i64 1)
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; CHECK-NEXT: ret i64 [[TMP0]]
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;
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entry:
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%0 = call i64 @llvm.riscv.vsetvlimax.i64(i64 1, i64 1)
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%1 = trunc i64 %0 to i32
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%2 = zext i32 %1 to i64
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ret i64 %2
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}
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define i32 @vsetvli_opt_i32() nounwind {
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; CHECK-LABEL: @vsetvli_opt_i32(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.riscv.vsetvli.opt.i32(i32 1, i32 1, i32 1)
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; CHECK-NEXT: ret i32 [[TMP0]]
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;
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entry:
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%0 = call i32 @llvm.riscv.vsetvli.opt.i32(i32 1, i32 1, i32 1)
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%1 = and i32 %0, 2147483647
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ret i32 %1
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}
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define i64 @vsetvli_opt_sext_i64() nounwind {
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; CHECK-LABEL: @vsetvli_opt_sext_i64(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.vsetvli.opt.i64(i64 1, i64 1, i64 1)
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; CHECK-NEXT: ret i64 [[TMP0]]
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;
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entry:
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%0 = call i64 @llvm.riscv.vsetvli.opt.i64(i64 1, i64 1, i64 1)
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%1 = trunc i64 %0 to i32
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%2 = sext i32 %1 to i64
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ret i64 %2
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}
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define i64 @vsetvli_opt_zext_i64() nounwind {
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; CHECK-LABEL: @vsetvli_opt_zext_i64(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.vsetvli.opt.i64(i64 1, i64 1, i64 1)
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; CHECK-NEXT: ret i64 [[TMP0]]
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;
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entry:
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%0 = call i64 @llvm.riscv.vsetvli.opt.i64(i64 1, i64 1, i64 1)
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%1 = trunc i64 %0 to i32
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%2 = zext i32 %1 to i64
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ret i64 %2
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}
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define i32 @vsetvlimax_opt_i32() nounwind {
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; CHECK-LABEL: @vsetvlimax_opt_i32(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.riscv.vsetvlimax.opt.i32(i32 1, i32 1)
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; CHECK-NEXT: ret i32 [[TMP0]]
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;
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entry:
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%0 = call i32 @llvm.riscv.vsetvlimax.opt.i32(i32 1, i32 1)
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%1 = and i32 %0, 2147483647
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ret i32 %1
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}
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define i64 @vsetvlimax_opt_sext_i64() nounwind {
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; CHECK-LABEL: @vsetvlimax_opt_sext_i64(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.vsetvlimax.opt.i64(i64 1, i64 1)
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; CHECK-NEXT: ret i64 [[TMP0]]
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;
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entry:
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%0 = call i64 @llvm.riscv.vsetvlimax.opt.i64(i64 1, i64 1)
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%1 = trunc i64 %0 to i32
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%2 = sext i32 %1 to i64
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ret i64 %2
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}
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define i64 @vsetvlimax_opt_zext_i64() nounwind {
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; CHECK-LABEL: @vsetvlimax_opt_zext_i64(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.vsetvlimax.opt.i64(i64 1, i64 1)
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; CHECK-NEXT: ret i64 [[TMP0]]
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;
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entry:
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%0 = call i64 @llvm.riscv.vsetvlimax.opt.i64(i64 1, i64 1)
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%1 = trunc i64 %0 to i32
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%2 = zext i32 %1 to i64
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ret i64 %2
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}

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