@@ -2388,27 +2388,21 @@ def INT_PTX_LDG_G_v4f32_ELE : VLDG_G_ELE_V4<"f32", Float32Regs>;
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multiclass NG_TO_G<string Str, bit Supports32 = 1, list<Predicate> Preds = []> {
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- foreach bitwidth = !if(Supports32, ["32", "64"], ["64"]) in {
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- if !eq(bitwidth, "32") then {
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- def "" : NVPTXInst<(outs Int32Regs:$result), (ins Int32Regs:$src),
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- "cvta." # Str # ".u32 \t$result, $src;", []>, Requires<Preds>;
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- } else if !eq(bitwidth, "64") then {
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- def _64 : NVPTXInst<(outs Int64Regs:$result), (ins Int64Regs:$src),
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- "cvta." # Str # ".u64 \t$result, $src;", []>, Requires<Preds>;
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- }
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- }
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+ if Supports32 then
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+ def "" : NVPTXInst<(outs Int32Regs:$result), (ins Int32Regs:$src),
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+ "cvta." # Str # ".u32 \t$result, $src;", []>, Requires<Preds>;
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+
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+ def _64 : NVPTXInst<(outs Int64Regs:$result), (ins Int64Regs:$src),
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+ "cvta." # Str # ".u64 \t$result, $src;", []>, Requires<Preds>;
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}
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multiclass G_TO_NG<string Str, bit Supports32 = 1, list<Predicate> Preds = []> {
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- foreach bitwidth = !if(Supports32, ["32", "64"], ["64"]) in {
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- if !eq(bitwidth, "32") then {
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- def "" : NVPTXInst<(outs Int32Regs:$result), (ins Int32Regs:$src),
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- "cvta.to." # Str # ".u32 \t$result, $src;", []>, Requires<Preds>;
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- } else if !eq(bitwidth, "64") then {
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- def _64 : NVPTXInst<(outs Int64Regs:$result), (ins Int64Regs:$src),
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- "cvta.to." # Str # ".u64 \t$result, $src;", []>, Requires<Preds>;
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- }
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- }
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+ if Supports32 then
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+ def "" : NVPTXInst<(outs Int32Regs:$result), (ins Int32Regs:$src),
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+ "cvta.to." # Str # ".u32 \t$result, $src;", []>, Requires<Preds>;
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+
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+ def _64 : NVPTXInst<(outs Int64Regs:$result), (ins Int64Regs:$src),
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+ "cvta.to." # Str # ".u64 \t$result, $src;", []>, Requires<Preds>;
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}
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foreach space = ["local", "shared", "global", "const", "param"] in {
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