[IR] Add nocapture & nosync to matrix intrinsics.

As suggested in D81472, the load/store intrinsics' pointer arguments can
be marked as nocapture and all matrix intrinsics as nosync.

This also re-flows the intrinsic definitions, to make them a little more
concise.

Author: fhahn

llvm/include/llvm/IR/Intrinsics.td

@@ -1436,46 +1436,34 @@ let IntrProperties = [IntrNoMem, IntrWillReturn] in {
 
 //===----- Matrix intrinsics ---------------------------------------------===//
 
-def int_matrix_transpose : Intrinsic<[llvm_anyvector_ty],
-                                     [LLVMMatchType<0>,
-                                     llvm_i32_ty,
-                                     llvm_i32_ty],
-                                     [IntrNoMem, IntrSpeculatable,
-                                      IntrWillReturn, ImmArg<ArgIndex<1>>,
-                                      ImmArg<ArgIndex<2>>]>;
-
-def int_matrix_multiply : Intrinsic<[llvm_anyvector_ty],
-                                    [llvm_anyvector_ty,
-                                     llvm_anyvector_ty,
-                                     llvm_i32_ty,
-                                     llvm_i32_ty,
-                                     llvm_i32_ty],
-                                    [IntrNoMem, IntrSpeculatable,
-                                     IntrWillReturn, ImmArg<ArgIndex<2>>,
-                                     ImmArg<ArgIndex<3>>,
-                                     ImmArg<ArgIndex<4>>]>;
-
-def int_matrix_columnwise_load : Intrinsic<[llvm_anyvector_ty],
-                                           [LLVMAnyPointerType<LLVMMatchType<0>>,
-                                            llvm_i32_ty,
-                                            llvm_i32_ty,
-                                            llvm_i32_ty],
-                                           [IntrArgMemOnly, IntrReadMem,
-                                            IntrWillReturn,
-                                            ImmArg<ArgIndex<2>>,
-                                            ImmArg<ArgIndex<3>>]>;
-
-def int_matrix_columnwise_store : Intrinsic<[],
-                                            [llvm_anyvector_ty,
-                                             LLVMAnyPointerType<LLVMMatchType<0>>,
-                                             llvm_i32_ty,
-                                             llvm_i32_ty,
-                                             llvm_i32_ty],
-                                            [IntrArgMemOnly, IntrWillReturn,
-                                             IntrWriteMem,
-                                             WriteOnly<ArgIndex<1>>,
-                                             ImmArg<ArgIndex<3>>,
-                                             ImmArg<ArgIndex<4>>]>;
+def int_matrix_transpose
+  : Intrinsic<[llvm_anyvector_ty],
+              [LLVMMatchType<0>, llvm_i32_ty, llvm_i32_ty],
+              [ IntrNoSync, IntrWillReturn, IntrNoMem, IntrSpeculatable, ImmArg<ArgIndex<1>>,
+               ImmArg<ArgIndex<2>>]>;
+
+def int_matrix_multiply
+  : Intrinsic<[llvm_anyvector_ty],
+              [llvm_anyvector_ty, llvm_anyvector_ty, llvm_i32_ty, llvm_i32_ty,
+               llvm_i32_ty],
+              [IntrNoSync, IntrWillReturn, IntrNoMem, IntrSpeculatable, ImmArg<ArgIndex<2>>,
+               ImmArg<ArgIndex<3>>, ImmArg<ArgIndex<4>>]>;
+
+def int_matrix_columnwise_load
+  : Intrinsic<[llvm_anyvector_ty],
+              [LLVMAnyPointerType<LLVMMatchType<0>>, llvm_i32_ty, llvm_i32_ty,
+               llvm_i32_ty],
+              [IntrNoSync, IntrWillReturn, IntrArgMemOnly, IntrReadMem,
+               NoCapture<ArgIndex<0>>, ImmArg<ArgIndex<2>>,
+               ImmArg<ArgIndex<3>>]>;
+
+def int_matrix_columnwise_store
+  : Intrinsic<[],
+              [llvm_anyvector_ty, LLVMAnyPointerType<LLVMMatchType<0>>,
+               llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
+              [IntrNoSync, IntrWillReturn, IntrArgMemOnly, IntrWriteMem,
+               WriteOnly<ArgIndex<1>>, NoCapture<ArgIndex<1>>,
+               ImmArg<ArgIndex<3>>, ImmArg<ArgIndex<4>>]>;
 
 //===---------- Intrinsics to control hardware supported loops ----------===//
 

llvm/test/Transforms/LowerMatrixIntrinsics/strided-load-double.ll

@@ -67,8 +67,8 @@ entry:
   ret <8 x double> %load
 }
 
-; CHECK: declare <9 x double> @llvm.matrix.columnwise.load.v9f64.p0v9f64(<9 x double>*, i32, i32 immarg, i32 immarg) [[READONLY:#[0-9]]]
+; CHECK: declare <9 x double> @llvm.matrix.columnwise.load.v9f64.p0v9f64(<9 x double>* nocapture, i32, i32 immarg, i32 immarg) [[READONLY:#[0-9]]]
 
-; CHECK: declare <8 x double> @llvm.matrix.columnwise.load.v8f64.p0v8f64(<8 x double>*, i32, i32 immarg, i32 immarg) [[READONLY]]
+; CHECK: declare <8 x double> @llvm.matrix.columnwise.load.v8f64.p0v8f64(<8 x double>* nocapture, i32, i32 immarg, i32 immarg) [[READONLY]]
 
-; CHECK: attributes [[READONLY]] = { argmemonly nounwind readonly willreturn }
+; CHECK: attributes [[READONLY]] = { argmemonly nosync nounwind readonly willreturn }

llvm/test/Transforms/LowerMatrixIntrinsics/strided-store-double.ll

@@ -67,8 +67,8 @@ define void @strided_store_2x3(<10 x double> %in, double* %out) {
 
 declare void @llvm.matrix.columnwise.store.v10f64(<10 x double>, double*, i32, i32, i32)
 
-; CHECK: declare void @llvm.matrix.columnwise.store.v6f64.p0f64(<6 x double>, double* writeonly, i32, i32 immarg, i32 immarg) [[WRITEONLY:#[0-9]]]
+; CHECK: declare void @llvm.matrix.columnwise.store.v6f64.p0f64(<6 x double>, double* nocapture writeonly, i32, i32 immarg, i32 immarg) [[WRITEONLY:#[0-9]]]
 
-; CHECK: declare void @llvm.matrix.columnwise.store.v10f64.p0f64(<10 x double>, double* writeonly, i32, i32 immarg, i32 immarg) [[WRITEONLY]]
+; CHECK: declare void @llvm.matrix.columnwise.store.v10f64.p0f64(<10 x double>, double* nocapture writeonly, i32, i32 immarg, i32 immarg) [[WRITEONLY]]
 
-; CHECK: attributes [[WRITEONLY]] = { argmemonly nounwind willreturn writeonly }
+; CHECK: attributes [[WRITEONLY]] = { argmemonly nosync nounwind willreturn writeonly }