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[DAGCombiner] In mergeTruncStore, make sure we aren't storing shifted in bits.
When looking through a right shift, we need to make sure that all of the bits we are using from the shift come from the shift input and not the sign or zero bits that are shifted in. Fixes #90936.
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llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp

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Original file line numberDiff line numberDiff line change
@@ -8840,6 +8840,10 @@ SDValue DAGCombiner::mergeTruncStores(StoreSDNode *N) {
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if (ShiftAmtC % NarrowNumBits != 0)
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return SDValue();
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// Make sure we aren't reading bits that are shifted in.
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if (ShiftAmtC > WideVal.getScalarValueSizeInBits() - NarrowNumBits)
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return SDValue();
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Offset = ShiftAmtC / NarrowNumBits;
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WideVal = WideVal.getOperand(0);
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}

llvm/test/CodeGen/AArch64/pr90936.ll

Lines changed: 3 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -4,7 +4,9 @@
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define void @f(i16 %0, ptr %1) {
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; CHECK-LABEL: f:
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; CHECK: // %bb.0:
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; CHECK-NEXT: strh w0, [x1]
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; CHECK-NEXT: ubfx w8, w0, #8, #6
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; CHECK-NEXT: strb w0, [x1]
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; CHECK-NEXT: strb w8, [x1, #1]
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; CHECK-NEXT: ret
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%3 = trunc i16 %0 to i8
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%4 = trunc i16 %0 to i14

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