[RISCV] Remove duplicate WriteRes<WriteJalr for MIPSP8700.

We had two WriteRes for WriteJalr with difference latencies. I don't
know which is correct. I chose Latency=2 to match WriteJal.

Author: topperc

llvm/lib/Target/RISCV/RISCVSchedMIPSP8700.td

@@ -125,7 +125,6 @@ def : WriteRes<WriteCSR, [p8700ALQ]>;
 
 // Handle CTI Pipeline.
 def : WriteRes<WriteJmp, [p8700IssueCTI]>;
-def : WriteRes<WriteJalr, [p8700IssueCTI]>;
 let Latency = 2 in {
 def : WriteRes<WriteJal, [p8700IssueCTI]>;
 def : WriteRes<WriteJalr, [p8700IssueCTI]>;