@@ -13089,7 +13089,7 @@ static SDValue combineVSelectWithAllOnesOrZeros(SDValue Cond, SDValue TVal,
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bool IsFAllOne = ISD::isBuildVectorAllOnes(FVal.getNode());
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// no vselect(cond, 0/-1, X) or vselect(cond, X, 0/-1), return
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- if (!( IsTAllZero || IsTAllOne || IsFAllZero || IsFAllOne) )
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+ if (!IsTAllZero && ! IsTAllOne && ! IsFAllZero && ! IsFAllOne)
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return SDValue();
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// select Cond, 0, 0 → 0
@@ -13106,6 +13106,10 @@ static SDValue combineVSelectWithAllOnesOrZeros(SDValue Cond, SDValue TVal,
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if (CondVT.getScalarSizeInBits() != VT.getScalarSizeInBits())
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return SDValue();
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+ // Cond value must be 'sign splat' to be converted to a logical op.
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+ if (DAG.ComputeNumSignBits(Cond) != CondVT.getScalarSizeInBits())
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+ return SDValue();
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+
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// Try inverting Cond and swapping T/F if it gives all-ones/all-zeros form
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if (!IsTAllOne && !IsFAllZero && Cond.hasOneUse() &&
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Cond.getOpcode() == ISD::SETCC &&
@@ -13123,10 +13127,6 @@ static SDValue combineVSelectWithAllOnesOrZeros(SDValue Cond, SDValue TVal,
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}
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}
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- // Cond value must be 'sign splat' to be converted to a logical op.
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- if (DAG.ComputeNumSignBits(Cond) != CondVT.getScalarSizeInBits())
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- return SDValue();
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-
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// select Cond, -1, 0 → bitcast Cond
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if (IsTAllOne && IsFAllZero)
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return DAG.getBitcast(VT, Cond);
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