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| 1 | +; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 4 |
| 2 | +; RUN: opt -passes=constraint-elimination -S %s | FileCheck %s |
| 3 | + |
| 4 | +define i1 @abs_int_min_is_not_poison(i32 %arg) { |
| 5 | +; CHECK-LABEL: define i1 @abs_int_min_is_not_poison( |
| 6 | +; CHECK-SAME: i32 [[ARG:%.*]]) { |
| 7 | +; CHECK-NEXT: [[ABS:%.*]] = tail call i32 @llvm.abs.i32(i32 [[ARG]], i1 false) |
| 8 | +; CHECK-NEXT: [[CMP:%.*]] = icmp sge i32 [[ABS]], [[ARG]] |
| 9 | +; CHECK-NEXT: ret i1 [[CMP]] |
| 10 | +; |
| 11 | + %abs = tail call i32 @llvm.abs.i32(i32 %arg, i1 false) |
| 12 | + %cmp = icmp sge i32 %abs, %arg |
| 13 | + ret i1 %cmp |
| 14 | +} |
| 15 | + |
| 16 | +define i1 @abs_int_min_is_poison(i32 %arg) { |
| 17 | +; CHECK-LABEL: define i1 @abs_int_min_is_poison( |
| 18 | +; CHECK-SAME: i32 [[ARG:%.*]]) { |
| 19 | +; CHECK-NEXT: [[ABS:%.*]] = tail call i32 @llvm.abs.i32(i32 [[ARG]], i1 true) |
| 20 | +; CHECK-NEXT: [[CMP:%.*]] = icmp sge i32 [[ABS]], [[ARG]] |
| 21 | +; CHECK-NEXT: ret i1 [[CMP]] |
| 22 | +; |
| 23 | + %abs = tail call i32 @llvm.abs.i32(i32 %arg, i1 true) |
| 24 | + %cmp = icmp sge i32 %abs, %arg |
| 25 | + ret i1 %cmp |
| 26 | +} |
| 27 | + |
| 28 | +define i1 @abs_plus_one(i32 %arg) { |
| 29 | +; CHECK-LABEL: define i1 @abs_plus_one( |
| 30 | +; CHECK-SAME: i32 [[ARG:%.*]]) { |
| 31 | +; CHECK-NEXT: [[ABS:%.*]] = tail call i32 @llvm.abs.i32(i32 [[ARG]], i1 true) |
| 32 | +; CHECK-NEXT: [[ABS_PLUS_ONE:%.*]] = add nsw i32 [[ABS]], 1 |
| 33 | +; CHECK-NEXT: [[CMP:%.*]] = icmp sge i32 [[ABS_PLUS_ONE]], [[ARG]] |
| 34 | +; CHECK-NEXT: ret i1 [[CMP]] |
| 35 | +; |
| 36 | + %abs = tail call i32 @llvm.abs.i32(i32 %arg, i1 true) |
| 37 | + %abs_plus_one = add nsw i32 %abs, 1 |
| 38 | + %cmp = icmp sge i32 %abs_plus_one, %arg |
| 39 | + ret i1 %cmp |
| 40 | +} |
| 41 | + |
| 42 | +define i1 @arg_minus_one_strict_less(i32 %arg) { |
| 43 | +; CHECK-LABEL: define i1 @arg_minus_one_strict_less( |
| 44 | +; CHECK-SAME: i32 [[ARG:%.*]]) { |
| 45 | +; CHECK-NEXT: [[ABS:%.*]] = tail call i32 @llvm.abs.i32(i32 [[ARG]], i1 true) |
| 46 | +; CHECK-NEXT: [[ARG_MINUS_ONE:%.*]] = add nsw i32 [[ARG]], -1 |
| 47 | +; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[ARG_MINUS_ONE]], [[ABS]] |
| 48 | +; CHECK-NEXT: ret i1 [[CMP]] |
| 49 | +; |
| 50 | + %abs = tail call i32 @llvm.abs.i32(i32 %arg, i1 true) |
| 51 | + %arg_minus_one = add nsw i32 %arg, -1 |
| 52 | + %cmp = icmp slt i32 %arg_minus_one, %abs |
| 53 | + ret i1 %cmp |
| 54 | +} |
| 55 | + |
| 56 | +define i1 @arg_minus_one_strict_greater(i32 %arg) { |
| 57 | +; CHECK-LABEL: define i1 @arg_minus_one_strict_greater( |
| 58 | +; CHECK-SAME: i32 [[ARG:%.*]]) { |
| 59 | +; CHECK-NEXT: [[ABS:%.*]] = tail call i32 @llvm.abs.i32(i32 [[ARG]], i1 true) |
| 60 | +; CHECK-NEXT: [[ARG_MINUS_ONE:%.*]] = add nsw i32 [[ARG]], -1 |
| 61 | +; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[ARG_MINUS_ONE]], [[ABS]] |
| 62 | +; CHECK-NEXT: ret i1 [[CMP]] |
| 63 | +; |
| 64 | + %abs = tail call i32 @llvm.abs.i32(i32 %arg, i1 true) |
| 65 | + %arg_minus_one = add nsw i32 %arg, -1 |
| 66 | + %cmp = icmp sgt i32 %arg_minus_one, %abs |
| 67 | + ret i1 %cmp |
| 68 | +} |
| 69 | + |
| 70 | +define i1 @abs_plus_one_unsigned_greater_or_equal_nonnegative_arg(i32 %arg) { |
| 71 | +; CHECK-LABEL: define i1 @abs_plus_one_unsigned_greater_or_equal_nonnegative_arg( |
| 72 | +; CHECK-SAME: i32 [[ARG:%.*]]) { |
| 73 | +; CHECK-NEXT: [[CMP_ARG_NONNEGATIVE:%.*]] = icmp sge i32 [[ARG]], 0 |
| 74 | +; CHECK-NEXT: call void @llvm.assume(i1 [[CMP_ARG_NONNEGATIVE]]) |
| 75 | +; CHECK-NEXT: [[ABS:%.*]] = tail call i32 @llvm.abs.i32(i32 [[ARG]], i1 true) |
| 76 | +; CHECK-NEXT: [[ABS_PLUS_ONE:%.*]] = add nuw i32 [[ABS]], 1 |
| 77 | +; CHECK-NEXT: [[CMP:%.*]] = icmp uge i32 [[ABS_PLUS_ONE]], [[ARG]] |
| 78 | +; CHECK-NEXT: ret i1 [[CMP]] |
| 79 | +; |
| 80 | + %cmp_arg_nonnegative = icmp sge i32 %arg, 0 |
| 81 | + call void @llvm.assume(i1 %cmp_arg_nonnegative) |
| 82 | + %abs = tail call i32 @llvm.abs.i32(i32 %arg, i1 true) |
| 83 | + %abs_plus_one = add nuw i32 %abs, 1 |
| 84 | + %cmp = icmp uge i32 %abs_plus_one, %arg |
| 85 | + ret i1 %cmp |
| 86 | +} |
| 87 | + |
| 88 | +define i1 @abs_plus_one_unsigned_greater_or_equal_cannot_be_simplified(i32 %arg) { |
| 89 | +; CHECK-LABEL: define i1 @abs_plus_one_unsigned_greater_or_equal_cannot_be_simplified( |
| 90 | +; CHECK-SAME: i32 [[ARG:%.*]]) { |
| 91 | +; CHECK-NEXT: [[ABS:%.*]] = tail call i32 @llvm.abs.i32(i32 [[ARG]], i1 true) |
| 92 | +; CHECK-NEXT: [[ABS_PLUS_ONE:%.*]] = add nuw i32 [[ABS]], 1 |
| 93 | +; CHECK-NEXT: [[CMP:%.*]] = icmp uge i32 [[ABS_PLUS_ONE]], [[ARG]] |
| 94 | +; CHECK-NEXT: ret i1 [[CMP]] |
| 95 | +; |
| 96 | + %abs = tail call i32 @llvm.abs.i32(i32 %arg, i1 true) |
| 97 | + %abs_plus_one = add nuw i32 %abs, 1 |
| 98 | + %cmp = icmp uge i32 %abs_plus_one, %arg |
| 99 | + ret i1 %cmp |
| 100 | +} |
| 101 | + |
| 102 | +define i1 @abs_constant_negative_arg() { |
| 103 | +; CHECK-LABEL: define i1 @abs_constant_negative_arg() { |
| 104 | +; CHECK-NEXT: [[ABS:%.*]] = tail call i32 @llvm.abs.i32(i32 -3, i1 false) |
| 105 | +; CHECK-NEXT: [[CMP:%.*]] = icmp sge i32 [[ABS]], 3 |
| 106 | +; CHECK-NEXT: ret i1 [[CMP]] |
| 107 | +; |
| 108 | + %abs = tail call i32 @llvm.abs.i32(i32 -3, i1 false) |
| 109 | + %cmp = icmp sge i32 %abs, 3 |
| 110 | + ret i1 %cmp |
| 111 | +} |
| 112 | + |
| 113 | +define i1 @abs_constant_positive_arg() { |
| 114 | +; CHECK-LABEL: define i1 @abs_constant_positive_arg() { |
| 115 | +; CHECK-NEXT: [[ABS:%.*]] = tail call i32 @llvm.abs.i32(i32 3, i1 false) |
| 116 | +; CHECK-NEXT: [[CMP:%.*]] = icmp sge i32 [[ABS]], 3 |
| 117 | +; CHECK-NEXT: ret i1 [[CMP]] |
| 118 | +; |
| 119 | + %abs = tail call i32 @llvm.abs.i32(i32 3, i1 false) |
| 120 | + %cmp = icmp sge i32 %abs, 3 |
| 121 | + ret i1 %cmp |
| 122 | +} |
| 123 | + |
| 124 | +declare i32 @llvm.abs.i32(i32, i1 immarg) |
| 125 | +declare void @llvm.assume(i1) |
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