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fixup! add vlmax and imm test case
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llvm/test/CodeGen/RISCV/rvv/vl-opt.ll

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@@ -30,6 +30,26 @@ define <vscale x 4 x i32> @different_imm_vl_with_ta(<vscale x 4 x i32> %passthru
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ret <vscale x 4 x i32> %w
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}
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define <vscale x 4 x i32> @vlmax_and_imm_vl_with_ta(<vscale x 4 x i32> %passthru, <vscale x 4 x i32> %a, <vscale x 4 x i32> %b, iXLen %vl1, iXLen %vl2) {
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; NOVLOPT-LABEL: vlmax_and_imm_vl_with_ta:
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; NOVLOPT: # %bb.0:
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; NOVLOPT-NEXT: vsetvli a0, zero, e32, m2, ta, ma
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; NOVLOPT-NEXT: vadd.vv v8, v10, v12
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; NOVLOPT-NEXT: vsetivli zero, 4, e32, m2, ta, ma
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; NOVLOPT-NEXT: vadd.vv v8, v8, v10
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; NOVLOPT-NEXT: ret
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;
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; VLOPT-LABEL: vlmax_and_imm_vl_with_ta:
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; VLOPT: # %bb.0:
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; VLOPT-NEXT: vsetivli zero, 4, e32, m2, ta, ma
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; VLOPT-NEXT: vadd.vv v8, v10, v12
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; VLOPT-NEXT: vadd.vv v8, v8, v10
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; VLOPT-NEXT: ret
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%v = call <vscale x 4 x i32> @llvm.riscv.vadd.nxv4i32.nxv4i32(<vscale x 4 x i32> poison, <vscale x 4 x i32> %a, <vscale x 4 x i32> %b, iXLen -1)
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%w = call <vscale x 4 x i32> @llvm.riscv.vadd.nxv4i32.nxv4i32(<vscale x 4 x i32> poison, <vscale x 4 x i32> %v, <vscale x 4 x i32> %a, iXLen 4)
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ret <vscale x 4 x i32> %w
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}
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; Not beneficial to propagate VL since VL is larger in the use side.
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define <vscale x 4 x i32> @different_imm_vl_with_ta_larger_vl(<vscale x 4 x i32> %passthru, <vscale x 4 x i32> %a, <vscale x 4 x i32> %b, iXLen %vl1, iXLen %vl2) {
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; CHECK-LABEL: different_imm_vl_with_ta_larger_vl:

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