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AMDGPU: Stop handling legacy amdgpu-unsafe-fp-atomics attribute
This is now autoupgraded to annotate atomicrmw instructions in old bitcode.
1 parent f19c1c2 commit 1f62a17

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4 files changed

+88
-196
lines changed

4 files changed

+88
-196
lines changed

llvm/lib/Target/AMDGPU/SIISelLowering.cpp

Lines changed: 1 addition & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -16123,14 +16123,7 @@ static bool globalMemoryFPAtomicIsLegal(const GCNSubtarget &Subtarget,
1612316123
} else if (Subtarget.supportsAgentScopeFineGrainedRemoteMemoryAtomics())
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return true;
1612516125

16126-
if (RMW->hasMetadata("amdgpu.no.fine.grained.memory"))
16127-
return true;
16128-
16129-
// TODO: Auto-upgrade this attribute to the metadata in function body and stop
16130-
// checking it.
16131-
return RMW->getFunction()
16132-
->getFnAttribute("amdgpu-unsafe-fp-atomics")
16133-
.getValueAsBool();
16126+
return RMW->hasMetadata("amdgpu.no.fine.grained.memory");
1613416127
}
1613516128

1613616129
TargetLowering::AtomicExpansionKind

llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-mmra.ll

Lines changed: 3 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -124,7 +124,7 @@ define i16 @test_cmpxchg_i16_global_agent_align4(ptr addrspace(1) %out, i16 %in,
124124
ret i16 %extract
125125
}
126126

127-
define void @syncscope_workgroup_nortn(ptr %addr, float %val) #0 {
127+
define void @syncscope_workgroup_nortn(ptr %addr, float %val) {
128128
; GFX90A-LABEL: define void @syncscope_workgroup_nortn(
129129
; GFX90A-SAME: ptr [[ADDR:%.*]], float [[VAL:%.*]]) #[[ATTR1:[0-9]+]] {
130130
; GFX90A-NEXT: br label [[ATOMICRMW_CHECK_SHARED:%.*]]
@@ -159,7 +159,7 @@ define void @syncscope_workgroup_nortn(ptr %addr, float %val) #0 {
159159
; GFX1100-NEXT: [[RES:%.*]] = atomicrmw fadd ptr [[ADDR]], float [[VAL]] syncscope("workgroup") seq_cst, align 4, !mmra [[META0]]
160160
; GFX1100-NEXT: ret void
161161
;
162-
%res = atomicrmw fadd ptr %addr, float %val syncscope("workgroup") seq_cst, !mmra !2
162+
%res = atomicrmw fadd ptr %addr, float %val syncscope("workgroup") seq_cst, !mmra !2, !amdgpu.no.fine.grained.memory !3, !amdgpu.ignore.denormal.mode !3
163163
ret void
164164
}
165165

@@ -188,11 +188,10 @@ define i32 @atomic_load_global_align1(ptr addrspace(1) %ptr) {
188188
ret i32 %val
189189
}
190190

191-
attributes #0 = { "amdgpu-unsafe-fp-atomics"="true" }
192-
193191
!0 = !{!"foo", !"bar"}
194192
!1 = !{!"bux", !"baz"}
195193
!2 = !{!0, !1}
194+
!3 = !{}
196195
;.
197196
; GFX90A: [[META0]] = !{[[META1:![0-9]+]], [[META2:![0-9]+]]}
198197
; GFX90A: [[META1]] = !{!"foo", !"bar"}

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