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- ; RUN: opt -cost-model -analyze -mtriple=amdgcn-unknown-amdhsa -mcpu=gfx900 -mattr=+half-rate-64-ops < %s | FileCheck -check-prefixes=FAST16,ALL %s
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- ; RUN: opt -cost-model -analyze -mtriple=amdgcn-unknown-amdhsa -mattr=-half-rate-64-ops < %s | FileCheck -check-prefixes=SLOW16,ALL %s
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- ; RUN: opt -cost-model -cost-kind=code-size -analyze -mtriple=amdgcn-unknown-amdhsa -mcpu=gfx900 -mattr=+half-rate-64-ops < %s | FileCheck -check-prefixes=FAST16,ALL %s
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- ; RUN: opt -cost-model -cost-kind=code-size -analyze -mtriple=amdgcn-unknown-amdhsa -mattr=-half-rate-64-ops < %s | FileCheck -check-prefixes=SLOW16,ALL %s
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+ ; NOTE: Assertions have been autogenerated by utils/update_analyze_test_checks.py
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+ ; RUN: opt -cost-model -analyze -mtriple=amdgcn-unknown-amdhsa -mcpu=gfx900 -mattr=+half-rate-64-ops < %s | FileCheck -check-prefixes=ALL,FAST16 %s
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+ ; RUN: opt -cost-model -analyze -mtriple=amdgcn-unknown-amdhsa -mattr=-half-rate-64-ops < %s | FileCheck -check-prefixes=ALL,SLOW16 %s
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+ ; RUN: opt -cost-model -cost-kind=code-size -analyze -mtriple=amdgcn-unknown-amdhsa -mcpu=gfx900 -mattr=+half-rate-64-ops < %s | FileCheck -check-prefixes=ALL-SIZE,FAST16-SIZE %s
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+ ; RUN: opt -cost-model -cost-kind=code-size -analyze -mtriple=amdgcn-unknown-amdhsa -mattr=-half-rate-64-ops < %s | FileCheck -check-prefixes=ALL-SIZE,SLOW16-SIZE %s
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; END.
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- ; ALL-LABEL: 'add_i32'
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- ; ALL: estimated cost of 1 for {{.*}} add i32
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- ; ALL: estimated cost of 2 for {{.*}} add <2 x i32>
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- ;;; Allow for 4 when v3i32 is illegal and TargetLowering thinks it needs widening,
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- ;;; and 3 when it is legal.
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- ; ALL: estimated cost of {{[34]}} for {{.*}} add <3 x i32>
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- ; ALL: estimated cost of 4 for {{.*}} add <4 x i32>
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- ;;; Allow for 8 when v3i32 is illegal and TargetLowering thinks it needs widening,
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- ;;; and 5 when it is legal.
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- ; ALL: estimated cost of {{[58]}} for {{.*}} add <5 x i32>
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define amdgpu_kernel void @add_i32 () #0 {
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+ ; ALL-LABEL: 'add_i32'
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+ ; ALL-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %i32 = add i32 undef, undef
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+ ; ALL-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v2i32 = add <2 x i32> undef, undef
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+ ; ALL-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v3i32 = add <3 x i32> undef, undef
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+ ; ALL-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v4i32 = add <4 x i32> undef, undef
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+ ; ALL-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %v5i32 = add <5 x i32> undef, undef
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+ ; ALL-NEXT: Cost Model: Found an estimated cost of 10 for instruction: ret void
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+ ;
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+ ; ALL-SIZE-LABEL: 'add_i32'
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+ ; ALL-SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %i32 = add i32 undef, undef
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+ ; ALL-SIZE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v2i32 = add <2 x i32> undef, undef
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+ ; ALL-SIZE-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v3i32 = add <3 x i32> undef, undef
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+ ; ALL-SIZE-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v4i32 = add <4 x i32> undef, undef
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+ ; ALL-SIZE-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %v5i32 = add <5 x i32> undef, undef
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+ ; ALL-SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void
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+ ;
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%i32 = add i32 undef , undef
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%v2i32 = add <2 x i32 > undef , undef
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%v3i32 = add <3 x i32 > undef , undef
@@ -23,13 +30,23 @@ define amdgpu_kernel void @add_i32() #0 {
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ret void
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}
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- ; ALL-LABEL: 'add_i64'
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- ; ALL: estimated cost of 2 for {{.*}} add i64
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- ; ALL: estimated cost of 4 for {{.*}} add <2 x i64>
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- ; ALL: estimated cost of 6 for {{.*}} add <3 x i64>
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- ; ALL: estimated cost of 8 for {{.*}} add <4 x i64>
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- ; ALL: estimated cost of 128 for {{.*}} add <16 x i64>
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define amdgpu_kernel void @add_i64 () #0 {
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+ ; ALL-LABEL: 'add_i64'
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+ ; ALL-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %i64 = add i64 undef, undef
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+ ; ALL-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v2i64 = add <2 x i64> undef, undef
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+ ; ALL-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v3i64 = add <3 x i64> undef, undef
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+ ; ALL-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v4i64 = add <4 x i64> undef, undef
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+ ; ALL-NEXT: Cost Model: Found an estimated cost of 128 for instruction: %v16i64 = add <16 x i64> undef, undef
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+ ; ALL-NEXT: Cost Model: Found an estimated cost of 10 for instruction: ret void
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+ ;
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+ ; ALL-SIZE-LABEL: 'add_i64'
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+ ; ALL-SIZE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %i64 = add i64 undef, undef
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+ ; ALL-SIZE-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v2i64 = add <2 x i64> undef, undef
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+ ; ALL-SIZE-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v3i64 = add <3 x i64> undef, undef
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+ ; ALL-SIZE-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v4i64 = add <4 x i64> undef, undef
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+ ; ALL-SIZE-NEXT: Cost Model: Found an estimated cost of 128 for instruction: %v16i64 = add <16 x i64> undef, undef
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+ ; ALL-SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void
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+ ;
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%i64 = add i64 undef , undef
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%v2i64 = add <2 x i64 > undef , undef
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%v3i64 = add <3 x i64 > undef , undef
@@ -38,23 +55,61 @@ define amdgpu_kernel void @add_i64() #0 {
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ret void
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}
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- ; ALL-LABEL: 'add_i16'
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- ; ALL: estimated cost of 1 for {{.*}} add i16
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- ; SLOW16: estimated cost of 2 for {{.*}} add <2 x i16>
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- ; FAST16: estimated cost of 1 for {{.*}} add <2 x i16>
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define amdgpu_kernel void @add_i16 () #0 {
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+ ; FAST16-LABEL: 'add_i16'
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+ ; FAST16-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %i16 = add i16 undef, undef
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+ ; FAST16-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2i16 = add <2 x i16> undef, undef
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+ ; FAST16-NEXT: Cost Model: Found an estimated cost of 10 for instruction: ret void
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+ ;
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+ ; SLOW16-LABEL: 'add_i16'
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+ ; SLOW16-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %i16 = add i16 undef, undef
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+ ; SLOW16-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v2i16 = add <2 x i16> undef, undef
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+ ; SLOW16-NEXT: Cost Model: Found an estimated cost of 10 for instruction: ret void
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+ ;
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+ ; FAST16-SIZE-LABEL: 'add_i16'
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+ ; FAST16-SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %i16 = add i16 undef, undef
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+ ; FAST16-SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2i16 = add <2 x i16> undef, undef
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+ ; FAST16-SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void
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+ ;
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+ ; SLOW16-SIZE-LABEL: 'add_i16'
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+ ; SLOW16-SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %i16 = add i16 undef, undef
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+ ; SLOW16-SIZE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v2i16 = add <2 x i16> undef, undef
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+ ; SLOW16-SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void
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+ ;
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%i16 = add i16 undef , undef
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%v2i16 = add <2 x i16 > undef , undef
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ret void
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}
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- ; ALL-LABEL: 'sub'
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- ; ALL: estimated cost of 1 for {{.*}} sub i32
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- ; ALL: estimated cost of 2 for {{.*}} sub i64
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- ; ALL: estimated cost of 1 for {{.*}} sub i16
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- ; SLOW16: estimated cost of 2 for {{.*}} sub <2 x i16>
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- ; FAST16: estimated cost of 1 for {{.*}} sub <2 x i16>
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define amdgpu_kernel void @sub () #0 {
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+ ; FAST16-LABEL: 'sub'
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+ ; FAST16-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %i32 = sub i32 undef, undef
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+ ; FAST16-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %i64 = sub i64 undef, undef
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+ ; FAST16-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %i16 = sub i16 undef, undef
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+ ; FAST16-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2i16 = sub <2 x i16> undef, undef
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+ ; FAST16-NEXT: Cost Model: Found an estimated cost of 10 for instruction: ret void
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+ ;
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+ ; SLOW16-LABEL: 'sub'
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+ ; SLOW16-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %i32 = sub i32 undef, undef
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+ ; SLOW16-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %i64 = sub i64 undef, undef
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+ ; SLOW16-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %i16 = sub i16 undef, undef
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+ ; SLOW16-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v2i16 = sub <2 x i16> undef, undef
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+ ; SLOW16-NEXT: Cost Model: Found an estimated cost of 10 for instruction: ret void
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+ ;
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+ ; FAST16-SIZE-LABEL: 'sub'
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+ ; FAST16-SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %i32 = sub i32 undef, undef
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+ ; FAST16-SIZE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %i64 = sub i64 undef, undef
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+ ; FAST16-SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %i16 = sub i16 undef, undef
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+ ; FAST16-SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2i16 = sub <2 x i16> undef, undef
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+ ; FAST16-SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void
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+ ;
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+ ; SLOW16-SIZE-LABEL: 'sub'
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+ ; SLOW16-SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %i32 = sub i32 undef, undef
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+ ; SLOW16-SIZE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %i64 = sub i64 undef, undef
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+ ; SLOW16-SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %i16 = sub i16 undef, undef
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+ ; SLOW16-SIZE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v2i16 = sub <2 x i16> undef, undef
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+ ; SLOW16-SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void
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+ ;
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%i32 = sub i32 undef , undef
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%i64 = sub i64 undef , undef
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%i16 = sub i16 undef , undef
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