@@ -239,11 +239,6 @@ static cl::opt<bool> EnableRedZone("aarch64-redzone",
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cl::desc (" enable use of redzone on AArch64" ),
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cl::init(false ), cl::Hidden);
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- static cl::opt<bool >
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- ReverseCSRRestoreSeq (" reverse-csr-restore-seq" ,
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- cl::desc (" reverse the CSR restore sequence" ),
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- cl::init(false ), cl::Hidden);
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-
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static cl::opt<bool > StackTaggingMergeSetTag (
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" stack-tagging-merge-settag" ,
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cl::desc (" merge settag instruction in function epilog" ), cl::init(true ),
@@ -307,8 +302,6 @@ bool AArch64FrameLowering::homogeneousPrologEpilog(
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return false ;
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if (!EnableHomogeneousPrologEpilog)
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return false ;
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- if (ReverseCSRRestoreSeq)
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- return false ;
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if (EnableRedZone)
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return false ;
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@@ -3117,7 +3110,27 @@ bool AArch64FrameLowering::restoreCalleeSavedRegisters(
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computeCalleeSaveRegisterPairs (MF, CSI, TRI, RegPairs, hasFP (MF));
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- auto EmitMI = [&](const RegPairInfo &RPI) -> MachineBasicBlock::iterator {
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+ if (homogeneousPrologEpilog (MF, &MBB)) {
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+ auto MIB = BuildMI (MBB, MBBI, DL, TII.get (AArch64::HOM_Epilog))
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+ .setMIFlag (MachineInstr::FrameDestroy);
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+ for (auto &RPI : RegPairs) {
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+ MIB.addReg (RPI.Reg1 , RegState::Define);
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+ MIB.addReg (RPI.Reg2 , RegState::Define);
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+ }
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+ return true ;
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+ }
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+
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+ // For performance reasons restore SVE register in increasing order
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+ auto IsPPR = [](const RegPairInfo &c) { return c.Type == RegPairInfo::PPR; };
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+ auto PPRBegin = std::find_if (RegPairs.begin (), RegPairs.end (), IsPPR);
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+ auto PPREnd = std::find_if_not (PPRBegin, RegPairs.end (), IsPPR);
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+ std::reverse (PPRBegin, PPREnd);
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+ auto IsZPR = [](const RegPairInfo &c) { return c.Type == RegPairInfo::ZPR; };
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+ auto ZPRBegin = std::find_if (RegPairs.begin (), RegPairs.end (), IsZPR);
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+ auto ZPREnd = std::find_if_not (ZPRBegin, RegPairs.end (), IsZPR);
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+ std::reverse (ZPRBegin, ZPREnd);
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+
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+ for (const RegPairInfo &RPI : RegPairs) {
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unsigned Reg1 = RPI.Reg1 ;
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unsigned Reg2 = RPI.Reg2 ;
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@@ -3191,43 +3204,6 @@ bool AArch64FrameLowering::restoreCalleeSavedRegisters(
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MachineMemOperand::MOLoad, Size, Alignment));
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if (NeedsWinCFI)
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InsertSEH (MIB, TII, MachineInstr::FrameDestroy);
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-
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- return MIB->getIterator ();
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- };
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-
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- if (homogeneousPrologEpilog (MF, &MBB)) {
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- auto MIB = BuildMI (MBB, MBBI, DL, TII.get (AArch64::HOM_Epilog))
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- .setMIFlag (MachineInstr::FrameDestroy);
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- for (auto &RPI : RegPairs) {
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- MIB.addReg (RPI.Reg1 , RegState::Define);
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- MIB.addReg (RPI.Reg2 , RegState::Define);
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- }
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- return true ;
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- }
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-
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- // For performance reasons restore SVE register in increasing order
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- auto IsPPR = [](const RegPairInfo &c) { return c.Type == RegPairInfo::PPR; };
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- auto PPRBegin = std::find_if (RegPairs.begin (), RegPairs.end (), IsPPR);
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- auto PPREnd = std::find_if_not (PPRBegin, RegPairs.end (), IsPPR);
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- std::reverse (PPRBegin, PPREnd);
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- auto IsZPR = [](const RegPairInfo &c) { return c.Type == RegPairInfo::ZPR; };
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- auto ZPRBegin = std::find_if (RegPairs.begin (), RegPairs.end (), IsZPR);
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- auto ZPREnd = std::find_if_not (ZPRBegin, RegPairs.end (), IsZPR);
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- std::reverse (ZPRBegin, ZPREnd);
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-
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- if (ReverseCSRRestoreSeq) {
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- MachineBasicBlock::iterator First = MBB.end ();
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- for (const RegPairInfo &RPI : reverse (RegPairs)) {
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- MachineBasicBlock::iterator It = EmitMI (RPI);
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- if (First == MBB.end ())
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- First = It;
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- }
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- if (First != MBB.end ())
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- MBB.splice (MBBI, &MBB, First);
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- } else {
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- for (const RegPairInfo &RPI : RegPairs) {
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- (void )EmitMI (RPI);
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- }
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}
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return true ;
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