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Add test for loongarch-relax-tls-le.s and modify loongarch-relax-emit-relocs.s
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‎lld/test/ELF/loongarch-relax-emit-relocs.s

Lines changed: 107 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -1,7 +1,7 @@
11
# REQUIRES: loongarch
22
## Test that we can handle --emit-relocs while relaxing.
33

4-
# RUN: llvm-mc --filetype=obj --triple=loongarch32 --mattr=+relax %s -o %t.32.o
4+
# RUN: llvm-mc --filetype=obj --triple=loongarch32 --mattr=+relax --defsym ELF32=1 %s -o %t.32.o
55
# RUN: llvm-mc --filetype=obj --triple=loongarch64 --mattr=+relax %s -o %t.64.o
66
# RUN: ld.lld -Ttext=0x10000 -section-start=.got=0x20000 --emit-relocs --relax %t.32.o -o %t.32
77
# RUN: ld.lld -Ttext=0x10000 -section-start=.got=0x20000 --emit-relocs --relax %t.64.o -o %t.64
@@ -17,19 +17,39 @@
1717
# RUN: llvm-objdump -dr %t.64.norelax | FileCheck %s --check-prefix=NORELAX
1818

1919
# RELAX: 00010000 <_start>:
20-
# RELAX-NEXT: pcaddi $a0, 0
20+
# RELAX-NEXT: pcaddi $a0, 0
2121
# RELAX-NEXT: R_LARCH_RELAX _start
2222
# RELAX-NEXT: R_LARCH_RELAX *ABS*
2323
# RELAX-NEXT: R_LARCH_PCREL20_S2 _start
2424
# RELAX-NEXT: R_LARCH_RELAX *ABS*
25-
# RELAX-NEXT: pcaddi $a0, -1
25+
# RELAX-NEXT: pcaddi $a0, -1
2626
# RELAX-NEXT: R_LARCH_RELAX _start
2727
# RELAX-NEXT: R_LARCH_RELAX *ABS*
2828
# RELAX-NEXT: R_LARCH_PCREL20_S2 _start
2929
# RELAX-NEXT: R_LARCH_RELAX *ABS*
30+
# RELAX-NEXT: lu12i.w $a0, 0
31+
# RELAX-NEXT: R_LARCH_TLS_LE_HI20 a
32+
# RELAX-NEXT: ori $a0, $a0, 0
33+
# RELAX-NEXT: R_LARCH_TLS_LE_LO12 a
34+
# RELAX-NEXT: pcaddi $a0, {{[0-9]+}}
35+
# RELAX-NEXT: R_LARCH_RELAX a
36+
# RELAX-NEXT: R_LARCH_RELAX *ABS*
37+
# RELAX-NEXT: R_LARCH_TLS_GD_PCREL20_S2 a
38+
# RELAX-NEXT: R_LARCH_RELAX *ABS*
39+
# RELAX-NEXT: pcaddi $a0, {{[0-9]+}}
40+
# RELAX-NEXT: R_LARCH_RELAX a
41+
# RELAX-NEXT: R_LARCH_RELAX *ABS*
42+
# RELAX-NEXT: R_LARCH_TLS_LD_PCREL20_S2 a
43+
# RELAX-NEXT: R_LARCH_RELAX *ABS*
44+
# RELAX-NEXT: addi.{{[dw]}} $a0, $tp, 0
45+
# RELAX-NEXT: R_LARCH_RELAX a
46+
# RELAX-NEXT: R_LARCH_RELAX *ABS*
47+
# RELAX-NEXT: R_LARCH_RELAX a
48+
# RELAX-NEXT: R_LARCH_RELAX *ABS*
49+
# RELAX-NEXT: R_LARCH_TLS_LE_LO12_R a
50+
# RELAX-NEXT: R_LARCH_RELAX *ABS*
3051
# RELAX-NEXT: nop
3152
# RELAX-NEXT: R_LARCH_ALIGN *ABS*+0xc
32-
# RELAX-NEXT: nop
3353
# RELAX-NEXT: ret
3454

3555
# NORELAX: <_start>:
@@ -45,8 +65,36 @@
4565
# NORELAX-NEXT: ld.d $a0, $a0, 0
4666
# NORELAX-NEXT: R_LARCH_GOT_PC_LO12 _start
4767
# NORELAX-NEXT: R_LARCH_RELAX *ABS*
48-
# NORELAX-NEXT: ret
68+
# NORELAX-NEXT: lu12i.w $a0, 0
69+
# NORELAX-NEXT: R_LARCH_TLS_LE_HI20 a
70+
# NORELAX-NEXT: ori $a0, $a0, 0
71+
# NORELAX-NEXT: R_LARCH_TLS_LE_LO12 a
72+
# NORELAX-NEXT: pcalau12i $a0, 16
73+
# NORELAX-NEXT: R_LARCH_TLS_GD_PC_HI20 a
74+
# NORELAX-NEXT: R_LARCH_RELAX *ABS*
75+
# NORELAX-NEXT: addi.d $a0, $a0, 8
76+
# NORELAX-NEXT: R_LARCH_GOT_PC_LO12 a
77+
# NORELAX-NEXT: R_LARCH_RELAX *ABS*
78+
# NORELAX-NEXT: pcalau12i $a0, 16
79+
# NORELAX-NEXT: R_LARCH_TLS_LD_PC_HI20 a
80+
# NORELAX-NEXT: R_LARCH_RELAX *ABS*
81+
# NORELAX-NEXT: addi.d $a0, $a0, 8
82+
# NORELAX-NEXT: R_LARCH_GOT_PC_LO12 a
83+
# NORELAX-NEXT: R_LARCH_RELAX *ABS*
84+
# NORELAX-NEXT: lu12i.w $a0, 0
85+
# NORELAX-NEXT: R_LARCH_TLS_LE_HI20_R a
86+
# NORELAX-NEXT: R_LARCH_RELAX *ABS*
87+
# NORELAX-NEXT: add.d $a0, $a0, $tp
88+
# NORELAX-NEXT: R_LARCH_TLS_LE_ADD_R a
89+
# NORELAX-NEXT: R_LARCH_RELAX *ABS*
90+
# NORELAX-NEXT: addi.d $a0, $a0, 0
91+
# NORELAX-NEXT: R_LARCH_TLS_LE_LO12_R a
92+
# NORELAX-NEXT: R_LARCH_RELAX *ABS*
93+
# NORELAX-NEXT: nop
4994
# NORELAX-NEXT: R_LARCH_ALIGN *ABS*+0xc
95+
# NORELAX-NEXT: nop
96+
# NORELAX-NEXT: nop
97+
# NORELAX-NEXT: ret
5098

5199
# CHECKR: <_start>:
52100
# CHECKR-NEXT: pcalau12i $a0, 0
@@ -61,15 +109,69 @@
61109
# CHECKR-NEXT: ld.d $a0, $a0, 0
62110
# CHECKR-NEXT: R_LARCH_GOT_PC_LO12 _start
63111
# CHECKR-NEXT: R_LARCH_RELAX *ABS*
112+
# CHECKR-NEXT: lu12i.w $a0, 0
113+
# CHECKR-NEXT: R_LARCH_TLS_LE_HI20 a
114+
# CHECKR-NEXT: ori $a0, $a0, 0
115+
# CHECKR-NEXT: R_LARCH_TLS_LE_LO12 a
116+
# CHECKR-NEXT: pcalau12i $a0, 0
117+
# CHECKR-NEXT: R_LARCH_TLS_GD_PC_HI20 a
118+
# CHECKR-NEXT: R_LARCH_RELAX *ABS*
119+
# CHECKR-NEXT: addi.d $a0, $a0, 0
120+
# CHECKR-NEXT: R_LARCH_GOT_PC_LO12 a
121+
# CHECKR-NEXT: R_LARCH_RELAX *ABS*
122+
# CHECKR-NEXT: pcalau12i $a0, 0
123+
# CHECKR-NEXT: R_LARCH_TLS_LD_PC_HI20 a
124+
# CHECKR-NEXT: R_LARCH_RELAX *ABS*
125+
# CHECKR-NEXT: addi.d $a0, $a0, 0
126+
# CHECKR-NEXT: R_LARCH_GOT_PC_LO12 a
127+
# CHECKR-NEXT: R_LARCH_RELAX *ABS*
128+
# CHECKR-NEXT: lu12i.w $a0, 0
129+
# CHECKR-NEXT: R_LARCH_TLS_LE_HI20_R a
130+
# CHECKR-NEXT: R_LARCH_RELAX *ABS*
131+
# CHECKR-NEXT: add.d $a0, $a0, $tp
132+
# CHECKR-NEXT: R_LARCH_TLS_LE_ADD_R a
133+
# CHECKR-NEXT: R_LARCH_RELAX *ABS*
134+
# CHECKR-NEXT: addi.d $a0, $a0, 0
135+
# CHECKR-NEXT: R_LARCH_TLS_LE_LO12_R a
136+
# CHECKR-NEXT: R_LARCH_RELAX *ABS*
64137
# CHECKR-NEXT: nop
65138
# CHECKR-NEXT: R_LARCH_ALIGN *ABS*+0xc
66139
# CHECKR-NEXT: nop
67140
# CHECKR-NEXT: nop
68141
# CHECKR-NEXT: ret
69142

143+
.macro add dst, src1, src2, src3
144+
.ifdef ELF32
145+
add.w \dst, \src1, \src2, \src3
146+
.else
147+
add.d \dst, \src1, \src2, \src3
148+
.endif
149+
.endm
150+
.macro addi dst, src1, src2
151+
.ifdef ELF32
152+
addi.w \dst, \src1, \src2
153+
.else
154+
addi.d \dst, \src1, \src2
155+
.endif
156+
.endm
157+
70158
.global _start
71159
_start:
72160
la.pcrel $a0, _start
73161
la.got $a0, _start
162+
163+
la.tls.le $a0, a # without R_LARCH_RELAX reloaction
164+
la.tls.gd $a0, a
165+
la.tls.ld $a0, a
166+
167+
lu12i.w $a0, %le_hi20_r(a)
168+
add $a0, $a0, $tp, %le_add_r(a)
169+
addi $a0, $a0, %le_lo12_r(a)
170+
74171
.p2align 4
75172
ret
173+
174+
.section .tbss,"awT",@nobits
175+
.globl a
176+
a:
177+
.zero 4

‎lld/test/ELF/loongarch-relax-tls-le.s

Lines changed: 115 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,115 @@
1+
# REQUIRES: loongarch
2+
3+
# RUN: llvm-mc --filetype=obj --triple=loongarch32 -mattr=+relax --defsym ELF32=1 %s -o %t.32.o
4+
# RUN: llvm-mc --filetype=obj --triple=loongarch64 -mattr=+relax %s -o %t.64.o
5+
6+
# RUN: ld.lld %t.32.o -o %t.32
7+
# RUN: llvm-objdump -d --no-show-raw-insn %t.32 | FileCheck --check-prefixes=RELAX32 %s
8+
9+
# RUN: ld.lld %t.64.o -o %t.64
10+
# RUN: llvm-objdump -d --no-show-raw-insn %t.64 | FileCheck --check-prefixes=RELAX64 %s
11+
12+
# RELAX32-LABEL: <_start>:
13+
## .LANCHOR0@tprel = 8
14+
# RELAX32-NEXT: addi.w $a0, $tp, 8
15+
# RELAX32-NEXT: ld.w $a1, $a0, 0
16+
# RELAX32-NEXT: ld.w $a2, $tp, 8
17+
## .a@tprel - 4 = 0x7fc
18+
# RELAX32-NEXT: addi.w $a1, $zero, 1
19+
# RELAX32-NEXT: addi.w $a1, $a1, 2
20+
# RELAX32-NEXT: st.w $a1, $tp, 2044
21+
## .a@tprel = 0x800
22+
# RELAX32-NEXT: lu12i.w $a0, 1
23+
# RELAX32-NEXT: add.w $a0, $a0, $tp
24+
# RELAX32-NEXT: addi.w $a0, $a0, -2048
25+
26+
# RELAX64-LABEL: <_start>:
27+
## .LANCHOR0@tprel = 8
28+
# RELAX64-NEXT: addi.d $a0, $tp, 8
29+
# RELAX64-NEXT: ld.d $a1, $a0, 0
30+
# RELAX64-NEXT: ld.d $a2, $tp, 8
31+
## .a@tprel - 4 = 0x7fc
32+
# RELAX64-NEXT: addi.d $a1, $zero, 1
33+
# RELAX64-NEXT: addi.d $a1, $a1, 2
34+
# RELAX64-NEXT: st.d $a1, $tp, 2044
35+
## .a@tprel = 0x800
36+
# RELAX64-NEXT: lu12i.w $a0, 1
37+
# RELAX64-NEXT: add.d $a0, $a0, $tp
38+
# RELAX64-NEXT: addi.d $a0, $a0, -2048
39+
40+
.macro add dst, src1, src2, src3
41+
.ifdef ELF32
42+
add.w \dst, \src1, \src2, \src3
43+
.else
44+
add.d \dst, \src1, \src2, \src3
45+
.endif
46+
.endm
47+
.macro inst op dst, src1, src2
48+
.ifdef ELF32
49+
.ifc \op, addi
50+
addi.w \dst, \src1, \src2
51+
.else; .ifc \op, ld
52+
ld.w \dst, \src1, \src2
53+
.else; .ifc \op, st
54+
st.w \dst, \src1, \src2
55+
.else; .ifc \op, ldptr
56+
ldptr.w \dst, \src1, \src2
57+
.else
58+
.error "Unknown op in ELF32 mode"
59+
.endif; .endif; .endif; .endif
60+
.else
61+
.ifc \op, addi
62+
addi.d \dst, \src1, \src2
63+
.else; .ifc \op, ld
64+
ld.d \dst, \src1, \src2
65+
.else; .ifc \op, st
66+
st.d \dst, \src1, \src2
67+
.else; .ifc \op, ldptr
68+
ldptr.d \dst, \src1, \src2
69+
.else
70+
.error "Unknown op in ELF64 mode"
71+
.endif; .endif; .endif; .endif
72+
.endif
73+
.endm
74+
75+
.macro addi dst, src1, src2
76+
inst addi \dst, \src1, \src2
77+
.endm
78+
.macro ld dst, src1, src2
79+
inst ld \dst, \src1, \src2
80+
.endm
81+
.macro st dst, src1, src2
82+
inst st \dst, \src1, \src2
83+
.endm
84+
.macro ldptr dst, src1, src2
85+
inst ldptr \dst, \src1, \src2
86+
.endm
87+
88+
_start:
89+
## Test instructions not in pairs.
90+
lu12i.w $a0, %le_hi20_r(.LANCHOR0)
91+
add $a0, $a0, $tp, %le_add_r(.LANCHOR0)
92+
addi $a0, $a0, %le_lo12_r(.LANCHOR0)
93+
ld $a1, $a0, 0
94+
ld $a2, $a0, %le_lo12_r(.LANCHOR0)
95+
96+
## hi20(a-4) = hi20(0x7fc) = 0. relaxable
97+
## Test non-adjacent instructions.
98+
lu12i.w $a0, %le_hi20_r(a-4)
99+
addi $a1, $zero, 0x1
100+
add $a0, $a0, $tp, %le_add_r(a-4)
101+
addi $a1, $a1, 0x2
102+
st $a1, $a0, %le_lo12_r(a-4)
103+
104+
## hi20(a) = hi20(0x800) = 1. not relaxable
105+
lu12i.w $a0, %le_hi20_r(a)
106+
add $a0, $a0, $tp, %le_add_r(a)
107+
addi $a0, $a0, %le_lo12_r(a)
108+
109+
.section .tbss,"awT",@nobits
110+
.space 8
111+
.LANCHOR0:
112+
.space 0x800-8
113+
.globl a
114+
a:
115+
.zero 4

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