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[RISCV] Change vector tuple type's TypeSize to scalable (#114329)
Vector tuple is basically multiple grouped vector, so its size is also determined by vscale, we need not to model it as a vector type but its size need to be scalable.
1 parent 8111867 commit 206ee71

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3 files changed

+30
-23
lines changed

3 files changed

+30
-23
lines changed

llvm/include/llvm/CodeGenTypes/MachineValueType.h

Lines changed: 3 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -124,7 +124,7 @@ namespace llvm {
124124

125125
/// Return true if this is a custom target type that has a scalable size.
126126
bool isScalableTargetExtVT() const {
127-
return SimpleTy == MVT::aarch64svcount;
127+
return SimpleTy == MVT::aarch64svcount || isRISCVVectorTuple();
128128
}
129129

130130
/// Return true if the type is a scalable type.
@@ -308,7 +308,8 @@ namespace llvm {
308308
TypeSize getSizeInBits() const {
309309
static constexpr TypeSize SizeTable[] = {
310310
#define GET_VT_ATTR(Ty, N, Sz, Any, Int, FP, Vec, Sc, Tup, NF, NElem, EltTy) \
311-
TypeSize(Sz, Sc || Ty == aarch64svcount /* FIXME: Not in the td. */),
311+
TypeSize(Sz, Sc || Tup || Ty == aarch64svcount /* FIXME: Not in the td. \
312+
*/),
312313
#include "llvm/CodeGen/GenVT.inc"
313314
#undef GET_VT_ATTR
314315
};

llvm/lib/CodeGen/ValueTypes.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -163,7 +163,7 @@ std::string EVT::getEVTString() const {
163163
switch (V.SimpleTy) {
164164
default:
165165
if (isRISCVVectorTuple()) {
166-
unsigned Sz = getSizeInBits();
166+
unsigned Sz = getSizeInBits().getKnownMinValue();
167167
unsigned NF = getRISCVVectorTupleNumFields();
168168
unsigned MinNumElts = Sz / (NF * 8);
169169
return "riscv_nxv" + utostr(MinNumElts) + "i8x" + utostr(NF);

llvm/lib/Target/RISCV/RISCVISelLowering.cpp

Lines changed: 26 additions & 20 deletions
Original file line numberDiff line numberDiff line change
@@ -2411,8 +2411,9 @@ unsigned RISCVTargetLowering::getSubregIndexByMVT(MVT VT, unsigned Index) {
24112411
unsigned RISCVTargetLowering::getRegClassIDForVecVT(MVT VT) {
24122412
if (VT.isRISCVVectorTuple()) {
24132413
unsigned NF = VT.getRISCVVectorTupleNumFields();
2414-
unsigned RegsPerField = std::max(1U, (unsigned)VT.getSizeInBits() /
2415-
(NF * RISCV::RVVBitsPerBlock));
2414+
unsigned RegsPerField =
2415+
std::max(1U, (unsigned)VT.getSizeInBits().getKnownMinValue() /
2416+
(NF * RISCV::RVVBitsPerBlock));
24162417
switch (RegsPerField) {
24172418
case 1:
24182419
if (NF == 2)
@@ -7036,7 +7037,7 @@ SDValue RISCVTargetLowering::LowerOperation(SDValue Op,
70367037
SDLoc DL(Op);
70377038
MVT XLenVT = Subtarget.getXLenVT();
70387039
unsigned NF = VecTy.getRISCVVectorTupleNumFields();
7039-
unsigned Sz = VecTy.getSizeInBits();
7040+
unsigned Sz = VecTy.getSizeInBits().getKnownMinValue();
70407041
unsigned NumElts = Sz / (NF * 8);
70417042
int Log2LMUL = Log2_64(NumElts) - 3;
70427043

@@ -7079,7 +7080,7 @@ SDValue RISCVTargetLowering::LowerOperation(SDValue Op,
70797080
SDLoc DL(Op);
70807081
MVT XLenVT = Subtarget.getXLenVT();
70817082
unsigned NF = VecTy.getRISCVVectorTupleNumFields();
7082-
unsigned Sz = VecTy.getSizeInBits();
7083+
unsigned Sz = VecTy.getSizeInBits().getKnownMinValue();
70837084
unsigned NumElts = Sz / (NF * 8);
70847085
int Log2LMUL = Log2_64(NumElts) - 3;
70857086

@@ -21372,6 +21373,27 @@ bool RISCVTargetLowering::splitValueIntoRegisterParts(
2137221373
return true;
2137321374
}
2137421375

21376+
if (ValueVT.isRISCVVectorTuple() && PartVT.isRISCVVectorTuple()) {
21377+
#ifndef NDEBUG
21378+
unsigned ValNF = ValueVT.getRISCVVectorTupleNumFields();
21379+
[[maybe_unused]] unsigned ValLMUL =
21380+
divideCeil(ValueVT.getSizeInBits().getKnownMinValue(),
21381+
ValNF * RISCV::RVVBitsPerBlock);
21382+
unsigned PartNF = PartVT.getRISCVVectorTupleNumFields();
21383+
[[maybe_unused]] unsigned PartLMUL =
21384+
divideCeil(PartVT.getSizeInBits().getKnownMinValue(),
21385+
PartNF * RISCV::RVVBitsPerBlock);
21386+
assert(ValNF == PartNF && ValLMUL == PartLMUL &&
21387+
"RISC-V vector tuple type only accepts same register class type "
21388+
"TUPLE_INSERT");
21389+
#endif
21390+
21391+
Val = DAG.getNode(RISCVISD::TUPLE_INSERT, DL, PartVT, DAG.getUNDEF(PartVT),
21392+
Val, DAG.getVectorIdxConstant(0, DL));
21393+
Parts[0] = Val;
21394+
return true;
21395+
}
21396+
2137521397
if (ValueVT.isScalableVector() && PartVT.isScalableVector()) {
2137621398
LLVMContext &Context = *DAG.getContext();
2137721399
EVT ValueEltVT = ValueVT.getVectorElementType();
@@ -21407,22 +21429,6 @@ bool RISCVTargetLowering::splitValueIntoRegisterParts(
2140721429
}
2140821430
}
2140921431

21410-
if (ValueVT.isRISCVVectorTuple() && PartVT.isRISCVVectorTuple()) {
21411-
unsigned ValNF = ValueVT.getRISCVVectorTupleNumFields();
21412-
[[maybe_unused]] unsigned ValLMUL =
21413-
divideCeil(ValueVT.getSizeInBits(), ValNF * RISCV::RVVBitsPerBlock);
21414-
unsigned PartNF = PartVT.getRISCVVectorTupleNumFields();
21415-
[[maybe_unused]] unsigned PartLMUL =
21416-
divideCeil(PartVT.getSizeInBits(), PartNF * RISCV::RVVBitsPerBlock);
21417-
assert(ValNF == PartNF && ValLMUL == PartLMUL &&
21418-
"RISC-V vector tuple type only accepts same register class type "
21419-
"TUPLE_INSERT");
21420-
21421-
Val = DAG.getNode(RISCVISD::TUPLE_INSERT, DL, PartVT, DAG.getUNDEF(PartVT),
21422-
Val, DAG.getVectorIdxConstant(0, DL));
21423-
Parts[0] = Val;
21424-
return true;
21425-
}
2142621432
return false;
2142721433
}
2142821434

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