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[ARM] Rename VariantKind to Specifier
Follow the X86, Mips, and RISCV renaming. > "Relocation modifier" suggests adjustments happen during the linker's relocation step rather than the assembler's expression evaluation. > "Relocation specifier" is clear, aligns with Arm and IBM AIX's documentation, and fits the assembler's role seamlessly. In addition, rename *MCExpr::getKind, which confusingly shadows the base class getKind.
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4 files changed

+73
-76
lines changed

4 files changed

+73
-76
lines changed

‎llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp

Lines changed: 22 additions & 23 deletions
Original file line numberDiff line numberDiff line change
@@ -455,7 +455,7 @@ class ARMAsmParser : public MCTargetAsmParser {
455455
bool parseMemory(OperandVector &);
456456
bool parseOperand(OperandVector &, StringRef Mnemonic);
457457
bool parseImmExpr(int64_t &Out);
458-
bool parsePrefix(ARMMCExpr::VariantKind &RefKind);
458+
bool parsePrefix(ARMMCExpr::Specifier &);
459459
bool parseMemRegOffsetShift(ARM_AM::ShiftOpc &ShiftType,
460460
unsigned &ShiftAmount);
461461
bool parseLiteralValues(unsigned Size, SMLoc L);
@@ -1328,8 +1328,8 @@ class ARMOperand : public MCParsedAsmOperand {
13281328
// We want to avoid matching :upper16: and :lower16: as we want these
13291329
// expressions to match in isImm0_65535Expr()
13301330
const ARMMCExpr *ARM16Expr = dyn_cast<ARMMCExpr>(getImm());
1331-
return (!ARM16Expr || (ARM16Expr->getKind() != ARMMCExpr::VK_ARM_HI16 &&
1332-
ARM16Expr->getKind() != ARMMCExpr::VK_ARM_LO16));
1331+
return (!ARM16Expr || (ARM16Expr->getSpecifier() != ARMMCExpr::VK_HI16 &&
1332+
ARM16Expr->getSpecifier() != ARMMCExpr::VK_LO16));
13331333
}
13341334
if (!isImm()) return false;
13351335
const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(getImm());
@@ -6425,16 +6425,15 @@ bool ARMAsmParser::parseOperand(OperandVector &Operands, StringRef Mnemonic) {
64256425
// ":upper8_15:", expression prefixes
64266426
// FIXME: Check it's an expression prefix,
64276427
// e.g. (FOO - :lower16:BAR) isn't legal.
6428-
ARMMCExpr::VariantKind RefKind;
6429-
if (parsePrefix(RefKind))
6428+
ARMMCExpr::Specifier Spec;
6429+
if (parsePrefix(Spec))
64306430
return true;
64316431

64326432
const MCExpr *SubExprVal;
64336433
if (getParser().parseExpression(SubExprVal))
64346434
return true;
64356435

6436-
const MCExpr *ExprVal = ARMMCExpr::create(RefKind, SubExprVal,
6437-
getContext());
6436+
const MCExpr *ExprVal = ARMMCExpr::create(Spec, SubExprVal, getContext());
64386437
E = SMLoc::getFromPointer(Parser.getTok().getLoc().getPointer() - 1);
64396438
Operands.push_back(ARMOperand::CreateImm(ExprVal, S, E, *this));
64406439
return false;
@@ -6473,9 +6472,9 @@ bool ARMAsmParser::parseImmExpr(int64_t &Out) {
64736472
// parsePrefix - Parse ARM 16-bit relocations expression prefixes, i.e.
64746473
// :lower16: and :upper16: and Thumb 8-bit relocation expression prefixes, i.e.
64756474
// :upper8_15:, :upper0_7:, :lower8_15: and :lower0_7:
6476-
bool ARMAsmParser::parsePrefix(ARMMCExpr::VariantKind &RefKind) {
6475+
bool ARMAsmParser::parsePrefix(ARMMCExpr::Specifier &Spec) {
64776476
MCAsmParser &Parser = getParser();
6478-
RefKind = ARMMCExpr::VK_ARM_None;
6477+
Spec = ARMMCExpr::VK_None;
64796478

64806479
// consume an optional '#' (GNU compatibility)
64816480
if (getLexer().is(AsmToken::Hash))
@@ -6497,15 +6496,15 @@ bool ARMAsmParser::parsePrefix(ARMMCExpr::VariantKind &RefKind) {
64976496
};
64986497
static const struct PrefixEntry {
64996498
const char *Spelling;
6500-
ARMMCExpr::VariantKind VariantKind;
6499+
ARMMCExpr::Specifier Spec;
65016500
uint8_t SupportedFormats;
65026501
} PrefixEntries[] = {
6503-
{"upper16", ARMMCExpr::VK_ARM_HI16, COFF | ELF | MACHO},
6504-
{"lower16", ARMMCExpr::VK_ARM_LO16, COFF | ELF | MACHO},
6505-
{"upper8_15", ARMMCExpr::VK_ARM_HI_8_15, ELF},
6506-
{"upper0_7", ARMMCExpr::VK_ARM_HI_0_7, ELF},
6507-
{"lower8_15", ARMMCExpr::VK_ARM_LO_8_15, ELF},
6508-
{"lower0_7", ARMMCExpr::VK_ARM_LO_0_7, ELF},
6502+
{"upper16", ARMMCExpr::VK_HI16, COFF | ELF | MACHO},
6503+
{"lower16", ARMMCExpr::VK_LO16, COFF | ELF | MACHO},
6504+
{"upper8_15", ARMMCExpr::VK_HI_8_15, ELF},
6505+
{"upper0_7", ARMMCExpr::VK_HI_0_7, ELF},
6506+
{"lower8_15", ARMMCExpr::VK_LO_8_15, ELF},
6507+
{"lower0_7", ARMMCExpr::VK_LO_0_7, ELF},
65096508
};
65106509

65116510
StringRef IDVal = Parser.getTok().getIdentifier();
@@ -6547,7 +6546,7 @@ bool ARMAsmParser::parsePrefix(ARMMCExpr::VariantKind &RefKind) {
65476546
return true;
65486547
}
65496548

6550-
RefKind = Prefix->VariantKind;
6549+
Spec = Prefix->Spec;
65516550
Parser.Lex();
65526551

65536552
if (getLexer().isNot(AsmToken::Colon)) {
@@ -6882,10 +6881,10 @@ static bool isThumbI8Relocation(MCParsedAsmOperand &MCOp) {
68826881
if (!E)
68836882
return false;
68846883
const ARMMCExpr *ARM16Expr = dyn_cast<ARMMCExpr>(E);
6885-
if (ARM16Expr && (ARM16Expr->getKind() == ARMMCExpr::VK_ARM_HI_8_15 ||
6886-
ARM16Expr->getKind() == ARMMCExpr::VK_ARM_HI_0_7 ||
6887-
ARM16Expr->getKind() == ARMMCExpr::VK_ARM_LO_8_15 ||
6888-
ARM16Expr->getKind() == ARMMCExpr::VK_ARM_LO_0_7))
6884+
if (ARM16Expr && (ARM16Expr->getSpecifier() == ARMMCExpr::VK_HI_8_15 ||
6885+
ARM16Expr->getSpecifier() == ARMMCExpr::VK_HI_0_7 ||
6886+
ARM16Expr->getSpecifier() == ARMMCExpr::VK_LO_8_15 ||
6887+
ARM16Expr->getSpecifier() == ARMMCExpr::VK_LO_0_7))
68896888
return true;
68906889
return false;
68916890
}
@@ -8289,8 +8288,8 @@ bool ARMAsmParser::validateInstruction(MCInst &Inst,
82898288
const MCExpr *E = dyn_cast<MCExpr>(Op.getImm());
82908289
if (!E) break;
82918290
const ARMMCExpr *ARM16Expr = dyn_cast<ARMMCExpr>(E);
8292-
if (!ARM16Expr || (ARM16Expr->getKind() != ARMMCExpr::VK_ARM_HI16 &&
8293-
ARM16Expr->getKind() != ARMMCExpr::VK_ARM_LO16))
8291+
if (!ARM16Expr || (ARM16Expr->getSpecifier() != ARMMCExpr::VK_HI16 &&
8292+
ARM16Expr->getSpecifier() != ARMMCExpr::VK_LO16))
82948293
return Error(
82958294
Op.getStartLoc(),
82968295
"immediate expression for mov requires :lower16: or :upper16");

‎llvm/lib/Target/ARM/MCTargetDesc/ARMMCCodeEmitter.cpp

Lines changed: 14 additions & 14 deletions
Original file line numberDiff line numberDiff line change
@@ -1200,51 +1200,51 @@ uint32_t ARMMCCodeEmitter::getHiLoImmOpValue(const MCInst &MI, unsigned OpIdx,
12001200
if (Value > UINT32_MAX)
12011201
report_fatal_error("constant value truncated (limited to 32-bit)");
12021202

1203-
switch (ARM16Expr->getKind()) {
1204-
case ARMMCExpr::VK_ARM_HI16:
1203+
switch (ARM16Expr->getSpecifier()) {
1204+
case ARMMCExpr::VK_HI16:
12051205
return (int32_t(Value) & 0xffff0000) >> 16;
1206-
case ARMMCExpr::VK_ARM_LO16:
1206+
case ARMMCExpr::VK_LO16:
12071207
return (int32_t(Value) & 0x0000ffff);
12081208

1209-
case ARMMCExpr::VK_ARM_HI_8_15:
1209+
case ARMMCExpr::VK_HI_8_15:
12101210
return (int32_t(Value) & 0xff000000) >> 24;
1211-
case ARMMCExpr::VK_ARM_HI_0_7:
1211+
case ARMMCExpr::VK_HI_0_7:
12121212
return (int32_t(Value) & 0x00ff0000) >> 16;
1213-
case ARMMCExpr::VK_ARM_LO_8_15:
1213+
case ARMMCExpr::VK_LO_8_15:
12141214
return (int32_t(Value) & 0x0000ff00) >> 8;
1215-
case ARMMCExpr::VK_ARM_LO_0_7:
1215+
case ARMMCExpr::VK_LO_0_7:
12161216
return (int32_t(Value) & 0x000000ff);
12171217

12181218
default: llvm_unreachable("Unsupported ARMFixup");
12191219
}
12201220
}
12211221

1222-
switch (ARM16Expr->getKind()) {
1222+
switch (ARM16Expr->getSpecifier()) {
12231223
default: llvm_unreachable("Unsupported ARMFixup");
1224-
case ARMMCExpr::VK_ARM_HI16:
1224+
case ARMMCExpr::VK_HI16:
12251225
Kind = MCFixupKind(isThumb(STI) ? ARM::fixup_t2_movt_hi16
12261226
: ARM::fixup_arm_movt_hi16);
12271227
break;
1228-
case ARMMCExpr::VK_ARM_LO16:
1228+
case ARMMCExpr::VK_LO16:
12291229
Kind = MCFixupKind(isThumb(STI) ? ARM::fixup_t2_movw_lo16
12301230
: ARM::fixup_arm_movw_lo16);
12311231
break;
1232-
case ARMMCExpr::VK_ARM_HI_8_15:
1232+
case ARMMCExpr::VK_HI_8_15:
12331233
if (!isThumb(STI))
12341234
llvm_unreachable(":upper_8_15: not supported in Arm state");
12351235
Kind = MCFixupKind(ARM::fixup_arm_thumb_upper_8_15);
12361236
break;
1237-
case ARMMCExpr::VK_ARM_HI_0_7:
1237+
case ARMMCExpr::VK_HI_0_7:
12381238
if (!isThumb(STI))
12391239
llvm_unreachable(":upper_0_7: not supported in Arm state");
12401240
Kind = MCFixupKind(ARM::fixup_arm_thumb_upper_0_7);
12411241
break;
1242-
case ARMMCExpr::VK_ARM_LO_8_15:
1242+
case ARMMCExpr::VK_LO_8_15:
12431243
if (!isThumb(STI))
12441244
llvm_unreachable(":lower_8_15: not supported in Arm state");
12451245
Kind = MCFixupKind(ARM::fixup_arm_thumb_lower_8_15);
12461246
break;
1247-
case ARMMCExpr::VK_ARM_LO_0_7:
1247+
case ARMMCExpr::VK_LO_0_7:
12481248
if (!isThumb(STI))
12491249
llvm_unreachable(":lower_0_7: not supported in Arm state");
12501250
Kind = MCFixupKind(ARM::fixup_arm_thumb_lower_0_7);

‎llvm/lib/Target/ARM/MCTargetDesc/ARMMCExpr.cpp

Lines changed: 10 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -13,31 +13,30 @@ using namespace llvm;
1313

1414
#define DEBUG_TYPE "armmcexpr"
1515

16-
const ARMMCExpr*
17-
ARMMCExpr::create(VariantKind Kind, const MCExpr *Expr,
18-
MCContext &Ctx) {
19-
return new (Ctx) ARMMCExpr(Kind, Expr);
16+
const ARMMCExpr *ARMMCExpr::create(Specifier S, const MCExpr *Expr,
17+
MCContext &Ctx) {
18+
return new (Ctx) ARMMCExpr(S, Expr);
2019
}
2120

2221
void ARMMCExpr::printImpl(raw_ostream &OS, const MCAsmInfo *MAI) const {
23-
switch (Kind) {
22+
switch (specifier) {
2423
default: llvm_unreachable("Invalid kind!");
25-
case VK_ARM_HI16:
24+
case VK_HI16:
2625
OS << ":upper16:";
2726
break;
28-
case VK_ARM_LO16:
27+
case VK_LO16:
2928
OS << ":lower16:";
3029
break;
31-
case VK_ARM_HI_8_15:
30+
case VK_HI_8_15:
3231
OS << ":upper8_15:";
3332
break;
34-
case VK_ARM_HI_0_7:
33+
case VK_HI_0_7:
3534
OS << ":upper0_7:";
3635
break;
37-
case VK_ARM_LO_8_15:
36+
case VK_LO_8_15:
3837
OS << ":lower8_15:";
3938
break;
40-
case VK_ARM_LO_0_7:
39+
case VK_LO_0_7:
4140
OS << ":lower0_7:";
4241
break;
4342
}

‎llvm/lib/Target/ARM/MCTargetDesc/ARMMCExpr.h

Lines changed: 27 additions & 28 deletions
Original file line numberDiff line numberDiff line change
@@ -15,67 +15,66 @@ namespace llvm {
1515

1616
class ARMMCExpr : public MCTargetExpr {
1717
public:
18-
enum VariantKind {
19-
VK_ARM_None,
20-
VK_ARM_HI16, // The R_ARM_MOVT_ABS relocation (:upper16: in the .s file)
21-
VK_ARM_LO16, // The R_ARM_MOVW_ABS_NC relocation (:lower16: in the .s file)
22-
23-
VK_ARM_HI_8_15, // The R_ARM_THM_ALU_ABS_G3 relocation (:upper8_15: in
24-
// the .s file)
25-
VK_ARM_HI_0_7, // The R_ARM_THM_ALU_ABS_G2_NC relocation (:upper0_8: in the
26-
// .s file)
27-
VK_ARM_LO_8_15, // The R_ARM_THM_ALU_ABS_G1_NC relocation (:lower8_15: in
28-
// the .s file)
29-
VK_ARM_LO_0_7, // The R_ARM_THM_ALU_ABS_G0_NC relocation (:lower0_7: in the
30-
// .s file)
18+
enum Specifier {
19+
VK_None,
20+
VK_HI16 =
21+
MCSymbolRefExpr::FirstTargetSpecifier, // The R_ARM_MOVT_ABS relocation
22+
// (:upper16: in the .s file)
23+
VK_LO16, // The R_ARM_MOVW_ABS_NC relocation (:lower16: in the .s file)
24+
25+
VK_HI_8_15, // The R_ARM_THM_ALU_ABS_G3 relocation (:upper8_15: in
26+
// the .s file)
27+
VK_HI_0_7, // The R_ARM_THM_ALU_ABS_G2_NC relocation (:upper0_8: in the
28+
// .s file)
29+
VK_LO_8_15, // The R_ARM_THM_ALU_ABS_G1_NC relocation (:lower8_15: in
30+
// the .s file)
31+
VK_LO_0_7, // The R_ARM_THM_ALU_ABS_G0_NC relocation (:lower0_7: in the
32+
// .s file)
3133
};
3234

3335
private:
34-
const VariantKind Kind;
36+
const Specifier specifier;
3537
const MCExpr *Expr;
3638

37-
explicit ARMMCExpr(VariantKind Kind, const MCExpr *Expr)
38-
: Kind(Kind), Expr(Expr) {}
39+
explicit ARMMCExpr(Specifier S, const MCExpr *Expr)
40+
: specifier(S), Expr(Expr) {}
3941

4042
public:
4143
/// @name Construction
4244
/// @{
4345

44-
static const ARMMCExpr *create(VariantKind Kind, const MCExpr *Expr,
45-
MCContext &Ctx);
46+
static const ARMMCExpr *create(Specifier S, const MCExpr *Expr,
47+
MCContext &Ctx);
4648

4749
static const ARMMCExpr *createUpper16(const MCExpr *Expr, MCContext &Ctx) {
48-
return create(VK_ARM_HI16, Expr, Ctx);
50+
return create(VK_HI16, Expr, Ctx);
4951
}
5052

5153
static const ARMMCExpr *createLower16(const MCExpr *Expr, MCContext &Ctx) {
52-
return create(VK_ARM_LO16, Expr, Ctx);
54+
return create(VK_LO16, Expr, Ctx);
5355
}
5456

5557
static const ARMMCExpr *createUpper8_15(const MCExpr *Expr, MCContext &Ctx) {
56-
return create(VK_ARM_HI_8_15, Expr, Ctx);
58+
return create(VK_HI_8_15, Expr, Ctx);
5759
}
5860

5961
static const ARMMCExpr *createUpper0_7(const MCExpr *Expr, MCContext &Ctx) {
60-
return create(VK_ARM_HI_0_7, Expr, Ctx);
62+
return create(VK_HI_0_7, Expr, Ctx);
6163
}
6264

6365
static const ARMMCExpr *createLower8_15(const MCExpr *Expr, MCContext &Ctx) {
64-
return create(VK_ARM_LO_8_15, Expr, Ctx);
66+
return create(VK_LO_8_15, Expr, Ctx);
6567
}
6668

6769
static const ARMMCExpr *createLower0_7(const MCExpr *Expr, MCContext &Ctx) {
68-
return create(VK_ARM_LO_0_7, Expr, Ctx);
70+
return create(VK_LO_0_7, Expr, Ctx);
6971
}
7072

7173
/// @}
7274
/// @name Accessors
7375
/// @{
7476

75-
/// getOpcode - Get the kind of this expression.
76-
VariantKind getKind() const { return Kind; }
77-
78-
/// getSubExpr - Get the child of this expression.
77+
Specifier getSpecifier() const { return specifier; }
7978
const MCExpr *getSubExpr() const { return Expr; }
8079

8180
/// @}

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