Skip to content

Commit 211eace

Browse files
wangpc-ppwangpc-pp
committed
[RISCV] Add test coverage for memmove
1 parent e0a79ee commit 211eace

File tree

1 file changed

+398
-0
lines changed

1 file changed

+398
-0
lines changed

‎llvm/test/CodeGen/RISCV/memmove.ll

Lines changed: 398 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,398 @@
1+
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2+
; RUN: llc < %s -mtriple=riscv32 \
3+
; RUN: | FileCheck %s --check-prefixes=RV32-BOTH,RV32
4+
; RUN: llc < %s -mtriple=riscv64 \
5+
; RUN: | FileCheck %s --check-prefixes=RV64-BOTH,RV64
6+
; RUN: llc < %s -mtriple=riscv32 -mattr=+unaligned-scalar-mem \
7+
; RUN: | FileCheck %s --check-prefixes=RV32-BOTH,RV32-FAST
8+
; RUN: llc < %s -mtriple=riscv64 -mattr=+unaligned-scalar-mem \
9+
; RUN: | FileCheck %s --check-prefixes=RV64-BOTH,RV64-FAST
10+
%struct.x = type { i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8 }
11+
12+
@src = external dso_local global %struct.x
13+
@dst = external dso_local global %struct.x
14+
15+
@.str1 = private unnamed_addr constant [31 x i8] c"DHRYSTONE PROGRAM, SOME STRING\00", align 1
16+
@.str2 = private unnamed_addr constant [36 x i8] c"DHRYSTONE PROGRAM, SOME STRING BLAH\00", align 1
17+
@.str3 = private unnamed_addr constant [24 x i8] c"DHRYSTONE PROGRAM, SOME\00", align 1
18+
@.str4 = private unnamed_addr constant [18 x i8] c"DHRYSTONE PROGR \00", align 1
19+
@.str5 = private unnamed_addr constant [7 x i8] c"DHRYST\00", align 1
20+
@.str6 = private unnamed_addr constant [14 x i8] c"/tmp/rmXXXXXX\00", align 1
21+
@spool.splbuf = internal global [512 x i8] zeroinitializer, align 16
22+
23+
define i32 @t0() {
24+
; RV32-BOTH-LABEL: t0:
25+
; RV32-BOTH: # %bb.0: # %entry
26+
; RV32-BOTH-NEXT: lui a0, %hi(src)
27+
; RV32-BOTH-NEXT: lw a1, %lo(src)(a0)
28+
; RV32-BOTH-NEXT: lui a2, %hi(dst)
29+
; RV32-BOTH-NEXT: addi a0, a0, %lo(src)
30+
; RV32-BOTH-NEXT: sw a1, %lo(dst)(a2)
31+
; RV32-BOTH-NEXT: lw a1, 4(a0)
32+
; RV32-BOTH-NEXT: lh a3, 8(a0)
33+
; RV32-BOTH-NEXT: lbu a0, 10(a0)
34+
; RV32-BOTH-NEXT: addi a2, a2, %lo(dst)
35+
; RV32-BOTH-NEXT: sw a1, 4(a2)
36+
; RV32-BOTH-NEXT: sh a3, 8(a2)
37+
; RV32-BOTH-NEXT: sb a0, 10(a2)
38+
; RV32-BOTH-NEXT: li a0, 0
39+
; RV32-BOTH-NEXT: ret
40+
;
41+
; RV64-BOTH-LABEL: t0:
42+
; RV64-BOTH: # %bb.0: # %entry
43+
; RV64-BOTH-NEXT: lui a0, %hi(src)
44+
; RV64-BOTH-NEXT: lui a1, %hi(dst)
45+
; RV64-BOTH-NEXT: ld a2, %lo(src)(a0)
46+
; RV64-BOTH-NEXT: addi a0, a0, %lo(src)
47+
; RV64-BOTH-NEXT: lh a3, 8(a0)
48+
; RV64-BOTH-NEXT: lbu a0, 10(a0)
49+
; RV64-BOTH-NEXT: sd a2, %lo(dst)(a1)
50+
; RV64-BOTH-NEXT: addi a1, a1, %lo(dst)
51+
; RV64-BOTH-NEXT: sh a3, 8(a1)
52+
; RV64-BOTH-NEXT: sb a0, 10(a1)
53+
; RV64-BOTH-NEXT: li a0, 0
54+
; RV64-BOTH-NEXT: ret
55+
entry:
56+
call void @llvm.memmove.p0.p0.i32(ptr align 8 @dst, ptr align 8 @src, i32 11, i1 false)
57+
ret i32 0
58+
}
59+
60+
define void @t1(ptr nocapture %C) nounwind {
61+
; RV32-BOTH-LABEL: t1:
62+
; RV32-BOTH: # %bb.0: # %entry
63+
; RV32-BOTH-NEXT: lui a1, %hi(.L.str1)
64+
; RV32-BOTH-NEXT: addi a1, a1, %lo(.L.str1)
65+
; RV32-BOTH-NEXT: li a2, 31
66+
; RV32-BOTH-NEXT: tail memmove
67+
;
68+
; RV64-LABEL: t1:
69+
; RV64: # %bb.0: # %entry
70+
; RV64-NEXT: lui a1, %hi(.L.str1)
71+
; RV64-NEXT: addi a1, a1, %lo(.L.str1)
72+
; RV64-NEXT: li a2, 31
73+
; RV64-NEXT: tail memmove
74+
;
75+
; RV64-FAST-LABEL: t1:
76+
; RV64-FAST: # %bb.0: # %entry
77+
; RV64-FAST-NEXT: lui a1, %hi(.L.str1)
78+
; RV64-FAST-NEXT: ld a2, %lo(.L.str1)(a1)
79+
; RV64-FAST-NEXT: addi a1, a1, %lo(.L.str1)
80+
; RV64-FAST-NEXT: lh a3, 28(a1)
81+
; RV64-FAST-NEXT: lbu a4, 30(a1)
82+
; RV64-FAST-NEXT: ld a5, 8(a1)
83+
; RV64-FAST-NEXT: ld a6, 16(a1)
84+
; RV64-FAST-NEXT: lw a1, 24(a1)
85+
; RV64-FAST-NEXT: sh a3, 28(a0)
86+
; RV64-FAST-NEXT: sb a4, 30(a0)
87+
; RV64-FAST-NEXT: sd a2, 0(a0)
88+
; RV64-FAST-NEXT: sd a5, 8(a0)
89+
; RV64-FAST-NEXT: sd a6, 16(a0)
90+
; RV64-FAST-NEXT: sw a1, 24(a0)
91+
; RV64-FAST-NEXT: ret
92+
entry:
93+
tail call void @llvm.memmove.p0.p0.i64(ptr %C, ptr @.str1, i64 31, i1 false)
94+
ret void
95+
}
96+
97+
define void @t2(ptr nocapture %C) nounwind {
98+
; RV32-BOTH-LABEL: t2:
99+
; RV32-BOTH: # %bb.0: # %entry
100+
; RV32-BOTH-NEXT: lui a1, %hi(.L.str2)
101+
; RV32-BOTH-NEXT: addi a1, a1, %lo(.L.str2)
102+
; RV32-BOTH-NEXT: li a2, 36
103+
; RV32-BOTH-NEXT: tail memmove
104+
;
105+
; RV64-LABEL: t2:
106+
; RV64: # %bb.0: # %entry
107+
; RV64-NEXT: lui a1, %hi(.L.str2)
108+
; RV64-NEXT: addi a1, a1, %lo(.L.str2)
109+
; RV64-NEXT: li a2, 36
110+
; RV64-NEXT: tail memmove
111+
;
112+
; RV64-FAST-LABEL: t2:
113+
; RV64-FAST: # %bb.0: # %entry
114+
; RV64-FAST-NEXT: lui a1, %hi(.L.str2)
115+
; RV64-FAST-NEXT: ld a2, %lo(.L.str2)(a1)
116+
; RV64-FAST-NEXT: addi a1, a1, %lo(.L.str2)
117+
; RV64-FAST-NEXT: lw a3, 32(a1)
118+
; RV64-FAST-NEXT: ld a4, 8(a1)
119+
; RV64-FAST-NEXT: ld a5, 16(a1)
120+
; RV64-FAST-NEXT: ld a1, 24(a1)
121+
; RV64-FAST-NEXT: sw a3, 32(a0)
122+
; RV64-FAST-NEXT: sd a2, 0(a0)
123+
; RV64-FAST-NEXT: sd a4, 8(a0)
124+
; RV64-FAST-NEXT: sd a5, 16(a0)
125+
; RV64-FAST-NEXT: sd a1, 24(a0)
126+
; RV64-FAST-NEXT: ret
127+
entry:
128+
tail call void @llvm.memmove.p0.p0.i64(ptr %C, ptr @.str2, i64 36, i1 false)
129+
ret void
130+
}
131+
132+
define void @t3(ptr nocapture %C) nounwind {
133+
; RV32-LABEL: t3:
134+
; RV32: # %bb.0: # %entry
135+
; RV32-NEXT: lui a1, %hi(.L.str3)
136+
; RV32-NEXT: addi a1, a1, %lo(.L.str3)
137+
; RV32-NEXT: li a2, 24
138+
; RV32-NEXT: tail memmove
139+
;
140+
; RV64-LABEL: t3:
141+
; RV64: # %bb.0: # %entry
142+
; RV64-NEXT: lui a1, %hi(.L.str3)
143+
; RV64-NEXT: addi a1, a1, %lo(.L.str3)
144+
; RV64-NEXT: li a2, 24
145+
; RV64-NEXT: tail memmove
146+
;
147+
; RV32-FAST-LABEL: t3:
148+
; RV32-FAST: # %bb.0: # %entry
149+
; RV32-FAST-NEXT: lui a1, %hi(.L.str3)
150+
; RV32-FAST-NEXT: lw a2, %lo(.L.str3)(a1)
151+
; RV32-FAST-NEXT: addi a1, a1, %lo(.L.str3)
152+
; RV32-FAST-NEXT: lw a3, 16(a1)
153+
; RV32-FAST-NEXT: lw a4, 20(a1)
154+
; RV32-FAST-NEXT: lw a5, 4(a1)
155+
; RV32-FAST-NEXT: lw a6, 8(a1)
156+
; RV32-FAST-NEXT: lw a1, 12(a1)
157+
; RV32-FAST-NEXT: sw a3, 16(a0)
158+
; RV32-FAST-NEXT: sw a4, 20(a0)
159+
; RV32-FAST-NEXT: sw a2, 0(a0)
160+
; RV32-FAST-NEXT: sw a5, 4(a0)
161+
; RV32-FAST-NEXT: sw a6, 8(a0)
162+
; RV32-FAST-NEXT: sw a1, 12(a0)
163+
; RV32-FAST-NEXT: ret
164+
;
165+
; RV64-FAST-LABEL: t3:
166+
; RV64-FAST: # %bb.0: # %entry
167+
; RV64-FAST-NEXT: lui a1, %hi(.L.str3)
168+
; RV64-FAST-NEXT: ld a2, %lo(.L.str3)(a1)
169+
; RV64-FAST-NEXT: addi a1, a1, %lo(.L.str3)
170+
; RV64-FAST-NEXT: ld a3, 8(a1)
171+
; RV64-FAST-NEXT: ld a1, 16(a1)
172+
; RV64-FAST-NEXT: sd a2, 0(a0)
173+
; RV64-FAST-NEXT: sd a3, 8(a0)
174+
; RV64-FAST-NEXT: sd a1, 16(a0)
175+
; RV64-FAST-NEXT: ret
176+
entry:
177+
tail call void @llvm.memmove.p0.p0.i64(ptr %C, ptr @.str3, i64 24, i1 false)
178+
ret void
179+
}
180+
181+
define void @t4(ptr nocapture %C) nounwind {
182+
; RV32-LABEL: t4:
183+
; RV32: # %bb.0: # %entry
184+
; RV32-NEXT: lui a1, %hi(.L.str4)
185+
; RV32-NEXT: addi a1, a1, %lo(.L.str4)
186+
; RV32-NEXT: li a2, 18
187+
; RV32-NEXT: tail memmove
188+
;
189+
; RV64-LABEL: t4:
190+
; RV64: # %bb.0: # %entry
191+
; RV64-NEXT: lui a1, %hi(.L.str4)
192+
; RV64-NEXT: addi a1, a1, %lo(.L.str4)
193+
; RV64-NEXT: li a2, 18
194+
; RV64-NEXT: tail memmove
195+
;
196+
; RV32-FAST-LABEL: t4:
197+
; RV32-FAST: # %bb.0: # %entry
198+
; RV32-FAST-NEXT: lui a1, %hi(.L.str4)
199+
; RV32-FAST-NEXT: lw a2, %lo(.L.str4)(a1)
200+
; RV32-FAST-NEXT: addi a1, a1, %lo(.L.str4)
201+
; RV32-FAST-NEXT: lh a3, 16(a1)
202+
; RV32-FAST-NEXT: lw a4, 4(a1)
203+
; RV32-FAST-NEXT: lw a5, 8(a1)
204+
; RV32-FAST-NEXT: lw a1, 12(a1)
205+
; RV32-FAST-NEXT: sh a3, 16(a0)
206+
; RV32-FAST-NEXT: sw a2, 0(a0)
207+
; RV32-FAST-NEXT: sw a4, 4(a0)
208+
; RV32-FAST-NEXT: sw a5, 8(a0)
209+
; RV32-FAST-NEXT: sw a1, 12(a0)
210+
; RV32-FAST-NEXT: ret
211+
;
212+
; RV64-FAST-LABEL: t4:
213+
; RV64-FAST: # %bb.0: # %entry
214+
; RV64-FAST-NEXT: lui a1, %hi(.L.str4)
215+
; RV64-FAST-NEXT: ld a2, %lo(.L.str4)(a1)
216+
; RV64-FAST-NEXT: addi a1, a1, %lo(.L.str4)
217+
; RV64-FAST-NEXT: ld a3, 8(a1)
218+
; RV64-FAST-NEXT: lh a1, 16(a1)
219+
; RV64-FAST-NEXT: sd a2, 0(a0)
220+
; RV64-FAST-NEXT: sd a3, 8(a0)
221+
; RV64-FAST-NEXT: sh a1, 16(a0)
222+
; RV64-FAST-NEXT: ret
223+
entry:
224+
tail call void @llvm.memmove.p0.p0.i64(ptr %C, ptr @.str4, i64 18, i1 false)
225+
ret void
226+
}
227+
228+
define void @t5(ptr nocapture %C) nounwind {
229+
; RV32-LABEL: t5:
230+
; RV32: # %bb.0: # %entry
231+
; RV32-NEXT: lui a1, %hi(.L.str5)
232+
; RV32-NEXT: addi a2, a1, %lo(.L.str5)
233+
; RV32-NEXT: lbu a3, 1(a2)
234+
; RV32-NEXT: lbu a4, 2(a2)
235+
; RV32-NEXT: lbu a5, 3(a2)
236+
; RV32-NEXT: lbu a6, 4(a2)
237+
; RV32-NEXT: lbu a7, 5(a2)
238+
; RV32-NEXT: lbu a2, 6(a2)
239+
; RV32-NEXT: lbu a1, %lo(.L.str5)(a1)
240+
; RV32-NEXT: sb a6, 4(a0)
241+
; RV32-NEXT: sb a7, 5(a0)
242+
; RV32-NEXT: sb a2, 6(a0)
243+
; RV32-NEXT: sb a1, 0(a0)
244+
; RV32-NEXT: sb a3, 1(a0)
245+
; RV32-NEXT: sb a4, 2(a0)
246+
; RV32-NEXT: sb a5, 3(a0)
247+
; RV32-NEXT: ret
248+
;
249+
; RV64-LABEL: t5:
250+
; RV64: # %bb.0: # %entry
251+
; RV64-NEXT: lui a1, %hi(.L.str5)
252+
; RV64-NEXT: addi a2, a1, %lo(.L.str5)
253+
; RV64-NEXT: lbu a3, 1(a2)
254+
; RV64-NEXT: lbu a4, 2(a2)
255+
; RV64-NEXT: lbu a5, 3(a2)
256+
; RV64-NEXT: lbu a6, 4(a2)
257+
; RV64-NEXT: lbu a7, 5(a2)
258+
; RV64-NEXT: lbu a2, 6(a2)
259+
; RV64-NEXT: lbu a1, %lo(.L.str5)(a1)
260+
; RV64-NEXT: sb a6, 4(a0)
261+
; RV64-NEXT: sb a7, 5(a0)
262+
; RV64-NEXT: sb a2, 6(a0)
263+
; RV64-NEXT: sb a1, 0(a0)
264+
; RV64-NEXT: sb a3, 1(a0)
265+
; RV64-NEXT: sb a4, 2(a0)
266+
; RV64-NEXT: sb a5, 3(a0)
267+
; RV64-NEXT: ret
268+
;
269+
; RV32-FAST-LABEL: t5:
270+
; RV32-FAST: # %bb.0: # %entry
271+
; RV32-FAST-NEXT: lui a1, %hi(.L.str5)
272+
; RV32-FAST-NEXT: lw a2, %lo(.L.str5)(a1)
273+
; RV32-FAST-NEXT: addi a1, a1, %lo(.L.str5)
274+
; RV32-FAST-NEXT: lh a3, 4(a1)
275+
; RV32-FAST-NEXT: lbu a1, 6(a1)
276+
; RV32-FAST-NEXT: sw a2, 0(a0)
277+
; RV32-FAST-NEXT: sh a3, 4(a0)
278+
; RV32-FAST-NEXT: sb a1, 6(a0)
279+
; RV32-FAST-NEXT: ret
280+
;
281+
; RV64-FAST-LABEL: t5:
282+
; RV64-FAST: # %bb.0: # %entry
283+
; RV64-FAST-NEXT: lui a1, %hi(.L.str5)
284+
; RV64-FAST-NEXT: lw a2, %lo(.L.str5)(a1)
285+
; RV64-FAST-NEXT: addi a1, a1, %lo(.L.str5)
286+
; RV64-FAST-NEXT: lh a3, 4(a1)
287+
; RV64-FAST-NEXT: lbu a1, 6(a1)
288+
; RV64-FAST-NEXT: sw a2, 0(a0)
289+
; RV64-FAST-NEXT: sh a3, 4(a0)
290+
; RV64-FAST-NEXT: sb a1, 6(a0)
291+
; RV64-FAST-NEXT: ret
292+
entry:
293+
tail call void @llvm.memmove.p0.p0.i64(ptr %C, ptr @.str5, i64 7, i1 false)
294+
ret void
295+
}
296+
297+
define void @t6() nounwind {
298+
; RV32-LABEL: t6:
299+
; RV32: # %bb.0: # %entry
300+
; RV32-NEXT: addi sp, sp, -16
301+
; RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
302+
; RV32-NEXT: lui a0, %hi(spool.splbuf)
303+
; RV32-NEXT: addi a0, a0, %lo(spool.splbuf)
304+
; RV32-NEXT: lui a1, %hi(.L.str6)
305+
; RV32-NEXT: addi a1, a1, %lo(.L.str6)
306+
; RV32-NEXT: li a2, 14
307+
; RV32-NEXT: call memmove
308+
; RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
309+
; RV32-NEXT: addi sp, sp, 16
310+
; RV32-NEXT: ret
311+
;
312+
; RV64-LABEL: t6:
313+
; RV64: # %bb.0: # %entry
314+
; RV64-NEXT: addi sp, sp, -16
315+
; RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
316+
; RV64-NEXT: lui a0, %hi(spool.splbuf)
317+
; RV64-NEXT: addi a0, a0, %lo(spool.splbuf)
318+
; RV64-NEXT: lui a1, %hi(.L.str6)
319+
; RV64-NEXT: addi a1, a1, %lo(.L.str6)
320+
; RV64-NEXT: li a2, 14
321+
; RV64-NEXT: call memmove
322+
; RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
323+
; RV64-NEXT: addi sp, sp, 16
324+
; RV64-NEXT: ret
325+
;
326+
; RV32-FAST-LABEL: t6:
327+
; RV32-FAST: # %bb.0: # %entry
328+
; RV32-FAST-NEXT: lui a0, %hi(.L.str6)
329+
; RV32-FAST-NEXT: lui a1, %hi(spool.splbuf)
330+
; RV32-FAST-NEXT: lw a2, %lo(.L.str6)(a0)
331+
; RV32-FAST-NEXT: addi a0, a0, %lo(.L.str6)
332+
; RV32-FAST-NEXT: lw a3, 4(a0)
333+
; RV32-FAST-NEXT: lw a4, 8(a0)
334+
; RV32-FAST-NEXT: lh a0, 12(a0)
335+
; RV32-FAST-NEXT: sw a2, %lo(spool.splbuf)(a1)
336+
; RV32-FAST-NEXT: sw a3, %lo(spool.splbuf+4)(a1)
337+
; RV32-FAST-NEXT: sw a4, %lo(spool.splbuf+8)(a1)
338+
; RV32-FAST-NEXT: sh a0, %lo(spool.splbuf+12)(a1)
339+
; RV32-FAST-NEXT: ret
340+
;
341+
; RV64-FAST-LABEL: t6:
342+
; RV64-FAST: # %bb.0: # %entry
343+
; RV64-FAST-NEXT: lui a0, %hi(.L.str6)
344+
; RV64-FAST-NEXT: ld a1, %lo(.L.str6)(a0)
345+
; RV64-FAST-NEXT: addi a0, a0, %lo(.L.str6)
346+
; RV64-FAST-NEXT: lw a2, 8(a0)
347+
; RV64-FAST-NEXT: lh a0, 12(a0)
348+
; RV64-FAST-NEXT: lui a3, %hi(spool.splbuf)
349+
; RV64-FAST-NEXT: sd a1, %lo(spool.splbuf)(a3)
350+
; RV64-FAST-NEXT: sw a2, %lo(spool.splbuf+8)(a3)
351+
; RV64-FAST-NEXT: sh a0, %lo(spool.splbuf+12)(a3)
352+
; RV64-FAST-NEXT: ret
353+
entry:
354+
call void @llvm.memmove.p0.p0.i64(ptr @spool.splbuf, ptr @.str6, i64 14, i1 false)
355+
ret void
356+
}
357+
358+
%struct.Foo = type { i32, i32, i32, i32 }
359+
360+
define void @t7(ptr nocapture %a, ptr nocapture %b) nounwind {
361+
; RV32-BOTH-LABEL: t7:
362+
; RV32-BOTH: # %bb.0: # %entry
363+
; RV32-BOTH-NEXT: lw a2, 0(a1)
364+
; RV32-BOTH-NEXT: lw a3, 4(a1)
365+
; RV32-BOTH-NEXT: lw a4, 8(a1)
366+
; RV32-BOTH-NEXT: lw a1, 12(a1)
367+
; RV32-BOTH-NEXT: sw a2, 0(a0)
368+
; RV32-BOTH-NEXT: sw a3, 4(a0)
369+
; RV32-BOTH-NEXT: sw a4, 8(a0)
370+
; RV32-BOTH-NEXT: sw a1, 12(a0)
371+
; RV32-BOTH-NEXT: ret
372+
;
373+
; RV64-LABEL: t7:
374+
; RV64: # %bb.0: # %entry
375+
; RV64-NEXT: lw a2, 0(a1)
376+
; RV64-NEXT: lw a3, 4(a1)
377+
; RV64-NEXT: lw a4, 8(a1)
378+
; RV64-NEXT: lw a1, 12(a1)
379+
; RV64-NEXT: sw a2, 0(a0)
380+
; RV64-NEXT: sw a3, 4(a0)
381+
; RV64-NEXT: sw a4, 8(a0)
382+
; RV64-NEXT: sw a1, 12(a0)
383+
; RV64-NEXT: ret
384+
;
385+
; RV64-FAST-LABEL: t7:
386+
; RV64-FAST: # %bb.0: # %entry
387+
; RV64-FAST-NEXT: ld a2, 0(a1)
388+
; RV64-FAST-NEXT: ld a1, 8(a1)
389+
; RV64-FAST-NEXT: sd a2, 0(a0)
390+
; RV64-FAST-NEXT: sd a1, 8(a0)
391+
; RV64-FAST-NEXT: ret
392+
entry:
393+
tail call void @llvm.memmove.p0.p0.i32(ptr align 4 %a, ptr align 4 %b, i32 16, i1 false)
394+
ret void
395+
}
396+
397+
declare void @llvm.memmove.p0.p0.i32(ptr nocapture, ptr nocapture, i32, i1) nounwind
398+
declare void @llvm.memmove.p0.p0.i64(ptr nocapture, ptr nocapture, i64, i1) nounwind

0 commit comments

Comments
 (0)