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RKSimonRKSimon
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[X86] combine-bitselect.ll - regenerate VPTERNLOG comments
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‎llvm/test/CodeGen/X86/combine-bitselect.ll

Lines changed: 29 additions & 29 deletions
Original file line numberDiff line numberDiff line change
@@ -35,14 +35,14 @@ define <2 x i64> @bitselect_v2i64_rr(<2 x i64>, <2 x i64>) {
3535
; AVX512F-NEXT: # kill: def $xmm1 killed $xmm1 def $zmm1
3636
; AVX512F-NEXT: # kill: def $xmm0 killed $xmm0 def $zmm0
3737
; AVX512F-NEXT: vpmovsxbd {{.*#+}} xmm2 = [4294967295,4294967294,4294967293,4294967292]
38-
; AVX512F-NEXT: vpternlogq $216, %zmm2, %zmm1, %zmm0
38+
; AVX512F-NEXT: vpternlogq {{.*#+}} zmm0 = zmm0 ^ (zmm2 & (zmm0 ^ zmm1))
3939
; AVX512F-NEXT: # kill: def $xmm0 killed $xmm0 killed $zmm0
4040
; AVX512F-NEXT: vzeroupper
4141
; AVX512F-NEXT: retq
4242
;
4343
; AVX512VL-LABEL: bitselect_v2i64_rr:
4444
; AVX512VL: # %bb.0:
45-
; AVX512VL-NEXT: vpternlogq $216, {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm0
45+
; AVX512VL-NEXT: vpternlogq {{.*#+}} xmm0 = xmm0 ^ (mem & (xmm0 ^ xmm1))
4646
; AVX512VL-NEXT: retq
4747
%3 = and <2 x i64> %0, <i64 4294967296, i64 12884901890>
4848
%4 = and <2 x i64> %1, <i64 -4294967297, i64 -12884901891>
@@ -78,15 +78,15 @@ define <2 x i64> @bitselect_v2i64_rm(<2 x i64>, ptr nocapture readonly) {
7878
; AVX512F-NEXT: # kill: def $xmm0 killed $xmm0 def $zmm0
7979
; AVX512F-NEXT: vmovdqa (%rdi), %xmm1
8080
; AVX512F-NEXT: vpmovsxbd {{.*#+}} xmm2 = [4294967294,4294967293,4294967292,4294967295]
81-
; AVX512F-NEXT: vpternlogq $184, %zmm1, %zmm2, %zmm0
81+
; AVX512F-NEXT: vpternlogq {{.*#+}} zmm0 = zmm0 ^ (zmm2 & (zmm0 ^ zmm1))
8282
; AVX512F-NEXT: # kill: def $xmm0 killed $xmm0 killed $zmm0
8383
; AVX512F-NEXT: vzeroupper
8484
; AVX512F-NEXT: retq
8585
;
8686
; AVX512VL-LABEL: bitselect_v2i64_rm:
8787
; AVX512VL: # %bb.0:
8888
; AVX512VL-NEXT: vmovdqa (%rdi), %xmm1
89-
; AVX512VL-NEXT: vpternlogq $216, {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm0
89+
; AVX512VL-NEXT: vpternlogq {{.*#+}} xmm0 = xmm0 ^ (mem & (xmm0 ^ xmm1))
9090
; AVX512VL-NEXT: retq
9191
%3 = load <2 x i64>, ptr %1
9292
%4 = and <2 x i64> %0, <i64 8589934593, i64 3>
@@ -123,15 +123,15 @@ define <2 x i64> @bitselect_v2i64_mr(ptr nocapture readonly, <2 x i64>) {
123123
; AVX512F-NEXT: # kill: def $xmm0 killed $xmm0 def $zmm0
124124
; AVX512F-NEXT: vmovdqa (%rdi), %xmm1
125125
; AVX512F-NEXT: vpmovsxbd {{.*#+}} xmm2 = [2,3,0,1]
126-
; AVX512F-NEXT: vpternlogq $184, %zmm1, %zmm2, %zmm0
126+
; AVX512F-NEXT: vpternlogq {{.*#+}} zmm0 = zmm0 ^ (zmm2 & (zmm0 ^ zmm1))
127127
; AVX512F-NEXT: # kill: def $xmm0 killed $xmm0 killed $zmm0
128128
; AVX512F-NEXT: vzeroupper
129129
; AVX512F-NEXT: retq
130130
;
131131
; AVX512VL-LABEL: bitselect_v2i64_mr:
132132
; AVX512VL: # %bb.0:
133133
; AVX512VL-NEXT: vmovdqa (%rdi), %xmm1
134-
; AVX512VL-NEXT: vpternlogq $216, {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm0
134+
; AVX512VL-NEXT: vpternlogq {{.*#+}} xmm0 = xmm0 ^ (mem & (xmm0 ^ xmm1))
135135
; AVX512VL-NEXT: retq
136136
%3 = load <2 x i64>, ptr %0
137137
%4 = and <2 x i64> %3, <i64 12884901890, i64 4294967296>
@@ -171,7 +171,7 @@ define <2 x i64> @bitselect_v2i64_mm(ptr nocapture readonly, ptr nocapture reado
171171
; AVX512F-NEXT: vmovdqa (%rdi), %xmm1
172172
; AVX512F-NEXT: vmovdqa (%rsi), %xmm0
173173
; AVX512F-NEXT: vpmovsxbd {{.*#+}} xmm2 = [4294967292,4294967295,4294967294,4294967293]
174-
; AVX512F-NEXT: vpternlogq $226, %zmm1, %zmm2, %zmm0
174+
; AVX512F-NEXT: vpternlogq {{.*#+}} zmm0 = zmm1 ^ (zmm2 & (zmm0 ^ zmm1))
175175
; AVX512F-NEXT: # kill: def $xmm0 killed $xmm0 killed $zmm0
176176
; AVX512F-NEXT: vzeroupper
177177
; AVX512F-NEXT: retq
@@ -180,7 +180,7 @@ define <2 x i64> @bitselect_v2i64_mm(ptr nocapture readonly, ptr nocapture reado
180180
; AVX512VL: # %bb.0:
181181
; AVX512VL-NEXT: vmovdqa (%rsi), %xmm1
182182
; AVX512VL-NEXT: vpmovsxbd {{.*#+}} xmm0 = [4294967292,4294967295,4294967294,4294967293]
183-
; AVX512VL-NEXT: vpternlogq $202, (%rdi), %xmm1, %xmm0
183+
; AVX512VL-NEXT: vpternlogq {{.*#+}} xmm0 = mem ^ (xmm0 & (xmm1 ^ mem))
184184
; AVX512VL-NEXT: retq
185185
%3 = load <2 x i64>, ptr %0
186186
%4 = load <2 x i64>, ptr %1
@@ -237,7 +237,7 @@ define <2 x i64> @bitselect_v2i64_broadcast_rrr(<2 x i64> %a0, <2 x i64> %a1, i6
237237
; AVX512VL-LABEL: bitselect_v2i64_broadcast_rrr:
238238
; AVX512VL: # %bb.0:
239239
; AVX512VL-NEXT: vpbroadcastq %rdi, %xmm2
240-
; AVX512VL-NEXT: vpternlogq $226, %xmm1, %xmm2, %xmm0
240+
; AVX512VL-NEXT: vpternlogq {{.*#+}} xmm0 = xmm1 ^ (xmm2 & (xmm0 ^ xmm1))
241241
; AVX512VL-NEXT: retq
242242
%1 = insertelement <2 x i64> undef, i64 %a2, i32 0
243243
%2 = shufflevector <2 x i64> %1, <2 x i64> undef, <2 x i32> zeroinitializer
@@ -283,7 +283,7 @@ define <2 x i64> @bitselect_v2i64_broadcast_rrm(<2 x i64> %a0, <2 x i64> %a1, pt
283283
;
284284
; AVX512VL-LABEL: bitselect_v2i64_broadcast_rrm:
285285
; AVX512VL: # %bb.0:
286-
; AVX512VL-NEXT: vpternlogq $228, (%rdi){1to2}, %xmm1, %xmm0
286+
; AVX512VL-NEXT: vpternlogq {{.*#+}} xmm0 = xmm1 ^ (mem & (xmm0 ^ xmm1))
287287
; AVX512VL-NEXT: retq
288288
%a2 = load i64, ptr %p2
289289
%1 = insertelement <2 x i64> undef, i64 %a2, i32 0
@@ -328,13 +328,13 @@ define <4 x i64> @bitselect_v4i64_rr(<4 x i64>, <4 x i64>) {
328328
; AVX512F-NEXT: # kill: def $ymm1 killed $ymm1 def $zmm1
329329
; AVX512F-NEXT: # kill: def $ymm0 killed $ymm0 def $zmm0
330330
; AVX512F-NEXT: vpmovsxbd {{.*#+}} ymm2 = [4294967295,4294967294,4294967293,4294967292,4294967293,4294967292,4294967293,4294967292]
331-
; AVX512F-NEXT: vpternlogq $216, %zmm2, %zmm1, %zmm0
331+
; AVX512F-NEXT: vpternlogq {{.*#+}} zmm0 = zmm0 ^ (zmm2 & (zmm0 ^ zmm1))
332332
; AVX512F-NEXT: # kill: def $ymm0 killed $ymm0 killed $zmm0
333333
; AVX512F-NEXT: retq
334334
;
335335
; AVX512VL-LABEL: bitselect_v4i64_rr:
336336
; AVX512VL: # %bb.0:
337-
; AVX512VL-NEXT: vpternlogq $216, {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm1, %ymm0
337+
; AVX512VL-NEXT: vpternlogq {{.*#+}} ymm0 = ymm0 ^ (mem & (ymm0 ^ ymm1))
338338
; AVX512VL-NEXT: retq
339339
%3 = and <4 x i64> %0, <i64 4294967296, i64 12884901890, i64 12884901890, i64 12884901890>
340340
%4 = and <4 x i64> %1, <i64 -4294967297, i64 -12884901891, i64 -12884901891, i64 -12884901891>
@@ -378,14 +378,14 @@ define <4 x i64> @bitselect_v4i64_rm(<4 x i64>, ptr nocapture readonly) {
378378
; AVX512F-NEXT: # kill: def $ymm0 killed $ymm0 def $zmm0
379379
; AVX512F-NEXT: vmovdqa (%rdi), %ymm1
380380
; AVX512F-NEXT: vpmovsxbd {{.*#+}} ymm2 = [4294967294,4294967293,4294967292,4294967295,4294967294,4294967293,4294967292,4294967295]
381-
; AVX512F-NEXT: vpternlogq $184, %zmm1, %zmm2, %zmm0
381+
; AVX512F-NEXT: vpternlogq {{.*#+}} zmm0 = zmm0 ^ (zmm2 & (zmm0 ^ zmm1))
382382
; AVX512F-NEXT: # kill: def $ymm0 killed $ymm0 killed $zmm0
383383
; AVX512F-NEXT: retq
384384
;
385385
; AVX512VL-LABEL: bitselect_v4i64_rm:
386386
; AVX512VL: # %bb.0:
387387
; AVX512VL-NEXT: vmovdqa (%rdi), %ymm1
388-
; AVX512VL-NEXT: vpternlogq $216, {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm1, %ymm0
388+
; AVX512VL-NEXT: vpternlogq {{.*#+}} ymm0 = ymm0 ^ (mem & (ymm0 ^ ymm1))
389389
; AVX512VL-NEXT: retq
390390
%3 = load <4 x i64>, ptr %1
391391
%4 = and <4 x i64> %0, <i64 8589934593, i64 3, i64 8589934593, i64 3>
@@ -430,14 +430,14 @@ define <4 x i64> @bitselect_v4i64_mr(ptr nocapture readonly, <4 x i64>) {
430430
; AVX512F-NEXT: # kill: def $ymm0 killed $ymm0 def $zmm0
431431
; AVX512F-NEXT: vmovdqa (%rdi), %ymm1
432432
; AVX512F-NEXT: vpmovsxbd {{.*#+}} ymm2 = [2,3,0,1,2,3,0,1]
433-
; AVX512F-NEXT: vpternlogq $184, %zmm1, %zmm2, %zmm0
433+
; AVX512F-NEXT: vpternlogq {{.*#+}} zmm0 = zmm0 ^ (zmm2 & (zmm0 ^ zmm1))
434434
; AVX512F-NEXT: # kill: def $ymm0 killed $ymm0 killed $zmm0
435435
; AVX512F-NEXT: retq
436436
;
437437
; AVX512VL-LABEL: bitselect_v4i64_mr:
438438
; AVX512VL: # %bb.0:
439439
; AVX512VL-NEXT: vmovdqa (%rdi), %ymm1
440-
; AVX512VL-NEXT: vpternlogq $216, {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm1, %ymm0
440+
; AVX512VL-NEXT: vpternlogq {{.*#+}} ymm0 = ymm0 ^ (mem & (ymm0 ^ ymm1))
441441
; AVX512VL-NEXT: retq
442442
%3 = load <4 x i64>, ptr %0
443443
%4 = and <4 x i64> %3, <i64 12884901890, i64 4294967296, i64 12884901890, i64 4294967296>
@@ -483,15 +483,15 @@ define <4 x i64> @bitselect_v4i64_mm(ptr nocapture readonly, ptr nocapture reado
483483
; AVX512F-NEXT: vmovdqa (%rdi), %ymm1
484484
; AVX512F-NEXT: vmovdqa (%rsi), %ymm0
485485
; AVX512F-NEXT: vpmovsxbd {{.*#+}} ymm2 = [4294967292,4294967295,4294967294,4294967293,4294967292,4294967295,4294967294,4294967293]
486-
; AVX512F-NEXT: vpternlogq $226, %zmm1, %zmm2, %zmm0
486+
; AVX512F-NEXT: vpternlogq {{.*#+}} zmm0 = zmm1 ^ (zmm2 & (zmm0 ^ zmm1))
487487
; AVX512F-NEXT: # kill: def $ymm0 killed $ymm0 killed $zmm0
488488
; AVX512F-NEXT: retq
489489
;
490490
; AVX512VL-LABEL: bitselect_v4i64_mm:
491491
; AVX512VL: # %bb.0:
492492
; AVX512VL-NEXT: vmovdqa (%rsi), %ymm1
493493
; AVX512VL-NEXT: vpmovsxbd {{.*#+}} ymm0 = [4294967292,4294967295,4294967294,4294967293,4294967292,4294967295,4294967294,4294967293]
494-
; AVX512VL-NEXT: vpternlogq $202, (%rdi), %ymm1, %ymm0
494+
; AVX512VL-NEXT: vpternlogq {{.*#+}} ymm0 = mem ^ (ymm0 & (ymm1 ^ mem))
495495
; AVX512VL-NEXT: retq
496496
%3 = load <4 x i64>, ptr %0
497497
%4 = load <4 x i64>, ptr %1
@@ -554,7 +554,7 @@ define <4 x i64> @bitselect_v4i64_broadcast_rrr(<4 x i64> %a0, <4 x i64> %a1, i6
554554
; AVX512VL-LABEL: bitselect_v4i64_broadcast_rrr:
555555
; AVX512VL: # %bb.0:
556556
; AVX512VL-NEXT: vpbroadcastq %rdi, %ymm2
557-
; AVX512VL-NEXT: vpternlogq $226, %ymm1, %ymm2, %ymm0
557+
; AVX512VL-NEXT: vpternlogq {{.*#+}} ymm0 = ymm1 ^ (ymm2 & (ymm0 ^ ymm1))
558558
; AVX512VL-NEXT: retq
559559
%1 = insertelement <4 x i64> undef, i64 %a2, i32 0
560560
%2 = shufflevector <4 x i64> %1, <4 x i64> undef, <4 x i32> zeroinitializer
@@ -604,7 +604,7 @@ define <4 x i64> @bitselect_v4i64_broadcast_rrm(<4 x i64> %a0, <4 x i64> %a1, pt
604604
;
605605
; AVX512VL-LABEL: bitselect_v4i64_broadcast_rrm:
606606
; AVX512VL: # %bb.0:
607-
; AVX512VL-NEXT: vpternlogq $228, (%rdi){1to4}, %ymm1, %ymm0
607+
; AVX512VL-NEXT: vpternlogq {{.*#+}} ymm0 = ymm1 ^ (mem & (ymm0 ^ ymm1))
608608
; AVX512VL-NEXT: retq
609609
%a2 = load i64, ptr %p2
610610
%1 = insertelement <4 x i64> undef, i64 %a2, i32 0
@@ -666,7 +666,7 @@ define <8 x i64> @bitselect_v8i64_rr(<8 x i64>, <8 x i64>) {
666666
;
667667
; AVX512-LABEL: bitselect_v8i64_rr:
668668
; AVX512: # %bb.0:
669-
; AVX512-NEXT: vpternlogq $216, {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %zmm1, %zmm0
669+
; AVX512-NEXT: vpternlogq {{.*#+}} zmm0 = zmm0 ^ (mem & (zmm0 ^ zmm1))
670670
; AVX512-NEXT: retq
671671
%3 = and <8 x i64> %0, <i64 4294967296, i64 12884901890, i64 12884901890, i64 12884901890, i64 4294967296, i64 12884901890, i64 12884901890, i64 12884901890>
672672
%4 = and <8 x i64> %1, <i64 -4294967297, i64 -12884901891, i64 -12884901891, i64 -12884901891, i64 -4294967297, i64 -12884901891, i64 -12884901891, i64 -12884901891>
@@ -728,7 +728,7 @@ define <8 x i64> @bitselect_v8i64_rm(<8 x i64>, ptr nocapture readonly) {
728728
; AVX512-LABEL: bitselect_v8i64_rm:
729729
; AVX512: # %bb.0:
730730
; AVX512-NEXT: vmovdqa64 (%rdi), %zmm1
731-
; AVX512-NEXT: vpternlogq $216, {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %zmm1, %zmm0
731+
; AVX512-NEXT: vpternlogq {{.*#+}} zmm0 = zmm0 ^ (mem & (zmm0 ^ zmm1))
732732
; AVX512-NEXT: retq
733733
%3 = load <8 x i64>, ptr %1
734734
%4 = and <8 x i64> %0, <i64 8589934593, i64 3, i64 8589934593, i64 3, i64 8589934593, i64 3, i64 8589934593, i64 3>
@@ -791,7 +791,7 @@ define <8 x i64> @bitselect_v8i64_mr(ptr nocapture readonly, <8 x i64>) {
791791
; AVX512-LABEL: bitselect_v8i64_mr:
792792
; AVX512: # %bb.0:
793793
; AVX512-NEXT: vmovdqa64 (%rdi), %zmm1
794-
; AVX512-NEXT: vpternlogq $216, {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %zmm1, %zmm0
794+
; AVX512-NEXT: vpternlogq {{.*#+}} zmm0 = zmm0 ^ (mem & (zmm0 ^ zmm1))
795795
; AVX512-NEXT: retq
796796
%3 = load <8 x i64>, ptr %0
797797
%4 = and <8 x i64> %3, <i64 12884901890, i64 4294967296, i64 12884901890, i64 4294967296, i64 12884901890, i64 4294967296, i64 12884901890, i64 4294967296>
@@ -852,7 +852,7 @@ define <8 x i64> @bitselect_v8i64_mm(ptr nocapture readonly, ptr nocapture reado
852852
; AVX512-NEXT: vmovdqa64 (%rsi), %zmm1
853853
; AVX512-NEXT: vbroadcasti32x4 {{.*#+}} zmm0 = [18446744073709551612,18446744065119617022,18446744073709551612,18446744065119617022,18446744073709551612,18446744065119617022,18446744073709551612,18446744065119617022]
854854
; AVX512-NEXT: # zmm0 = mem[0,1,2,3,0,1,2,3,0,1,2,3,0,1,2,3]
855-
; AVX512-NEXT: vpternlogq $202, (%rdi), %zmm1, %zmm0
855+
; AVX512-NEXT: vpternlogq {{.*#+}} zmm0 = mem ^ (zmm0 & (zmm1 ^ mem))
856856
; AVX512-NEXT: retq
857857
%3 = load <8 x i64>, ptr %0
858858
%4 = load <8 x i64>, ptr %1
@@ -921,7 +921,7 @@ define <8 x i64> @bitselect_v8i64_broadcast_rrr(<8 x i64> %a0, <8 x i64> %a1, i6
921921
; AVX512-LABEL: bitselect_v8i64_broadcast_rrr:
922922
; AVX512: # %bb.0:
923923
; AVX512-NEXT: vpbroadcastq %rdi, %zmm2
924-
; AVX512-NEXT: vpternlogq $226, %zmm1, %zmm2, %zmm0
924+
; AVX512-NEXT: vpternlogq {{.*#+}} zmm0 = zmm1 ^ (zmm2 & (zmm0 ^ zmm1))
925925
; AVX512-NEXT: retq
926926
%1 = insertelement <8 x i64> undef, i64 %a2, i32 0
927927
%2 = shufflevector <8 x i64> %1, <8 x i64> undef, <8 x i32> zeroinitializer
@@ -975,7 +975,7 @@ define <8 x i64> @bitselect_v8i64_broadcast_rrm(<8 x i64> %a0, <8 x i64> %a1, pt
975975
;
976976
; AVX512-LABEL: bitselect_v8i64_broadcast_rrm:
977977
; AVX512: # %bb.0:
978-
; AVX512-NEXT: vpternlogq $228, (%rdi){1to8}, %zmm1, %zmm0
978+
; AVX512-NEXT: vpternlogq {{.*#+}} zmm0 = zmm1 ^ (mem & (zmm0 ^ zmm1))
979979
; AVX512-NEXT: retq
980980
%a2 = load i64, ptr %p2
981981
%1 = insertelement <8 x i64> undef, i64 %a2, i32 0
@@ -1040,7 +1040,7 @@ define <4 x i1> @bitselect_v4i1_loop(<4 x i32> %a0, <4 x i32> %a1) {
10401040
; AVX512F-NEXT: vptestnmd %zmm0, %zmm0, %k0 {%k2}
10411041
; AVX512F-NEXT: vptestmd %zmm0, %zmm0, %k1 {%k1}
10421042
; AVX512F-NEXT: korw %k0, %k1, %k1
1043-
; AVX512F-NEXT: vpternlogd $255, %zmm0, %zmm0, %zmm0 {%k1} {z}
1043+
; AVX512F-NEXT: vpternlogd {{.*#+}} zmm0 {%k1} {z} = -1
10441044
; AVX512F-NEXT: # kill: def $xmm0 killed $xmm0 killed $zmm0
10451045
; AVX512F-NEXT: vzeroupper
10461046
; AVX512F-NEXT: retq
@@ -1147,7 +1147,7 @@ define void @constantfold_andn_mask() nounwind {
11471147
; AVX512F-NEXT: vpand %xmm2, %xmm0, %xmm0
11481148
; AVX512F-NEXT: vpavgb %xmm2, %xmm0, %xmm0
11491149
; AVX512F-NEXT: vpandn %xmm1, %xmm0, %xmm0
1150-
; AVX512F-NEXT: vpternlogq $184, %zmm1, %zmm2, %zmm0
1150+
; AVX512F-NEXT: vpternlogq {{.*#+}} zmm0 = zmm0 ^ (zmm2 & (zmm0 ^ zmm1))
11511151
; AVX512F-NEXT: movabsq $87960930222080, %rax # imm = 0x500000000000
11521152
; AVX512F-NEXT: xorq d@GOTPCREL(%rip), %rax
11531153
; AVX512F-NEXT: vmovdqa %xmm0, (%rax)
@@ -1164,7 +1164,7 @@ define void @constantfold_andn_mask() nounwind {
11641164
; AVX512VL-NEXT: vpand %xmm2, %xmm0, %xmm0
11651165
; AVX512VL-NEXT: vpavgb %xmm2, %xmm0, %xmm0
11661166
; AVX512VL-NEXT: vpandn %xmm1, %xmm0, %xmm0
1167-
; AVX512VL-NEXT: vpternlogq $216, %xmm2, %xmm1, %xmm0
1167+
; AVX512VL-NEXT: vpternlogq {{.*#+}} xmm0 = xmm0 ^ (xmm2 & (xmm0 ^ xmm1))
11681168
; AVX512VL-NEXT: movabsq $87960930222080, %rax # imm = 0x500000000000
11691169
; AVX512VL-NEXT: xorq d@GOTPCREL(%rip), %rax
11701170
; AVX512VL-NEXT: vmovdqa %xmm0, (%rax)

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