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Pre-commit tests for absolute difference
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  • llvm/test/CodeGen/LoongArch

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‎llvm/test/CodeGen/LoongArch/lasx/ir-instruction/absd.ll

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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=loongarch64 -mattr=+lasx < %s | FileCheck %s
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;; Mostly copy from AArch64/neon-abd.ll
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;
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; VABDS_[B/H/W/D]
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;
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define <32 x i8> @xvabsd_b(<32 x i8> %a, <32 x i8> %b) #0 {
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; CHECK-LABEL: xvabsd_b:
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; CHECK: # %bb.0:
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; CHECK-NEXT: xvmin.b $xr2, $xr0, $xr1
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; CHECK-NEXT: xvmax.b $xr0, $xr0, $xr1
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; CHECK-NEXT: xvsub.b $xr0, $xr0, $xr2
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; CHECK-NEXT: ret
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%a.sext = sext <32 x i8> %a to <32 x i16>
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%b.sext = sext <32 x i8> %b to <32 x i16>
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%sub = sub <32 x i16> %a.sext, %b.sext
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%abs = call <32 x i16> @llvm.abs.v32i16(<32 x i16> %sub, i1 true)
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%trunc = trunc <32 x i16> %abs to <32 x i8>
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ret <32 x i8> %trunc
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}
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define <16 x i16> @xvabsd_h(<16 x i16> %a, <16 x i16> %b) #0 {
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; CHECK-LABEL: xvabsd_h:
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; CHECK: # %bb.0:
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; CHECK-NEXT: xvmin.h $xr2, $xr0, $xr1
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; CHECK-NEXT: xvmax.h $xr0, $xr0, $xr1
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; CHECK-NEXT: xvsub.h $xr0, $xr0, $xr2
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; CHECK-NEXT: ret
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%a.sext = sext <16 x i16> %a to <16 x i32>
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%b.sext = sext <16 x i16> %b to <16 x i32>
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%sub = sub <16 x i32> %a.sext, %b.sext
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%abs = call <16 x i32> @llvm.abs.v16i32(<16 x i32> %sub, i1 true)
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%trunc = trunc <16 x i32> %abs to <16 x i16>
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ret <16 x i16> %trunc
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}
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define <8 x i32> @xvabsd_w(<8 x i32> %a, <8 x i32> %b) #0 {
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; CHECK-LABEL: xvabsd_w:
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; CHECK: # %bb.0:
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; CHECK-NEXT: xvmin.w $xr2, $xr0, $xr1
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; CHECK-NEXT: xvmax.w $xr0, $xr0, $xr1
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; CHECK-NEXT: xvsub.w $xr0, $xr0, $xr2
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; CHECK-NEXT: ret
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%a.sext = sext <8 x i32> %a to <8 x i64>
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%b.sext = sext <8 x i32> %b to <8 x i64>
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%sub = sub <8 x i64> %a.sext, %b.sext
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%abs = call <8 x i64> @llvm.abs.v8i64(<8 x i64> %sub, i1 true)
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%trunc = trunc <8 x i64> %abs to <8 x i32>
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ret <8 x i32> %trunc
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}
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define <4 x i64> @xvabsd_d(<4 x i64> %a, <4 x i64> %b) #0 {
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; CHECK-LABEL: xvabsd_d:
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; CHECK: # %bb.0:
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; CHECK-NEXT: xvmin.d $xr2, $xr0, $xr1
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; CHECK-NEXT: xvmax.d $xr0, $xr0, $xr1
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; CHECK-NEXT: xvsub.d $xr0, $xr0, $xr2
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; CHECK-NEXT: ret
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%a.sext = sext <4 x i64> %a to <4 x i128>
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%b.sext = sext <4 x i64> %b to <4 x i128>
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%sub = sub <4 x i128> %a.sext, %b.sext
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%abs = call <4 x i128> @llvm.abs.v4i128(<4 x i128> %sub, i1 true)
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%trunc = trunc <4 x i128> %abs to <4 x i64>
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ret <4 x i64> %trunc
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}
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;
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; xvabsd_[B/H/W/D]U
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;
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define <32 x i8> @xvabsd_bu(<32 x i8> %a, <32 x i8> %b) #0 {
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; CHECK-LABEL: xvabsd_bu:
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; CHECK: # %bb.0:
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; CHECK-NEXT: xvmin.bu $xr2, $xr0, $xr1
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; CHECK-NEXT: xvmax.bu $xr0, $xr0, $xr1
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; CHECK-NEXT: xvsub.b $xr0, $xr0, $xr2
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; CHECK-NEXT: ret
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%a.zext = zext <32 x i8> %a to <32 x i16>
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%b.zext = zext <32 x i8> %b to <32 x i16>
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%sub = sub <32 x i16> %a.zext, %b.zext
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%abs = call <32 x i16> @llvm.abs.v32i16(<32 x i16> %sub, i1 true)
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%trunc = trunc <32 x i16> %abs to <32 x i8>
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ret <32 x i8> %trunc
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}
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define <16 x i16> @xvabsd_hu(<16 x i16> %a, <16 x i16> %b) #0 {
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; CHECK-LABEL: xvabsd_hu:
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; CHECK: # %bb.0:
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; CHECK-NEXT: xvmin.hu $xr2, $xr0, $xr1
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; CHECK-NEXT: xvmax.hu $xr0, $xr0, $xr1
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; CHECK-NEXT: xvsub.h $xr0, $xr0, $xr2
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; CHECK-NEXT: ret
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%a.zext = zext <16 x i16> %a to <16 x i32>
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%b.zext = zext <16 x i16> %b to <16 x i32>
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%sub = sub <16 x i32> %a.zext, %b.zext
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%abs = call <16 x i32> @llvm.abs.v16i32(<16 x i32> %sub, i1 true)
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%trunc = trunc <16 x i32> %abs to <16 x i16>
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ret <16 x i16> %trunc
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}
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define <8 x i32> @xvabsd_wu(<8 x i32> %a, <8 x i32> %b) #0 {
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; CHECK-LABEL: xvabsd_wu:
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; CHECK: # %bb.0:
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; CHECK-NEXT: xvmin.wu $xr2, $xr0, $xr1
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; CHECK-NEXT: xvmax.wu $xr0, $xr0, $xr1
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; CHECK-NEXT: xvsub.w $xr0, $xr0, $xr2
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; CHECK-NEXT: ret
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%a.zext = zext <8 x i32> %a to <8 x i64>
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%b.zext = zext <8 x i32> %b to <8 x i64>
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%sub = sub <8 x i64> %a.zext, %b.zext
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%abs = call <8 x i64> @llvm.abs.v8i64(<8 x i64> %sub, i1 true)
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%trunc = trunc <8 x i64> %abs to <8 x i32>
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ret <8 x i32> %trunc
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}
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define <4 x i64> @xvabsd_du(<4 x i64> %a, <4 x i64> %b) #0 {
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; CHECK-LABEL: xvabsd_du:
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; CHECK: # %bb.0:
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; CHECK-NEXT: xvmin.du $xr2, $xr0, $xr1
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; CHECK-NEXT: xvmax.du $xr0, $xr0, $xr1
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; CHECK-NEXT: xvsub.d $xr0, $xr0, $xr2
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; CHECK-NEXT: ret
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%a.zext = zext <4 x i64> %a to <4 x i128>
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%b.zext = zext <4 x i64> %b to <4 x i128>
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%sub = sub <4 x i128> %a.zext, %b.zext
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%abs = call <4 x i128> @llvm.abs.v4i128(<4 x i128> %sub, i1 true)
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%trunc = trunc <4 x i128> %abs to <4 x i64>
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ret <4 x i64> %trunc
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}
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define <32 x i8> @xvabsd_v32i8_nsw(<32 x i8> %a, <32 x i8> %b) #0 {
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; CHECK-LABEL: xvabsd_v32i8_nsw:
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; CHECK: # %bb.0:
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; CHECK-NEXT: xvsub.b $xr0, $xr0, $xr1
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; CHECK-NEXT: xvneg.b $xr1, $xr0
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; CHECK-NEXT: xvmax.b $xr0, $xr0, $xr1
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; CHECK-NEXT: ret
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%sub = sub nsw <32 x i8> %a, %b
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%abs = call <32 x i8> @llvm.abs.v32i8(<32 x i8> %sub, i1 true)
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ret <32 x i8> %abs
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}
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define <16 x i16> @xvabsd_v16i16_nsw(<16 x i16> %a, <16 x i16> %b) #0 {
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; CHECK-LABEL: xvabsd_v16i16_nsw:
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; CHECK: # %bb.0:
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; CHECK-NEXT: xvsub.h $xr0, $xr0, $xr1
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; CHECK-NEXT: xvneg.h $xr1, $xr0
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; CHECK-NEXT: xvmax.h $xr0, $xr0, $xr1
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; CHECK-NEXT: ret
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%sub = sub nsw <16 x i16> %a, %b
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%abs = call <16 x i16> @llvm.abs.v16i16(<16 x i16> %sub, i1 true)
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ret <16 x i16> %abs
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}
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define <8 x i32> @xvabsd_v8i32_nsw(<8 x i32> %a, <8 x i32> %b) #0 {
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; CHECK-LABEL: xvabsd_v8i32_nsw:
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; CHECK: # %bb.0:
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; CHECK-NEXT: xvsub.w $xr0, $xr0, $xr1
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; CHECK-NEXT: xvneg.w $xr1, $xr0
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; CHECK-NEXT: xvmax.w $xr0, $xr0, $xr1
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; CHECK-NEXT: ret
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%sub = sub nsw <8 x i32> %a, %b
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%abs = call <8 x i32> @llvm.abs.v8i32(<8 x i32> %sub, i1 true)
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ret <8 x i32> %abs
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}
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define <4 x i64> @xvabsd_v4i64_nsw(<4 x i64> %a, <4 x i64> %b) #0 {
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; CHECK-LABEL: xvabsd_v4i64_nsw:
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; CHECK: # %bb.0:
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; CHECK-NEXT: xvsub.d $xr0, $xr0, $xr1
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; CHECK-NEXT: xvneg.d $xr1, $xr0
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; CHECK-NEXT: xvmax.d $xr0, $xr0, $xr1
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; CHECK-NEXT: ret
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%sub = sub nsw <4 x i64> %a, %b
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%abs = call <4 x i64> @llvm.abs.v4i64(<4 x i64> %sub, i1 true)
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ret <4 x i64> %abs
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}
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define <32 x i8> @smaxmin_v32i8(<32 x i8> %0, <32 x i8> %1) {
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; CHECK-LABEL: smaxmin_v32i8:
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; CHECK: # %bb.0:
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; CHECK-NEXT: xvmin.b $xr2, $xr0, $xr1
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; CHECK-NEXT: xvmax.b $xr0, $xr0, $xr1
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; CHECK-NEXT: xvsub.b $xr0, $xr0, $xr2
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; CHECK-NEXT: ret
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%a = tail call <32 x i8> @llvm.smax.v32i8(<32 x i8> %0, <32 x i8> %1)
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%b = tail call <32 x i8> @llvm.smin.v32i8(<32 x i8> %0, <32 x i8> %1)
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%sub = sub <32 x i8> %a, %b
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ret <32 x i8> %sub
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}
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define <16 x i16> @smaxmin_v16i16(<16 x i16> %0, <16 x i16> %1) {
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; CHECK-LABEL: smaxmin_v16i16:
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; CHECK: # %bb.0:
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; CHECK-NEXT: xvmin.h $xr2, $xr0, $xr1
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; CHECK-NEXT: xvmax.h $xr0, $xr0, $xr1
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; CHECK-NEXT: xvsub.h $xr0, $xr0, $xr2
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; CHECK-NEXT: ret
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%a = tail call <16 x i16> @llvm.smax.v16i16(<16 x i16> %0, <16 x i16> %1)
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%b = tail call <16 x i16> @llvm.smin.v16i16(<16 x i16> %0, <16 x i16> %1)
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%sub = sub <16 x i16> %a, %b
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ret <16 x i16> %sub
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}
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define <8 x i32> @smaxmin_v8i32(<8 x i32> %0, <8 x i32> %1) {
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; CHECK-LABEL: smaxmin_v8i32:
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; CHECK: # %bb.0:
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; CHECK-NEXT: xvmin.w $xr2, $xr0, $xr1
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; CHECK-NEXT: xvmax.w $xr0, $xr0, $xr1
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; CHECK-NEXT: xvsub.w $xr0, $xr0, $xr2
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; CHECK-NEXT: ret
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%a = tail call <8 x i32> @llvm.smax.v8i32(<8 x i32> %0, <8 x i32> %1)
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%b = tail call <8 x i32> @llvm.smin.v8i32(<8 x i32> %0, <8 x i32> %1)
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%sub = sub <8 x i32> %a, %b
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ret <8 x i32> %sub
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}
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define <4 x i64> @smaxmin_v4i64(<4 x i64> %0, <4 x i64> %1) {
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; CHECK-LABEL: smaxmin_v4i64:
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; CHECK: # %bb.0:
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; CHECK-NEXT: xvmin.d $xr2, $xr0, $xr1
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; CHECK-NEXT: xvmax.d $xr0, $xr0, $xr1
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; CHECK-NEXT: xvsub.d $xr0, $xr0, $xr2
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; CHECK-NEXT: ret
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%a = tail call <4 x i64> @llvm.smax.v4i64(<4 x i64> %0, <4 x i64> %1)
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%b = tail call <4 x i64> @llvm.smin.v4i64(<4 x i64> %0, <4 x i64> %1)
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%sub = sub <4 x i64> %a, %b
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ret <4 x i64> %sub
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}
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define <32 x i8> @umaxmin_v32i8(<32 x i8> %0, <32 x i8> %1) {
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; CHECK-LABEL: umaxmin_v32i8:
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; CHECK: # %bb.0:
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; CHECK-NEXT: xvmin.bu $xr2, $xr0, $xr1
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; CHECK-NEXT: xvmax.bu $xr0, $xr0, $xr1
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; CHECK-NEXT: xvsub.b $xr0, $xr0, $xr2
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; CHECK-NEXT: ret
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%a = tail call <32 x i8> @llvm.umax.v32i8(<32 x i8> %0, <32 x i8> %1)
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%b = tail call <32 x i8> @llvm.umin.v32i8(<32 x i8> %0, <32 x i8> %1)
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%sub = sub <32 x i8> %a, %b
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ret <32 x i8> %sub
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}
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define <16 x i16> @umaxmin_v16i16(<16 x i16> %0, <16 x i16> %1) {
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; CHECK-LABEL: umaxmin_v16i16:
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; CHECK: # %bb.0:
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; CHECK-NEXT: xvmin.hu $xr2, $xr0, $xr1
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; CHECK-NEXT: xvmax.hu $xr0, $xr0, $xr1
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; CHECK-NEXT: xvsub.h $xr0, $xr0, $xr2
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; CHECK-NEXT: ret
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%a = tail call <16 x i16> @llvm.umax.v16i16(<16 x i16> %0, <16 x i16> %1)
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%b = tail call <16 x i16> @llvm.umin.v16i16(<16 x i16> %0, <16 x i16> %1)
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%sub = sub <16 x i16> %a, %b
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ret <16 x i16> %sub
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}
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define <8 x i32> @umaxmin_v8i32(<8 x i32> %0, <8 x i32> %1) {
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; CHECK-LABEL: umaxmin_v8i32:
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; CHECK: # %bb.0:
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; CHECK-NEXT: xvmin.wu $xr2, $xr0, $xr1
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; CHECK-NEXT: xvmax.wu $xr0, $xr0, $xr1
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; CHECK-NEXT: xvsub.w $xr0, $xr0, $xr2
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; CHECK-NEXT: ret
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%a = tail call <8 x i32> @llvm.umax.v8i32(<8 x i32> %0, <8 x i32> %1)
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%b = tail call <8 x i32> @llvm.umin.v8i32(<8 x i32> %0, <8 x i32> %1)
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%sub = sub <8 x i32> %a, %b
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ret <8 x i32> %sub
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}
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define <4 x i64> @umaxmin_v4i64(<4 x i64> %0, <4 x i64> %1) {
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; CHECK-LABEL: umaxmin_v4i64:
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; CHECK: # %bb.0:
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; CHECK-NEXT: xvmin.du $xr2, $xr0, $xr1
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; CHECK-NEXT: xvmax.du $xr0, $xr0, $xr1
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; CHECK-NEXT: xvsub.d $xr0, $xr0, $xr2
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; CHECK-NEXT: ret
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%a = tail call <4 x i64> @llvm.umax.v4i64(<4 x i64> %0, <4 x i64> %1)
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%b = tail call <4 x i64> @llvm.umin.v4i64(<4 x i64> %0, <4 x i64> %1)
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%sub = sub <4 x i64> %a, %b
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ret <4 x i64> %sub
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}
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define <32 x i8> @umaxmin_v32i8_com1(<32 x i8> %0, <32 x i8> %1) {
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; CHECK-LABEL: umaxmin_v32i8_com1:
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; CHECK: # %bb.0:
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; CHECK-NEXT: xvmin.bu $xr2, $xr0, $xr1
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; CHECK-NEXT: xvmax.bu $xr0, $xr0, $xr1
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; CHECK-NEXT: xvsub.b $xr0, $xr0, $xr2
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; CHECK-NEXT: ret
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%a = tail call <32 x i8> @llvm.umax.v32i8(<32 x i8> %0, <32 x i8> %1)
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%b = tail call <32 x i8> @llvm.umin.v32i8(<32 x i8> %1, <32 x i8> %0)
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%sub = sub <32 x i8> %a, %b
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ret <32 x i8> %sub
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}
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declare <32 x i8> @llvm.abs.v32i8(<32 x i8>, i1)
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declare <16 x i16> @llvm.abs.v16i16(<16 x i16>, i1)
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declare <32 x i16> @llvm.abs.v32i16(<32 x i16>, i1)
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declare <8 x i32> @llvm.abs.v8i32(<8 x i32>, i1)
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declare <16 x i32> @llvm.abs.v16i32(<16 x i32>, i1)
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declare <4 x i64> @llvm.abs.v4i64(<4 x i64>, i1)
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declare <8 x i64> @llvm.abs.v8i64(<8 x i64>, i1)
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declare <4 x i128> @llvm.abs.v4i128(<4 x i128>, i1)
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declare <32 x i8> @llvm.smax.v32i8(<32 x i8>, <32 x i8>)
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declare <16 x i16> @llvm.smax.v16i16(<16 x i16>, <16 x i16>)
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declare <8 x i32> @llvm.smax.v8i32(<8 x i32>, <8 x i32>)
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declare <4 x i64> @llvm.smax.v4i64(<4 x i64>, <4 x i64>)
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declare <32 x i8> @llvm.smin.v32i8(<32 x i8>, <32 x i8>)
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declare <16 x i16> @llvm.smin.v16i16(<16 x i16>, <16 x i16>)
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declare <8 x i32> @llvm.smin.v8i32(<8 x i32>, <8 x i32>)
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declare <4 x i64> @llvm.smin.v4i64(<4 x i64>, <4 x i64>)
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declare <32 x i8> @llvm.umax.v32i8(<32 x i8>, <32 x i8>)
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declare <16 x i16> @llvm.umax.v16i16(<16 x i16>, <16 x i16>)
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declare <8 x i32> @llvm.umax.v8i32(<8 x i32>, <8 x i32>)
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declare <4 x i64> @llvm.umax.v4i64(<4 x i64>, <4 x i64>)
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declare <32 x i8> @llvm.umin.v32i8(<32 x i8>, <32 x i8>)
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declare <16 x i16> @llvm.umin.v16i16(<16 x i16>, <16 x i16>)
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declare <8 x i32> @llvm.umin.v8i32(<8 x i32>, <8 x i32>)
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declare <4 x i64> @llvm.umin.v4i64(<4 x i64>, <4 x i64>)

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