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[AArch64][PAC] Lower auth/resign into checked sequence.
This introduces 3 hardening modes in the authentication step of auth/resign lowering: - unchecked, which uses the AUT instructions as-is - poison, which detects authentication failure (using an XPAC+CMP sequence), explicitly yielding the XPAC result rather than the AUT result, to avoid leaking - trap, which additionally traps on authentication failure, using BRK #0xC470 + key (IA C470, IB C471, DA C472, DB C473.) Not all modes are necessarily useful in all contexts, and there are more performant alternative lowerings in specific contexts (e.g., when I/D TBI enablement is a target ABI guarantee.) This is controlled by the `ptrauth-auth-traps` function attributes, and can be overridden using `-aarch64-ptrauth-auth-checks=`.
1 parent 30aa9fb commit 224c009

8 files changed

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‎llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp

Lines changed: 272 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -67,6 +67,16 @@
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using namespace llvm;
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enum PtrauthCheckMode { Default, Unchecked, Poison, Trap };
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static cl::opt<PtrauthCheckMode>
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PtrauthAuthChecks("aarch64-ptrauth-auth-checks", cl::Hidden,
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cl::values(
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clEnumValN(Unchecked, "none", "don't test for failure"),
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clEnumValN(Poison, "poison", "poison on failure"),
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clEnumValN(Trap, "trap", "trap on failure")),
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cl::desc("Check pointer authentication auth/resign failures"),
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cl::init(Default));
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7080
#define DEBUG_TYPE "asm-printer"
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namespace {
@@ -124,6 +134,12 @@ class AArch64AsmPrinter : public AsmPrinter {
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void emitSled(const MachineInstr &MI, SledKind Kind);
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// Emit the sequence for AUT or AUTPAC.
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void emitPtrauthAuthResign(const MachineInstr *MI);
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// Emit the sequence to compute a discriminator into x17, or reuse AddrDisc.
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unsigned emitPtrauthDiscriminator(uint16_t Disc, unsigned AddrDisc,
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unsigned &InstsEmitted);
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127143
/// tblgen'erated driver function for lowering simple MI->MC
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/// pseudo instructions.
129145
bool emitPseudoExpansionLowering(MCStreamer &OutStreamer,
@@ -1417,6 +1433,257 @@ void AArch64AsmPrinter::emitFMov0(const MachineInstr &MI) {
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}
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}
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unsigned AArch64AsmPrinter::emitPtrauthDiscriminator(uint16_t Disc,
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unsigned AddrDisc,
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unsigned &InstsEmitted) {
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// If there is no constant discriminator, there's no blend involved:
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// just use the address discriminator register as-is (XZR or not).
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if (!Disc)
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return AddrDisc;
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// If there's only a constant discriminator, MOV it into x17.
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if (AddrDisc == AArch64::XZR) {
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EmitToStreamer(*OutStreamer,
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MCInstBuilder(AArch64::MOVZXi)
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.addReg(AArch64::X17)
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.addImm(Disc)
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.addImm(/*shift=*/0));
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++InstsEmitted;
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return AArch64::X17;
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}
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// If there are both, emit a blend into x17.
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EmitToStreamer(*OutStreamer,
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MCInstBuilder(AArch64::ORRXrs)
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.addReg(AArch64::X17)
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.addReg(AArch64::XZR)
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.addReg(AddrDisc)
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.addImm(0));
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++InstsEmitted;
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EmitToStreamer(*OutStreamer,
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MCInstBuilder(AArch64::MOVKXi)
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.addReg(AArch64::X17)
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.addReg(AArch64::X17)
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.addImm(Disc)
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.addImm(/*shift=*/48));
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++InstsEmitted;
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return AArch64::X17;
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}
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void AArch64AsmPrinter::emitPtrauthAuthResign(const MachineInstr *MI) {
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unsigned InstsEmitted = 0;
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const bool IsAUTPAC = MI->getOpcode() == AArch64::AUTPAC;
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// We can expand AUT/AUTPAC into 3 possible sequences:
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// - unchecked:
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// autia x16, x0
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// pacib x16, x1 ; if AUTPAC
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//
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// - checked and clearing:
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// mov x17, x0
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// movk x17, #disc, lsl #48
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// autia x16, x17
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// mov x17, x16
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// xpaci x17
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// cmp x16, x17
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// b.eq Lsuccess
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// mov x16, x17
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// b Lend
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// Lsuccess:
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// mov x17, x1
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// movk x17, #disc, lsl #48
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// pacib x16, x17
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// Lend:
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// Where we only emit the AUT if we started with an AUT.
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//
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// - checked and trapping:
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// mov x17, x0
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// movk x17, #disc, lsl #48
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// autia x16, x0
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// mov x17, x16
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// xpaci x17
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// cmp x16, x17
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// b.eq Lsuccess
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// brk #<0xc470 + aut key>
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// Lsuccess:
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// mov x17, x1
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// movk x17, #disc, lsl #48
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// pacib x16, x17 ; if AUTPAC
1512+
// Where the b.eq skips over the trap if the PAC is valid.
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//
1514+
// This sequence is expensive, but we need more information to be able to
1515+
// do better.
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//
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// We can't TBZ the poison bit because EnhancedPAC2 XORs the PAC bits
1518+
// on failure.
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// We can't TST the PAC bits because we don't always know how the address
1520+
// space is setup for the target environment (and the bottom PAC bit is
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// based on that).
1522+
// Either way, we also don't always know whether TBI is enabled or not for
1523+
// the specific target environment.
1524+
1525+
// By default, auth/resign sequences check for auth failures.
1526+
bool ShouldCheck = true;
1527+
// In the checked sequence, we only trap if explicitly requested.
1528+
bool ShouldTrap = MF->getFunction().hasFnAttribute("ptrauth-auth-traps");
1529+
1530+
// However, command-line flags can override this, for experimentation.
1531+
switch (PtrauthAuthChecks) {
1532+
case PtrauthCheckMode::Default: break;
1533+
case PtrauthCheckMode::Unchecked:
1534+
ShouldCheck = ShouldTrap = false;
1535+
break;
1536+
case PtrauthCheckMode::Poison:
1537+
ShouldCheck = true;
1538+
ShouldTrap = false;
1539+
break;
1540+
case PtrauthCheckMode::Trap:
1541+
ShouldCheck = ShouldTrap = true;
1542+
break;
1543+
}
1544+
1545+
auto AUTKey = (AArch64PACKey::ID)MI->getOperand(0).getImm();
1546+
uint64_t AUTDisc = MI->getOperand(1).getImm();
1547+
unsigned AUTAddrDisc = MI->getOperand(2).getReg();
1548+
1549+
unsigned XPACOpc = getXPACOpcodeForKey(AUTKey);
1550+
1551+
// Compute aut discriminator into x17
1552+
assert(isUInt<16>(AUTDisc));
1553+
unsigned AUTDiscReg = emitPtrauthDiscriminator(AUTDisc, AUTAddrDisc, InstsEmitted);
1554+
bool AUTZero = AUTDiscReg == AArch64::XZR;
1555+
unsigned AUTOpc = getAUTOpcodeForKey(AUTKey, AUTZero);
1556+
1557+
// autiza x16 ; if AUTZero
1558+
// autia x16, x17 ; if !AUTZero
1559+
MCInst AUTInst;
1560+
AUTInst.setOpcode(AUTOpc);
1561+
AUTInst.addOperand(MCOperand::createReg(AArch64::X16));
1562+
AUTInst.addOperand(MCOperand::createReg(AArch64::X16));
1563+
if (!AUTZero)
1564+
AUTInst.addOperand(MCOperand::createReg(AUTDiscReg));
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EmitToStreamer(*OutStreamer, AUTInst);
1566+
++InstsEmitted;
1567+
1568+
// Unchecked or checked-but-non-trapping AUT is just an "AUT": we're done.
1569+
if (!IsAUTPAC && (!ShouldCheck || !ShouldTrap)) {
1570+
assert(STI->getInstrInfo()->getInstSizeInBytes(*MI) >= InstsEmitted * 4);
1571+
return;
1572+
}
1573+
1574+
MCSymbol *EndSym = nullptr;
1575+
1576+
// Checked sequences do an additional strip-and-compare.
1577+
if (ShouldCheck) {
1578+
MCSymbol *SuccessSym = createTempSymbol("auth_success_");
1579+
1580+
// XPAC has tied src/dst: use x17 as a temporary copy.
1581+
// mov x17, x16
1582+
EmitToStreamer(*OutStreamer,
1583+
MCInstBuilder(AArch64::ORRXrs)
1584+
.addReg(AArch64::X17)
1585+
.addReg(AArch64::XZR)
1586+
.addReg(AArch64::X16)
1587+
.addImm(0));
1588+
++InstsEmitted;
1589+
1590+
// xpaci x17
1591+
EmitToStreamer(*OutStreamer,
1592+
MCInstBuilder(XPACOpc)
1593+
.addReg(AArch64::X17)
1594+
.addReg(AArch64::X17));
1595+
++InstsEmitted;
1596+
1597+
// cmp x16, x17
1598+
EmitToStreamer(*OutStreamer,
1599+
MCInstBuilder(AArch64::SUBSXrs)
1600+
.addReg(AArch64::XZR)
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.addReg(AArch64::X16)
1602+
.addReg(AArch64::X17)
1603+
.addImm(0));
1604+
++InstsEmitted;
1605+
1606+
// b.eq Lsuccess
1607+
EmitToStreamer(*OutStreamer,
1608+
MCInstBuilder(AArch64::Bcc)
1609+
.addImm(AArch64CC::EQ)
1610+
.addExpr(MCSymbolRefExpr::create(SuccessSym, OutContext)));
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++InstsEmitted;
1612+
1613+
if (ShouldTrap) {
1614+
// Trapping sequences do a 'brk'.
1615+
// brk #<0xc470 + aut key>
1616+
EmitToStreamer(*OutStreamer,
1617+
MCInstBuilder(AArch64::BRK)
1618+
.addImm(0xc470 | AUTKey));
1619+
++InstsEmitted;
1620+
} else {
1621+
// Non-trapping checked sequences return the stripped result in x16,
1622+
// skipping over the PAC if there is one.
1623+
1624+
// FIXME: can we simply return the AUT result, already in x16? without..
1625+
// ..traps this is usable as an oracle anyway, based on high bits
1626+
// mov x17, x16
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EmitToStreamer(*OutStreamer,
1628+
MCInstBuilder(AArch64::ORRXrs)
1629+
.addReg(AArch64::X16)
1630+
.addReg(AArch64::XZR)
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.addReg(AArch64::X17)
1632+
.addImm(0));
1633+
++InstsEmitted;
1634+
1635+
if (IsAUTPAC) {
1636+
EndSym = createTempSymbol("resign_end_");
1637+
1638+
// b Lend
1639+
EmitToStreamer(*OutStreamer,
1640+
MCInstBuilder(AArch64::B)
1641+
.addExpr(MCSymbolRefExpr::create(EndSym, OutContext)));
1642+
++InstsEmitted;
1643+
}
1644+
}
1645+
1646+
// If the auth check succeeds, we can continue.
1647+
// Lsuccess:
1648+
OutStreamer->emitLabel(SuccessSym);
1649+
}
1650+
1651+
// We already emitted unchecked and checked-but-non-trapping AUTs.
1652+
// That left us with trapping AUTs, and AUTPACs.
1653+
// Trapping AUTs don't need PAC: we're done.
1654+
if (!IsAUTPAC) {
1655+
assert(STI->getInstrInfo()->getInstSizeInBytes(*MI) >= InstsEmitted * 4);
1656+
return;
1657+
}
1658+
1659+
auto PACKey = (AArch64PACKey::ID)MI->getOperand(3).getImm();
1660+
uint64_t PACDisc = MI->getOperand(4).getImm();
1661+
unsigned PACAddrDisc = MI->getOperand(5).getReg();
1662+
1663+
// Compute pac discriminator into x17
1664+
assert(isUInt<16>(PACDisc));
1665+
unsigned PACDiscReg =
1666+
emitPtrauthDiscriminator(PACDisc, PACAddrDisc, InstsEmitted);
1667+
bool PACZero = PACDiscReg == AArch64::XZR;
1668+
unsigned PACOpc = getPACOpcodeForKey(PACKey, PACZero);
1669+
1670+
// pacizb x16 ; if PACZero
1671+
// pacib x16, x17 ; if !PACZero
1672+
MCInst PACInst;
1673+
PACInst.setOpcode(PACOpc);
1674+
PACInst.addOperand(MCOperand::createReg(AArch64::X16));
1675+
PACInst.addOperand(MCOperand::createReg(AArch64::X16));
1676+
if (!PACZero)
1677+
PACInst.addOperand(MCOperand::createReg(PACDiscReg));
1678+
EmitToStreamer(*OutStreamer, PACInst);
1679+
++InstsEmitted;
1680+
1681+
assert(STI->getInstrInfo()->getInstSizeInBytes(*MI) >= InstsEmitted * 4);
1682+
// Lend:
1683+
if (EndSym)
1684+
OutStreamer->emitLabel(EndSym);
1685+
}
1686+
14201687
// Simple pseudo-instructions have their lowering (with expansion to real
14211688
// instructions) auto-generated.
14221689
#include "AArch64GenMCPseudoLowering.inc"
@@ -1552,6 +1819,11 @@ void AArch64AsmPrinter::emitInstruction(const MachineInstr *MI) {
15521819
return;
15531820
}
15541821

1822+
case AArch64::AUT:
1823+
case AArch64::AUTPAC:
1824+
emitPtrauthAuthResign(MI);
1825+
return;
1826+
15551827
// Tail calls use pseudo instructions so they have the proper code-gen
15561828
// attributes (isCall, isReturn, etc.). We lower them to the real
15571829
// instruction here.

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