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[InstCombine] Add more tests for simplifying (icmp (and/or x, Mask), y); NFC
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llvm/test/Transforms/InstCombine/icmp-and-lowbit-mask.ll

Lines changed: 262 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -470,6 +470,24 @@ define i1 @src_is_notmask_x_xor_neg_x(i8 %x_in, i8 %y, i1 %cond) {
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ret i1 %r
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}
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define i1 @src_is_notmask_x_xor_neg_x_inv(i8 %x_in, i8 %y, i1 %cond) {
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; CHECK-LABEL: @src_is_notmask_x_xor_neg_x_inv(
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; CHECK-NEXT: [[X:%.*]] = xor i8 [[X_IN:%.*]], 123
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; CHECK-NEXT: [[NEG_Y:%.*]] = add i8 [[Y:%.*]], -1
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; CHECK-NEXT: [[NOTMASK0:%.*]] = xor i8 [[NEG_Y]], [[Y]]
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; CHECK-NEXT: [[TMP3:%.*]] = select i1 [[COND:%.*]], i8 [[NOTMASK0]], i8 7
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; CHECK-NEXT: [[R:%.*]] = icmp ule i8 [[X]], [[TMP3]]
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; CHECK-NEXT: ret i1 [[R]]
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;
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%x = xor i8 %x_in, 123
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%neg_y = sub i8 0, %y
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%nmask0 = xor i8 %y, %neg_y
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%notmask = select i1 %cond, i8 %nmask0, i8 -8
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%and = and i8 %notmask, %x
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%r = icmp eq i8 %and, 0
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ret i1 %r
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}
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define i1 @src_is_notmask_shl_fail_multiuse_invert(i8 %x_in, i8 %y, i1 %cond) {
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; CHECK-LABEL: @src_is_notmask_shl_fail_multiuse_invert(
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; CHECK-NEXT: [[X:%.*]] = xor i8 [[X_IN:%.*]], 122
@@ -655,3 +673,247 @@ define i1 @src_is_mask_const_sge(i8 %x_in) {
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%r = icmp sge i8 %and, %x
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ret i1 %r
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}
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define i1 @src_x_and_mask_slt(i8 %x, i8 %y, i1 %cond) {
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; CHECK-LABEL: @src_x_and_mask_slt(
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; CHECK-NEXT: [[MASK0:%.*]] = lshr i8 -1, [[Y:%.*]]
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; CHECK-NEXT: [[MASK:%.*]] = select i1 [[COND:%.*]], i8 [[MASK0]], i8 0
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; CHECK-NEXT: [[MASK_POS:%.*]] = icmp sgt i8 [[MASK]], -1
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; CHECK-NEXT: call void @llvm.assume(i1 [[MASK_POS]])
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; CHECK-NEXT: [[AND:%.*]] = and i8 [[MASK]], [[X:%.*]]
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; CHECK-NEXT: [[R:%.*]] = icmp slt i8 [[AND]], [[X]]
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; CHECK-NEXT: ret i1 [[R]]
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;
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%mask0 = lshr i8 -1, %y
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%mask = select i1 %cond, i8 %mask0, i8 0
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%mask_pos = icmp sge i8 %mask, 0
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call void @llvm.assume(i1 %mask_pos)
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%and = and i8 %x, %mask
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%r = icmp slt i8 %and, %x
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ret i1 %r
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}
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define i1 @src_x_and_mask_sge(i8 %x, i8 %y, i1 %cond) {
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; CHECK-LABEL: @src_x_and_mask_sge(
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; CHECK-NEXT: [[MASK0:%.*]] = lshr i8 -1, [[Y:%.*]]
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; CHECK-NEXT: [[MASK:%.*]] = select i1 [[COND:%.*]], i8 [[MASK0]], i8 0
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; CHECK-NEXT: [[MASK_POS:%.*]] = icmp sgt i8 [[MASK]], -1
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; CHECK-NEXT: call void @llvm.assume(i1 [[MASK_POS]])
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; CHECK-NEXT: [[AND:%.*]] = and i8 [[MASK]], [[X:%.*]]
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; CHECK-NEXT: [[R:%.*]] = icmp sge i8 [[AND]], [[X]]
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; CHECK-NEXT: ret i1 [[R]]
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;
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%mask0 = lshr i8 -1, %y
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%mask = select i1 %cond, i8 %mask0, i8 0
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%mask_pos = icmp sge i8 %mask, 0
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call void @llvm.assume(i1 %mask_pos)
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%and = and i8 %x, %mask
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%r = icmp sge i8 %and, %x
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ret i1 %r
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}
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define i1 @src_x_and_mask_slt_fail_maybe_neg(i8 %x, i8 %y, i1 %cond) {
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; CHECK-LABEL: @src_x_and_mask_slt_fail_maybe_neg(
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; CHECK-NEXT: [[MASK0:%.*]] = lshr i8 -1, [[Y:%.*]]
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; CHECK-NEXT: [[MASK:%.*]] = select i1 [[COND:%.*]], i8 [[MASK0]], i8 0
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; CHECK-NEXT: [[AND:%.*]] = and i8 [[MASK]], [[X:%.*]]
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; CHECK-NEXT: [[R:%.*]] = icmp slt i8 [[AND]], [[X]]
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; CHECK-NEXT: ret i1 [[R]]
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;
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%mask0 = lshr i8 -1, %y
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%mask = select i1 %cond, i8 %mask0, i8 0
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%and = and i8 %x, %mask
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%r = icmp slt i8 %and, %x
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ret i1 %r
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}
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define i1 @src_x_and_mask_sge_fail_maybe_neg(i8 %x, i8 %y, i1 %cond) {
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; CHECK-LABEL: @src_x_and_mask_sge_fail_maybe_neg(
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; CHECK-NEXT: [[MASK0:%.*]] = lshr i8 -1, [[Y:%.*]]
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; CHECK-NEXT: [[MASK:%.*]] = select i1 [[COND:%.*]], i8 [[MASK0]], i8 0
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; CHECK-NEXT: [[AND:%.*]] = and i8 [[MASK]], [[X:%.*]]
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; CHECK-NEXT: [[R:%.*]] = icmp sge i8 [[AND]], [[X]]
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; CHECK-NEXT: ret i1 [[R]]
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;
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%mask0 = lshr i8 -1, %y
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%mask = select i1 %cond, i8 %mask0, i8 0
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%and = and i8 %x, %mask
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%r = icmp sge i8 %and, %x
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ret i1 %r
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}
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define i1 @src_x_and_nmask_eq(i8 %x, i8 %y, i1 %cond) {
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; CHECK-LABEL: @src_x_and_nmask_eq(
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; CHECK-NEXT: [[NOT_MASK0:%.*]] = shl nsw i8 -1, [[Y:%.*]]
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; CHECK-NEXT: [[NOT_MASK:%.*]] = select i1 [[COND:%.*]], i8 [[NOT_MASK0]], i8 0
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; CHECK-NEXT: [[AND:%.*]] = and i8 [[NOT_MASK]], [[X:%.*]]
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; CHECK-NEXT: [[R:%.*]] = icmp eq i8 [[NOT_MASK]], [[AND]]
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; CHECK-NEXT: ret i1 [[R]]
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;
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%not_mask0 = shl i8 -1, %y
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%not_mask = select i1 %cond, i8 %not_mask0, i8 0
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%and = and i8 %x, %not_mask
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%r = icmp eq i8 %not_mask, %and
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ret i1 %r
758+
}
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define i1 @src_x_and_nmask_ne(i8 %x, i8 %y, i1 %cond) {
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; CHECK-LABEL: @src_x_and_nmask_ne(
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; CHECK-NEXT: [[NOT_MASK0:%.*]] = shl nsw i8 -1, [[Y:%.*]]
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; CHECK-NEXT: [[NOT_MASK:%.*]] = select i1 [[COND:%.*]], i8 [[NOT_MASK0]], i8 0
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; CHECK-NEXT: [[AND:%.*]] = and i8 [[NOT_MASK]], [[X:%.*]]
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; CHECK-NEXT: [[R:%.*]] = icmp ne i8 [[AND]], [[NOT_MASK]]
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; CHECK-NEXT: ret i1 [[R]]
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;
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%not_mask0 = shl i8 -1, %y
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%not_mask = select i1 %cond, i8 %not_mask0, i8 0
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%and = and i8 %x, %not_mask
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%r = icmp ne i8 %and, %not_mask
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ret i1 %r
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}
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define i1 @src_x_and_nmask_ult(i8 %x, i8 %y, i1 %cond) {
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; CHECK-LABEL: @src_x_and_nmask_ult(
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; CHECK-NEXT: [[NOT_MASK0:%.*]] = shl nsw i8 -1, [[Y:%.*]]
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; CHECK-NEXT: [[NOT_MASK:%.*]] = select i1 [[COND:%.*]], i8 [[NOT_MASK0]], i8 0
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; CHECK-NEXT: [[AND:%.*]] = and i8 [[NOT_MASK]], [[X:%.*]]
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; CHECK-NEXT: [[R:%.*]] = icmp ne i8 [[AND]], [[NOT_MASK]]
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; CHECK-NEXT: ret i1 [[R]]
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;
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%not_mask0 = shl i8 -1, %y
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%not_mask = select i1 %cond, i8 %not_mask0, i8 0
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%and = and i8 %x, %not_mask
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%r = icmp ult i8 %and, %not_mask
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ret i1 %r
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}
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define i1 @src_x_and_nmask_uge(i8 %x, i8 %y, i1 %cond) {
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; CHECK-LABEL: @src_x_and_nmask_uge(
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; CHECK-NEXT: [[NOT_MASK0:%.*]] = shl nsw i8 -1, [[Y:%.*]]
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; CHECK-NEXT: [[NOT_MASK:%.*]] = select i1 [[COND:%.*]], i8 [[NOT_MASK0]], i8 0
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; CHECK-NEXT: [[AND:%.*]] = and i8 [[NOT_MASK]], [[X:%.*]]
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; CHECK-NEXT: [[R:%.*]] = icmp eq i8 [[AND]], [[NOT_MASK]]
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; CHECK-NEXT: ret i1 [[R]]
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;
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%not_mask0 = shl i8 -1, %y
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%not_mask = select i1 %cond, i8 %not_mask0, i8 0
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%and = and i8 %x, %not_mask
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%r = icmp uge i8 %and, %not_mask
802+
ret i1 %r
803+
}
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define i1 @src_x_and_nmask_slt(i8 %x, i8 %y) {
806+
; CHECK-LABEL: @src_x_and_nmask_slt(
807+
; CHECK-NEXT: [[NOT_MASK:%.*]] = shl nsw i8 -1, [[Y:%.*]]
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; CHECK-NEXT: [[AND:%.*]] = and i8 [[NOT_MASK]], [[X:%.*]]
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; CHECK-NEXT: [[R:%.*]] = icmp slt i8 [[AND]], [[NOT_MASK]]
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; CHECK-NEXT: ret i1 [[R]]
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;
812+
%not_mask = shl i8 -1, %y
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%and = and i8 %x, %not_mask
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%r = icmp slt i8 %and, %not_mask
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ret i1 %r
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}
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define i1 @src_x_and_nmask_sge(i8 %x, i8 %y) {
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; CHECK-LABEL: @src_x_and_nmask_sge(
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; CHECK-NEXT: [[NOT_MASK:%.*]] = shl nsw i8 -1, [[Y:%.*]]
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; CHECK-NEXT: [[AND:%.*]] = and i8 [[NOT_MASK]], [[X:%.*]]
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; CHECK-NEXT: [[R:%.*]] = icmp sge i8 [[AND]], [[NOT_MASK]]
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; CHECK-NEXT: ret i1 [[R]]
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;
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%not_mask = shl i8 -1, %y
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%and = and i8 %x, %not_mask
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%r = icmp sge i8 %and, %not_mask
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ret i1 %r
829+
}
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define i1 @src_x_and_nmask_slt_fail_maybe_z(i8 %x, i8 %y, i1 %cond) {
832+
; CHECK-LABEL: @src_x_and_nmask_slt_fail_maybe_z(
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; CHECK-NEXT: [[NOT_MASK0:%.*]] = shl nsw i8 -1, [[Y:%.*]]
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; CHECK-NEXT: [[NOT_MASK:%.*]] = select i1 [[COND:%.*]], i8 [[NOT_MASK0]], i8 0
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; CHECK-NEXT: [[AND:%.*]] = and i8 [[NOT_MASK]], [[X:%.*]]
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; CHECK-NEXT: [[R:%.*]] = icmp slt i8 [[AND]], [[NOT_MASK]]
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; CHECK-NEXT: ret i1 [[R]]
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;
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%not_mask0 = shl i8 -1, %y
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%not_mask = select i1 %cond, i8 %not_mask0, i8 0
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%and = and i8 %x, %not_mask
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%r = icmp slt i8 %and, %not_mask
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ret i1 %r
844+
}
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define i1 @src_x_and_nmask_sge_fail_maybe_z(i8 %x, i8 %y, i1 %cond) {
847+
; CHECK-LABEL: @src_x_and_nmask_sge_fail_maybe_z(
848+
; CHECK-NEXT: [[NOT_MASK0:%.*]] = shl nsw i8 -1, [[Y:%.*]]
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; CHECK-NEXT: [[NOT_MASK:%.*]] = select i1 [[COND:%.*]], i8 [[NOT_MASK0]], i8 0
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; CHECK-NEXT: [[AND:%.*]] = and i8 [[NOT_MASK]], [[X:%.*]]
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; CHECK-NEXT: [[R:%.*]] = icmp sge i8 [[AND]], [[NOT_MASK]]
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; CHECK-NEXT: ret i1 [[R]]
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;
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%not_mask0 = shl i8 -1, %y
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%not_mask = select i1 %cond, i8 %not_mask0, i8 0
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%and = and i8 %x, %not_mask
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%r = icmp sge i8 %and, %not_mask
858+
ret i1 %r
859+
}
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define i1 @src_x_or_mask_eq(i8 %x, i8 %y, i8 %z, i1 %c2, i1 %cond) {
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; CHECK-LABEL: @src_x_or_mask_eq(
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; CHECK-NEXT: [[MASK0:%.*]] = lshr i8 -1, [[Y:%.*]]
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; CHECK-NEXT: [[MASK:%.*]] = select i1 [[COND:%.*]], i8 [[MASK0]], i8 0
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; CHECK-NEXT: [[TMP1:%.*]] = xor i8 [[X:%.*]], -124
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; CHECK-NEXT: [[TMP2:%.*]] = select i1 [[C2:%.*]], i8 [[TMP1]], i8 -46
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; CHECK-NEXT: [[TMP3:%.*]] = call i8 @llvm.umax.i8(i8 [[Z:%.*]], i8 [[TMP2]])
868+
; CHECK-NEXT: [[NX_CCC:%.*]] = sub i8 11, [[TMP3]]
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; CHECK-NEXT: [[OR:%.*]] = or i8 [[NX_CCC]], [[MASK]]
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; CHECK-NEXT: [[R:%.*]] = icmp eq i8 [[OR]], -1
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; CHECK-NEXT: ret i1 [[R]]
872+
;
873+
%mask0 = lshr i8 -1, %y
874+
%mask = select i1 %cond, i8 %mask0, i8 0
875+
%nx = xor i8 %x, 123
876+
%nx_c = select i1 %c2, i8 %nx, i8 45
877+
%nz = xor i8 %z, -1
878+
%nx_cc = call i8 @llvm.umin.i8(i8 %nz, i8 %nx_c)
879+
%nx_ccc = add i8 %nx_cc, 12
880+
%or = or i8 %nx_ccc, %mask
881+
%r = icmp eq i8 %or, -1
882+
ret i1 %r
883+
}
884+
885+
define i1 @src_x_or_mask_ne(i8 %x, i8 %y, i1 %cond) {
886+
; CHECK-LABEL: @src_x_or_mask_ne(
887+
; CHECK-NEXT: [[MASK0:%.*]] = lshr i8 -1, [[Y:%.*]]
888+
; CHECK-NEXT: [[MASK:%.*]] = select i1 [[COND:%.*]], i8 [[MASK0]], i8 0
889+
; CHECK-NEXT: [[NX:%.*]] = xor i8 [[X:%.*]], -1
890+
; CHECK-NEXT: [[OR:%.*]] = or i8 [[MASK]], [[NX]]
891+
; CHECK-NEXT: [[R:%.*]] = icmp ne i8 [[OR]], -1
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; CHECK-NEXT: ret i1 [[R]]
893+
;
894+
%mask0 = lshr i8 -1, %y
895+
%mask = select i1 %cond, i8 %mask0, i8 0
896+
%nx = xor i8 %x, -1
897+
%or = or i8 %mask, %nx
898+
%r = icmp ne i8 %or, -1
899+
ret i1 %r
900+
}
901+
902+
define i1 @src_x_or_mask_ne_fail_multiuse(i8 %x, i8 %y, i1 %cond) {
903+
; CHECK-LABEL: @src_x_or_mask_ne_fail_multiuse(
904+
; CHECK-NEXT: [[MASK0:%.*]] = lshr i8 -1, [[Y:%.*]]
905+
; CHECK-NEXT: [[MASK:%.*]] = select i1 [[COND:%.*]], i8 [[MASK0]], i8 0
906+
; CHECK-NEXT: [[NX:%.*]] = xor i8 [[X:%.*]], -1
907+
; CHECK-NEXT: [[OR:%.*]] = or i8 [[MASK]], [[NX]]
908+
; CHECK-NEXT: call void @use.i8(i8 [[OR]])
909+
; CHECK-NEXT: [[R:%.*]] = icmp ne i8 [[OR]], -1
910+
; CHECK-NEXT: ret i1 [[R]]
911+
;
912+
%mask0 = lshr i8 -1, %y
913+
%mask = select i1 %cond, i8 %mask0, i8 0
914+
%nx = xor i8 %x, -1
915+
%or = or i8 %mask, %nx
916+
call void @use.i8(i8 %or)
917+
%r = icmp ne i8 %or, -1
918+
ret i1 %r
919+
}

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