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[NFC][PowerPC] Use tablegen's MatchRegisterName() (#111553)
Use PPC `MatchRegisterName()` that is auto generated by table gen.
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+15
-42
lines changed

2 files changed

+15
-42
lines changed

llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp

Lines changed: 13 additions & 41 deletions
Original file line numberDiff line numberDiff line change
@@ -1291,62 +1291,35 @@ bool PPCAsmParser::matchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode,
12911291
llvm_unreachable("Implement any new match types added!");
12921292
}
12931293

1294+
#define GET_REGISTER_MATCHER
1295+
#include "PPCGenAsmMatcher.inc"
1296+
12941297
MCRegister PPCAsmParser::matchRegisterName(int64_t &IntVal) {
12951298
if (getParser().getTok().is(AsmToken::Percent))
12961299
getParser().Lex(); // Eat the '%'.
12971300

12981301
if (!getParser().getTok().is(AsmToken::Identifier))
12991302
return MCRegister();
13001303

1301-
MCRegister RegNo;
13021304
StringRef Name = getParser().getTok().getString();
1305+
MCRegister RegNo = MatchRegisterName(Name);
1306+
if (!RegNo)
1307+
return RegNo;
1308+
1309+
Name.substr(Name.find_first_of("1234567890")).getAsInteger(10, IntVal);
1310+
1311+
// MatchRegisterName doesn't seem to have special handling for 64bit vs 32bit
1312+
// register types.
13031313
if (Name.equals_insensitive("lr")) {
13041314
RegNo = isPPC64() ? PPC::LR8 : PPC::LR;
13051315
IntVal = 8;
13061316
} else if (Name.equals_insensitive("ctr")) {
13071317
RegNo = isPPC64() ? PPC::CTR8 : PPC::CTR;
13081318
IntVal = 9;
1309-
} else if (Name.equals_insensitive("vrsave")) {
1310-
RegNo = PPC::VRSAVE;
1319+
} else if (Name.equals_insensitive("vrsave"))
13111320
IntVal = 256;
1312-
} else if (Name.starts_with_insensitive("r") &&
1313-
!Name.substr(1).getAsInteger(10, IntVal) && IntVal < 32) {
1321+
else if (Name.starts_with_insensitive("r"))
13141322
RegNo = isPPC64() ? XRegs[IntVal] : RRegs[IntVal];
1315-
} else if (Name.starts_with_insensitive("f") &&
1316-
!Name.substr(1).getAsInteger(10, IntVal) && IntVal < 32) {
1317-
RegNo = FRegs[IntVal];
1318-
} else if (Name.starts_with_insensitive("vs") &&
1319-
!Name.substr(2).getAsInteger(10, IntVal) && IntVal < 64) {
1320-
RegNo = VSRegs[IntVal];
1321-
} else if (Name.starts_with_insensitive("v") &&
1322-
!Name.substr(1).getAsInteger(10, IntVal) && IntVal < 32) {
1323-
RegNo = VRegs[IntVal];
1324-
} else if (Name.starts_with_insensitive("cr") &&
1325-
!Name.substr(2).getAsInteger(10, IntVal) && IntVal < 8) {
1326-
RegNo = CRRegs[IntVal];
1327-
} else if (Name.starts_with_insensitive("acc") &&
1328-
!Name.substr(3).getAsInteger(10, IntVal) && IntVal < 8) {
1329-
RegNo = ACCRegs[IntVal];
1330-
} else if (Name.starts_with_insensitive("wacc_hi") &&
1331-
!Name.substr(7).getAsInteger(10, IntVal) && IntVal < 8) {
1332-
RegNo = ACCRegs[IntVal];
1333-
} else if (Name.starts_with_insensitive("wacc") &&
1334-
!Name.substr(4).getAsInteger(10, IntVal) && IntVal < 8) {
1335-
RegNo = WACCRegs[IntVal];
1336-
} else if (Name.starts_with_insensitive("dmrrowp") &&
1337-
!Name.substr(7).getAsInteger(10, IntVal) && IntVal < 32) {
1338-
RegNo = DMRROWpRegs[IntVal];
1339-
} else if (Name.starts_with_insensitive("dmrrow") &&
1340-
!Name.substr(6).getAsInteger(10, IntVal) && IntVal < 64) {
1341-
RegNo = DMRROWRegs[IntVal];
1342-
} else if (Name.starts_with_insensitive("dmrp") &&
1343-
!Name.substr(4).getAsInteger(10, IntVal) && IntVal < 4) {
1344-
RegNo = DMRROWpRegs[IntVal];
1345-
} else if (Name.starts_with_insensitive("dmr") &&
1346-
!Name.substr(3).getAsInteger(10, IntVal) && IntVal < 8) {
1347-
RegNo = DMRRegs[IntVal];
1348-
} else
1349-
return MCRegister();
13501323

13511324
getParser().Lex();
13521325
return RegNo;
@@ -1874,7 +1847,6 @@ extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializePowerPCAsmParser() {
18741847
RegisterMCAsmParser<PPCAsmParser> D(getThePPC64LETarget());
18751848
}
18761849

1877-
#define GET_REGISTER_MATCHER
18781850
#define GET_MATCHER_IMPLEMENTATION
18791851
#define GET_MNEMONIC_SPELL_CHECKER
18801852
#include "PPCGenAsmMatcher.inc"

llvm/lib/Target/PowerPC/PPC.td

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -719,7 +719,8 @@ def PPCAsmWriter : AsmWriter {
719719
}
720720

721721
def PPCAsmParser : AsmParser {
722-
let ShouldEmitMatchRegisterName = 0;
722+
let ShouldEmitMatchRegisterName = 1;
723+
let AllowDuplicateRegisterNames = 1;
723724
}
724725

725726
def PPCAsmParserVariant : AsmParserVariant {

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