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[APInt] Fix APInt constructions where value does not fit bitwidth (NFCI) (#80309)
This fixes all the places that hit the new assertion added in #106524 in tests. That is, cases where the value passed to the APInt constructor is not an N-bit signed/unsigned integer, where N is the bit width and signedness is determined by the isSigned flag. The fixes either set the correct value for isSigned, set the implicitTrunc flag, or perform more calculations inside APInt. Note that the assertion is currently still disabled by default, so this patch is mostly NFC.
1 parent 3ae6b57 commit 255a99c

31 files changed

+103
-64
lines changed

‎clang/include/clang/Sema/Sema.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -6755,7 +6755,7 @@ class Sema final : public SemaBase {
67556755

67566756
ExprResult BuildPredefinedExpr(SourceLocation Loc, PredefinedIdentKind IK);
67576757
ExprResult ActOnPredefinedExpr(SourceLocation Loc, tok::TokenKind Kind);
6758-
ExprResult ActOnIntegerConstant(SourceLocation Loc, uint64_t Val);
6758+
ExprResult ActOnIntegerConstant(SourceLocation Loc, int64_t Val);
67596759

67606760
bool CheckLoopHintExpr(Expr *E, SourceLocation Loc, bool AllowZero);
67616761

‎clang/lib/AST/ByteCode/IntegralAP.h

Lines changed: 5 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -61,7 +61,7 @@ template <bool Signed> class IntegralAP final {
6161

6262
IntegralAP(APInt V) : V(V) {}
6363
/// Arbitrary value for uninitialized variables.
64-
IntegralAP() : IntegralAP(-1, 3) {}
64+
IntegralAP() : IntegralAP(Signed ? -1 : 7, 3) {}
6565

6666
IntegralAP operator-() const { return IntegralAP(-V); }
6767
IntegralAP operator-(const IntegralAP &Other) const {
@@ -112,7 +112,10 @@ template <bool Signed> class IntegralAP final {
112112

113113
template <unsigned Bits, bool InputSigned>
114114
static IntegralAP from(Integral<Bits, InputSigned> I, unsigned BitWidth) {
115-
APInt Copy = APInt(BitWidth, static_cast<uint64_t>(I), InputSigned);
115+
// TODO: Avoid implicit trunc?
116+
// See https://github.com/llvm/llvm-project/issues/112510.
117+
APInt Copy = APInt(BitWidth, static_cast<uint64_t>(I), InputSigned,
118+
/*implicitTrunc=*/true);
116119

117120
return IntegralAP<Signed>(Copy);
118121
}

‎clang/lib/CodeGen/CGVTT.cpp

Lines changed: 3 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -85,8 +85,9 @@ CodeGenVTables::EmitVTTDefinition(llvm::GlobalVariable *VTT,
8585
cast<llvm::StructType>(VTable->getValueType())
8686
->getElementType(AddressPoint.VTableIndex));
8787
unsigned Offset = ComponentSize * AddressPoint.AddressPointIndex;
88-
llvm::ConstantRange InRange(llvm::APInt(32, -Offset, true),
89-
llvm::APInt(32, VTableSize - Offset, true));
88+
llvm::ConstantRange InRange(
89+
llvm::APInt(32, (int)-Offset, true),
90+
llvm::APInt(32, (int)(VTableSize - Offset), true));
9091
llvm::Constant *Init = llvm::ConstantExpr::getGetElementPtr(
9192
VTable->getValueType(), VTable, Idxs, /*InBounds=*/true, InRange);
9293

‎clang/lib/CodeGen/ItaniumCXXABI.cpp

Lines changed: 3 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -2099,8 +2099,9 @@ ItaniumCXXABI::getVTableAddressPoint(BaseSubobject Base,
20992099
unsigned VTableSize =
21002100
ComponentSize * Layout.getVTableSize(AddressPoint.VTableIndex);
21012101
unsigned Offset = ComponentSize * AddressPoint.AddressPointIndex;
2102-
llvm::ConstantRange InRange(llvm::APInt(32, -Offset, true),
2103-
llvm::APInt(32, VTableSize - Offset, true));
2102+
llvm::ConstantRange InRange(
2103+
llvm::APInt(32, (int)-Offset, true),
2104+
llvm::APInt(32, (int)(VTableSize - Offset), true));
21042105
return llvm::ConstantExpr::getGetElementPtr(
21052106
VTable->getValueType(), VTable, Indices, /*InBounds=*/true, InRange);
21062107
}

‎clang/lib/Parse/ParseInit.cpp

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -436,9 +436,9 @@ ExprResult Parser::createEmbedExpr() {
436436
ASTContext &Context = Actions.getASTContext();
437437
SourceLocation StartLoc = ConsumeAnnotationToken();
438438
if (Data->BinaryData.size() == 1) {
439-
Res = IntegerLiteral::Create(Context,
440-
llvm::APInt(CHAR_BIT, Data->BinaryData.back()),
441-
Context.UnsignedCharTy, StartLoc);
439+
Res = IntegerLiteral::Create(
440+
Context, llvm::APInt(CHAR_BIT, (unsigned char)Data->BinaryData.back()),
441+
Context.UnsignedCharTy, StartLoc);
442442
} else {
443443
auto CreateStringLiteralFromStringRef = [&](StringRef Str, QualType Ty) {
444444
llvm::APSInt ArraySize =

‎clang/lib/Sema/SemaExpr.cpp

Lines changed: 3 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -3598,9 +3598,10 @@ ExprResult Sema::ActOnCharacterConstant(const Token &Tok, Scope *UDLScope) {
35983598
Lit, Tok.getLocation());
35993599
}
36003600

3601-
ExprResult Sema::ActOnIntegerConstant(SourceLocation Loc, uint64_t Val) {
3601+
ExprResult Sema::ActOnIntegerConstant(SourceLocation Loc, int64_t Val) {
36023602
unsigned IntSize = Context.getTargetInfo().getIntWidth();
3603-
return IntegerLiteral::Create(Context, llvm::APInt(IntSize, Val),
3603+
return IntegerLiteral::Create(Context,
3604+
llvm::APInt(IntSize, Val, /*isSigned=*/true),
36043605
Context.IntTy, Loc);
36053606
}
36063607

‎clang/lib/Sema/SemaOpenMP.cpp

Lines changed: 3 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -5697,7 +5697,9 @@ StmtResult SemaOpenMP::ActOnOpenMPCanonicalLoop(Stmt *AStmt) {
56975697
llvm_unreachable("unhandled unary increment operator");
56985698
}
56995699
Step = IntegerLiteral::Create(
5700-
Ctx, llvm::APInt(Ctx.getIntWidth(LogicalTy), Direction), LogicalTy, {});
5700+
Ctx,
5701+
llvm::APInt(Ctx.getIntWidth(LogicalTy), Direction, /*isSigned=*/true),
5702+
LogicalTy, {});
57015703
} else if (auto *IncBin = dyn_cast<BinaryOperator>(Inc)) {
57025704
if (IncBin->getOpcode() == BO_AddAssign) {
57035705
Step = IncBin->getRHS();

‎lldb/source/Expression/DWARFExpression.cpp

Lines changed: 5 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -860,10 +860,12 @@ llvm::Expected<Value> DWARFExpression::Evaluate(
860860
// TODO: Implement a real typed stack, and store the genericness of the value
861861
// there.
862862
auto to_generic = [&](auto v) {
863+
// TODO: Avoid implicit trunc?
864+
// See https://github.com/llvm/llvm-project/issues/112510.
863865
bool is_signed = std::is_signed<decltype(v)>::value;
864-
return Scalar(llvm::APSInt(
865-
llvm::APInt(8 * opcodes.GetAddressByteSize(), v, is_signed),
866-
!is_signed));
866+
return Scalar(llvm::APSInt(llvm::APInt(8 * opcodes.GetAddressByteSize(), v,
867+
is_signed, /*implicitTrunc=*/true),
868+
!is_signed));
867869
};
868870

869871
// The default kind is a memory location. This is updated by any

‎llvm/include/llvm/ADT/APFixedPoint.h

Lines changed: 3 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -168,7 +168,9 @@ class APFixedPoint {
168168
}
169169

170170
APFixedPoint(uint64_t Val, const FixedPointSemantics &Sema)
171-
: APFixedPoint(APInt(Sema.getWidth(), Val, Sema.isSigned()), Sema) {}
171+
: APFixedPoint(APInt(Sema.getWidth(), Val, Sema.isSigned(),
172+
/*implicitTrunc=*/true),
173+
Sema) {}
172174

173175
// Zero initialization.
174176
APFixedPoint(const FixedPointSemantics &Sema) : APFixedPoint(0, Sema) {}

‎llvm/lib/Analysis/ConstantFolding.cpp

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -888,7 +888,8 @@ Constant *SymbolicallyEvaluateGEP(const GEPOperator *GEP,
888888
APInt Offset = APInt(
889889
BitWidth,
890890
DL.getIndexedOffsetInType(
891-
SrcElemTy, ArrayRef((Value *const *)Ops.data() + 1, Ops.size() - 1)));
891+
SrcElemTy, ArrayRef((Value *const *)Ops.data() + 1, Ops.size() - 1)),
892+
/*isSigned=*/true, /*implicitTrunc=*/true);
892893

893894
std::optional<ConstantRange> InRange = GEP->getInRange();
894895
if (InRange)

‎llvm/lib/Analysis/Loads.cpp

Lines changed: 2 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -95,10 +95,8 @@ static bool isDereferenceableAndAlignedPointer(
9595

9696
auto IsKnownDeref = [&]() {
9797
bool CheckForNonNull, CheckForFreed;
98-
APInt KnownDerefBytes(Size.getBitWidth(),
99-
V->getPointerDereferenceableBytes(DL, CheckForNonNull,
100-
CheckForFreed));
101-
if (!KnownDerefBytes.getBoolValue() || !KnownDerefBytes.uge(Size) ||
98+
if (!Size.ule(V->getPointerDereferenceableBytes(DL, CheckForNonNull,
99+
CheckForFreed)) ||
102100
CheckForFreed)
103101
return false;
104102
if (CheckForNonNull &&

‎llvm/lib/Analysis/MemoryBuiltins.cpp

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -767,6 +767,8 @@ SizeOffsetAPInt ObjectSizeOffsetVisitor::visitAllocaInst(AllocaInst &I) {
767767
TypeSize ElemSize = DL.getTypeAllocSize(I.getAllocatedType());
768768
if (ElemSize.isScalable() && Options.EvalMode != ObjectSizeOpts::Mode::Min)
769769
return ObjectSizeOffsetVisitor::unknown();
770+
if (!isUIntN(IntTyBits, ElemSize.getKnownMinValue()))
771+
return ObjectSizeOffsetVisitor::unknown();
770772
APInt Size(IntTyBits, ElemSize.getKnownMinValue());
771773
if (!I.isArrayAllocation())
772774
return SizeOffsetAPInt(align(Size, I.getAlign()), Zero);

‎llvm/lib/Analysis/ScalarEvolution.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -6883,7 +6883,7 @@ const ConstantRange &ScalarEvolution::getRangeRef(
68836883
bool CanBeNull, CanBeFreed;
68846884
uint64_t DerefBytes =
68856885
V->getPointerDereferenceableBytes(DL, CanBeNull, CanBeFreed);
6886-
if (DerefBytes > 1) {
6886+
if (DerefBytes > 1 && isUIntN(BitWidth, DerefBytes)) {
68876887
// The highest address the object can start is DerefBytes bytes before
68886888
// the end (unsigned max value). If this value is not a multiple of the
68896889
// alignment, the last possible start value is the next lowest multiple

‎llvm/lib/Bitcode/Reader/BitcodeReader.cpp

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -876,7 +876,8 @@ class BitcodeReader : public BitcodeReaderBase, public GVMaterializer {
876876
} else {
877877
int64_t Start = BitcodeReader::decodeSignRotatedValue(Record[OpNum++]);
878878
int64_t End = BitcodeReader::decodeSignRotatedValue(Record[OpNum++]);
879-
return ConstantRange(APInt(BitWidth, Start), APInt(BitWidth, End));
879+
return ConstantRange(APInt(BitWidth, Start, true),
880+
APInt(BitWidth, End, true));
880881
}
881882
}
882883

‎llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp

Lines changed: 5 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1641,7 +1641,11 @@ SDValue SelectionDAG::getConstant(uint64_t Val, const SDLoc &DL, EVT VT,
16411641
assert((EltVT.getSizeInBits() >= 64 ||
16421642
(uint64_t)((int64_t)Val >> EltVT.getSizeInBits()) + 1 < 2) &&
16431643
"getConstant with a uint64_t value that doesn't fit in the type!");
1644-
return getConstant(APInt(EltVT.getSizeInBits(), Val), DL, VT, isT, isO);
1644+
// TODO: Avoid implicit trunc?
1645+
// See https://github.com/llvm/llvm-project/issues/112510.
1646+
return getConstant(APInt(EltVT.getSizeInBits(), Val, /*isSigned=*/false,
1647+
/*implicitTrunc=*/true),
1648+
DL, VT, isT, isO);
16451649
}
16461650

16471651
SDValue SelectionDAG::getConstant(const APInt &Val, const SDLoc &DL, EVT VT,

‎llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -4333,7 +4333,8 @@ void SelectionDAGBuilder::visitGetElementPtr(const User &I) {
43334333
GTI.getSequentialElementStride(DAG.getDataLayout());
43344334
// We intentionally mask away the high bits here; ElementSize may not
43354335
// fit in IdxTy.
4336-
APInt ElementMul(IdxSize, ElementSize.getKnownMinValue());
4336+
APInt ElementMul(IdxSize, ElementSize.getKnownMinValue(),
4337+
/*isSigned=*/false, /*implicitTrunc=*/true);
43374338
bool ElementScalable = ElementSize.isScalable();
43384339

43394340
// If this is a scalar constant or a splat vector of constants,

‎llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp

Lines changed: 8 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -2200,7 +2200,10 @@ ScheduleDAGSDNodes *SelectionDAGISel::CreateScheduler() {
22002200
bool SelectionDAGISel::CheckAndMask(SDValue LHS, ConstantSDNode *RHS,
22012201
int64_t DesiredMaskS) const {
22022202
const APInt &ActualMask = RHS->getAPIntValue();
2203-
const APInt &DesiredMask = APInt(LHS.getValueSizeInBits(), DesiredMaskS);
2203+
// TODO: Avoid implicit trunc?
2204+
// See https://github.com/llvm/llvm-project/issues/112510.
2205+
const APInt &DesiredMask = APInt(LHS.getValueSizeInBits(), DesiredMaskS,
2206+
/*isSigned=*/false, /*implicitTrunc=*/true);
22042207

22052208
// If the actual mask exactly matches, success!
22062209
if (ActualMask == DesiredMask)
@@ -2229,7 +2232,10 @@ bool SelectionDAGISel::CheckAndMask(SDValue LHS, ConstantSDNode *RHS,
22292232
bool SelectionDAGISel::CheckOrMask(SDValue LHS, ConstantSDNode *RHS,
22302233
int64_t DesiredMaskS) const {
22312234
const APInt &ActualMask = RHS->getAPIntValue();
2232-
const APInt &DesiredMask = APInt(LHS.getValueSizeInBits(), DesiredMaskS);
2235+
// TODO: Avoid implicit trunc?
2236+
// See https://github.com/llvm/llvm-project/issues/112510.
2237+
const APInt &DesiredMask = APInt(LHS.getValueSizeInBits(), DesiredMaskS,
2238+
/*isSigned=*/false, /*implicitTrunc=*/true);
22332239

22342240
// If the actual mask exactly matches, success!
22352241
if (ActualMask == DesiredMask)

‎llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp

Lines changed: 6 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -6813,7 +6813,9 @@ TargetLowering::prepareUREMEqFold(EVT SETCCVT, SDValue REMNode,
68136813

68146814
PAmts.push_back(DAG.getConstant(P, DL, SVT));
68156815
KAmts.push_back(
6816-
DAG.getConstant(APInt(ShSVT.getSizeInBits(), K), DL, ShSVT));
6816+
DAG.getConstant(APInt(ShSVT.getSizeInBits(), K, /*isSigned=*/false,
6817+
/*implicitTrunc=*/true),
6818+
DL, ShSVT));
68176819
QAmts.push_back(DAG.getConstant(Q, DL, SVT));
68186820
return true;
68196821
};
@@ -7084,7 +7086,9 @@ TargetLowering::prepareSREMEqFold(EVT SETCCVT, SDValue REMNode,
70847086
PAmts.push_back(DAG.getConstant(P, DL, SVT));
70857087
AAmts.push_back(DAG.getConstant(A, DL, SVT));
70867088
KAmts.push_back(
7087-
DAG.getConstant(APInt(ShSVT.getSizeInBits(), K), DL, ShSVT));
7089+
DAG.getConstant(APInt(ShSVT.getSizeInBits(), K, /*isSigned=*/false,
7090+
/*implicitTrunc=*/true),
7091+
DL, ShSVT));
70887092
QAmts.push_back(DAG.getConstant(Q, DL, SVT));
70897093
return true;
70907094
};

‎llvm/lib/ExecutionEngine/MCJIT/MCJIT.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -588,7 +588,7 @@ GenericValue MCJIT::runFunction(Function *F, ArrayRef<GenericValue> ArgValues) {
588588
return rv;
589589
}
590590
case Type::VoidTyID:
591-
rv.IntVal = APInt(32, ((int(*)())(intptr_t)FPtr)());
591+
rv.IntVal = APInt(32, ((int (*)())(intptr_t)FPtr)(), true);
592592
return rv;
593593
case Type::FloatTyID:
594594
rv.FloatVal = ((float(*)())(intptr_t)FPtr)();

‎llvm/lib/IR/Constants.cpp

Lines changed: 4 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -932,7 +932,10 @@ Constant *ConstantInt::get(Type *Ty, uint64_t V, bool isSigned) {
932932
}
933933

934934
ConstantInt *ConstantInt::get(IntegerType *Ty, uint64_t V, bool isSigned) {
935-
return get(Ty->getContext(), APInt(Ty->getBitWidth(), V, isSigned));
935+
// TODO: Avoid implicit trunc?
936+
// See https://github.com/llvm/llvm-project/issues/112510.
937+
return get(Ty->getContext(),
938+
APInt(Ty->getBitWidth(), V, isSigned, /*implicitTrunc=*/true));
936939
}
937940

938941
Constant *ConstantInt::get(Type *Ty, const APInt& V) {

‎llvm/lib/Target/AArch64/AArch64ISelLowering.cpp

Lines changed: 16 additions & 16 deletions
Original file line numberDiff line numberDiff line change
@@ -2400,10 +2400,11 @@ void AArch64TargetLowering::computeKnownBitsForTargetNode(
24002400
}
24012401
case AArch64ISD::BICi: {
24022402
// Compute the bit cleared value.
2403-
uint64_t Mask =
2404-
~(Op->getConstantOperandVal(1) << Op->getConstantOperandVal(2));
2403+
APInt Mask =
2404+
~(Op->getConstantOperandAPInt(1) << Op->getConstantOperandAPInt(2))
2405+
.trunc(Known.getBitWidth());
24052406
Known = DAG.computeKnownBits(Op->getOperand(0), Depth + 1);
2406-
Known &= KnownBits::makeConstant(APInt(Known.getBitWidth(), Mask));
2407+
Known &= KnownBits::makeConstant(Mask);
24072408
break;
24082409
}
24092410
case AArch64ISD::VLSHR: {
@@ -12839,7 +12840,8 @@ static bool isEXTMask(ArrayRef<int> M, EVT VT, bool &ReverseEXT,
1283912840
// Benefit form APInt to handle overflow when calculating expected element.
1284012841
unsigned NumElts = VT.getVectorNumElements();
1284112842
unsigned MaskBits = APInt(32, NumElts * 2).logBase2();
12842-
APInt ExpectedElt = APInt(MaskBits, *FirstRealElt + 1);
12843+
APInt ExpectedElt = APInt(MaskBits, *FirstRealElt + 1, /*isSigned=*/false,
12844+
/*implicitTrunc=*/true);
1284312845
// The following shuffle indices must be the successive elements after the
1284412846
// first real element.
1284512847
bool FoundWrongElt = std::any_of(FirstRealElt + 1, M.end(), [&](int Elt) {
@@ -14306,9 +14308,9 @@ static SDValue NormalizeBuildVector(SDValue Op,
1430614308
// (with operands cast to integers), then the only possibilities
1430714309
// are constants and UNDEFs.
1430814310
if (auto *CstLane = dyn_cast<ConstantSDNode>(Lane)) {
14309-
APInt LowBits(EltTy.getSizeInBits(),
14310-
CstLane->getZExtValue());
14311-
Lane = DAG.getConstant(LowBits.getZExtValue(), dl, MVT::i32);
14311+
Lane = DAG.getConstant(
14312+
CstLane->getAPIntValue().trunc(EltTy.getSizeInBits()).getZExtValue(),
14313+
dl, MVT::i32);
1431214314
} else if (Lane.getNode()->isUndef()) {
1431314315
Lane = DAG.getUNDEF(MVT::i32);
1431414316
} else {
@@ -23713,7 +23715,7 @@ static bool findMoreOptimalIndexType(const MaskedGatherScatterSDNode *N,
2371323715
EVT NewIndexVT = IndexVT.changeVectorElementType(MVT::i32);
2371423716
// Stride does not scale explicitly by 'Scale', because it happens in
2371523717
// the gather/scatter addressing mode.
23716-
Index = DAG.getStepVector(SDLoc(N), NewIndexVT, APInt(32, Stride));
23718+
Index = DAG.getStepVector(SDLoc(N), NewIndexVT, APInt(32, Stride, true));
2371723719
return true;
2371823720
}
2371923721

@@ -28727,7 +28729,7 @@ static SDValue GenerateFixedLengthSVETBL(SDValue Op, SDValue Op1, SDValue Op2,
2872728729
unsigned BitsPerElt = VTOp1.getVectorElementType().getSizeInBits();
2872828730
unsigned IndexLen = MinSVESize / BitsPerElt;
2872928731
unsigned ElementsPerVectorReg = VTOp1.getVectorNumElements();
28730-
uint64_t MaxOffset = APInt(BitsPerElt, -1, false).getZExtValue();
28732+
uint64_t MaxOffset = maxUIntN(BitsPerElt);
2873128733
EVT MaskEltType = VTOp1.getVectorElementType().changeTypeToInteger();
2873228734
EVT MaskType = EVT::getVectorVT(*DAG.getContext(), MaskEltType, IndexLen);
2873328735
bool MinMaxEqual = (MinSVESize == MaxSVESize);
@@ -29085,16 +29087,14 @@ bool AArch64TargetLowering::SimplifyDemandedBitsForTargetNode(
2908529087
KnownBits KnownOp0 =
2908629088
TLO.DAG.computeKnownBits(Op0, OriginalDemandedElts, Depth + 1);
2908729089
// Op0 &= ~(ConstantOperandVal(1) << ConstantOperandVal(2))
29088-
uint64_t BitsToClear = Op->getConstantOperandVal(1)
29089-
<< Op->getConstantOperandVal(2);
29090+
APInt BitsToClear =
29091+
(Op->getConstantOperandAPInt(1) << Op->getConstantOperandAPInt(2))
29092+
.trunc(KnownOp0.getBitWidth());
2909029093
APInt AlreadyZeroedBitsToClear = BitsToClear & KnownOp0.Zero;
29091-
if (APInt(Known.getBitWidth(), BitsToClear)
29092-
.isSubsetOf(AlreadyZeroedBitsToClear))
29094+
if (BitsToClear.isSubsetOf(AlreadyZeroedBitsToClear))
2909329095
return TLO.CombineTo(Op, Op0);
2909429096

29095-
Known = KnownOp0 &
29096-
KnownBits::makeConstant(APInt(Known.getBitWidth(), ~BitsToClear));
29097-
29097+
Known = KnownOp0 & KnownBits::makeConstant(~BitsToClear);
2909829098
return false;
2909929099
}
2910029100
case ISD::INTRINSIC_WO_CHAIN: {

‎llvm/lib/Target/AMDGPU/SIInstrInfo.cpp

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -3441,7 +3441,8 @@ bool SIInstrInfo::foldImmediate(MachineInstr &UseMI, MachineInstr &DefMI,
34413441
: AMDGPU::V_MOV_B32_e32
34423442
: Is64Bit ? AMDGPU::S_MOV_B64_IMM_PSEUDO
34433443
: AMDGPU::S_MOV_B32;
3444-
APInt Imm(Is64Bit ? 64 : 32, getImmFor(UseMI.getOperand(1)));
3444+
APInt Imm(Is64Bit ? 64 : 32, getImmFor(UseMI.getOperand(1)),
3445+
/*isSigned=*/true, /*implicitTrunc=*/true);
34453446

34463447
if (RI.isAGPR(*MRI, DstReg)) {
34473448
if (Is64Bit || !isInlineConstant(Imm))

‎llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -213,12 +213,12 @@ static unsigned canModifyToInlineImmOp32(const SIInstrInfo *TII,
213213
// that SCC is not live as S_NOT_B32 clobbers it. It's probably not worth
214214
// it, as the reasonable values are already covered by s_movk_i32.
215215
ModifiedImm = ~SrcImm;
216-
if (TII->isInlineConstant(APInt(32, ModifiedImm)))
216+
if (TII->isInlineConstant(APInt(32, ModifiedImm, true)))
217217
return AMDGPU::V_NOT_B32_e32;
218218
}
219219

220220
ModifiedImm = reverseBits<int32_t>(SrcImm);
221-
if (TII->isInlineConstant(APInt(32, ModifiedImm)))
221+
if (TII->isInlineConstant(APInt(32, ModifiedImm, true)))
222222
return Scalar ? AMDGPU::S_BREV_B32 : AMDGPU::V_BFREV_B32_e32;
223223

224224
return 0;

‎llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1158,7 +1158,8 @@ class ARMOperand : public MCParsedAsmOperand {
11581158
bool isFPImm() const {
11591159
if (!isImm()) return false;
11601160
const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(getImm());
1161-
if (!CE) return false;
1161+
if (!CE || !isUInt<32>(CE->getValue()))
1162+
return false;
11621163
int Val = ARM_AM::getFP32Imm(APInt(32, CE->getValue()));
11631164
return Val != -1;
11641165
}

‎llvm/lib/Target/Hexagon/HexagonConstPropagation.cpp

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -2503,7 +2503,8 @@ APInt HexagonConstEvaluator::getCmpImm(unsigned Opc, unsigned OpX,
25032503
}
25042504

25052505
uint64_t Val = MO.getImm();
2506-
return APInt(32, Val, Signed);
2506+
// TODO: Is implicitTrunc correct here?
2507+
return APInt(32, Val, Signed, /*implicitTrunc=*/true);
25072508
}
25082509

25092510
void HexagonConstEvaluator::replaceWithNop(MachineInstr &MI) {

‎llvm/lib/Target/Hexagon/HexagonGenExtract.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -171,7 +171,7 @@ bool HexagonGenExtract::convert(Instruction *In) {
171171
// this value.
172172
if (!LogicalSR && (SR > SL))
173173
return false;
174-
APInt A = APInt(BW, ~0ULL).lshr(SR).shl(SL);
174+
APInt A = APInt(BW, ~0ULL, true).lshr(SR).shl(SL);
175175
CM = ConstantInt::get(Ctx, A);
176176
}
177177

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