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[InstCombine] Add Tests for Testing Bits; NFC
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llvm/test/Transforms/InstCombine/icmp-and-shift.ll

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@@ -606,3 +606,190 @@ define i1 @fold_ne_rhs_fail_shift_not_1s(i8 %x, i8 %yy) {
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%r = icmp ne i8 %and, 0
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ret i1 %r
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}
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define i1 @test_shl_sub_bw_minus_1_slt_0(i32 %a, i32 %b) {
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; CHECK-LABEL: @test_shl_sub_bw_minus_1_slt_0(
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; CHECK-NEXT: [[SUB:%.*]] = sub i32 31, [[B:%.*]]
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; CHECK-NEXT: [[SHL:%.*]] = shl i32 [[A:%.*]], [[SUB]]
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; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[SHL]], 0
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; CHECK-NEXT: ret i1 [[CMP]]
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;
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%sub = sub i32 31, %b
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%shl = shl i32 %a, %sub
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%cmp = icmp slt i32 %shl, 0
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ret i1 %cmp
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}
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define i1 @test_const_shl_sub_bw_minus_1_slt_0(i32 %b) {
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; CHECK-LABEL: @test_const_shl_sub_bw_minus_1_slt_0(
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; CHECK-NEXT: [[SUB:%.*]] = sub i32 31, [[B:%.*]]
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; CHECK-NEXT: [[SHL:%.*]] = shl i32 42, [[SUB]]
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; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[SHL]], 0
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; CHECK-NEXT: ret i1 [[CMP]]
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;
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%sub = sub i32 31, %b
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%shl = shl i32 42, %sub
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%cmp = icmp slt i32 %shl, 0
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ret i1 %cmp
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}
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define i1 @test_not_shl_sub_bw_minus_1_slt_0(i32 %a, i32 %b) {
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; CHECK-LABEL: @test_not_shl_sub_bw_minus_1_slt_0(
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; CHECK-NEXT: [[SUB:%.*]] = sub i32 31, [[B:%.*]]
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; CHECK-NEXT: [[SHL:%.*]] = shl i32 [[A:%.*]], [[SUB]]
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; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[SHL]], -1
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; CHECK-NEXT: ret i1 [[CMP]]
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;
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%sub = sub i32 31, %b
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%shl = shl i32 %a, %sub
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%cmp = icmp sge i32 %shl, 0
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ret i1 %cmp
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}
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define i1 @test_shl_nuw_sub_bw_minus_1_slt_0(i32 %a, i32 %b) {
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; CHECK-LABEL: @test_shl_nuw_sub_bw_minus_1_slt_0(
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; CHECK-NEXT: [[SUB:%.*]] = sub i32 31, [[B:%.*]]
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; CHECK-NEXT: [[SHL:%.*]] = shl nuw i32 [[A:%.*]], [[SUB]]
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; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[SHL]], 0
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; CHECK-NEXT: ret i1 [[CMP]]
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;
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%sub = sub i32 31, %b
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%shl = shl nuw i32 %a, %sub
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%cmp = icmp slt i32 %shl, 0
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ret i1 %cmp
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}
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define i1 @test_not_const_shl_sub_bw_minus_1_slt_0(i32 %b) {
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; CHECK-LABEL: @test_not_const_shl_sub_bw_minus_1_slt_0(
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; CHECK-NEXT: [[SUB:%.*]] = sub i32 31, [[B:%.*]]
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; CHECK-NEXT: [[SHL:%.*]] = shl i32 42, [[SUB]]
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; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[SHL]], -1
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; CHECK-NEXT: ret i1 [[CMP]]
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;
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%sub = sub i32 31, %b
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%shl = shl i32 42, %sub
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%cmp = icmp sge i32 %shl, 0
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ret i1 %cmp
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}
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define <8 x i1> @test_shl_sub_bw_minus_1_slt_0_v8i8(<8 x i8> %a, <8 x i8> %b) {
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; CHECK-LABEL: @test_shl_sub_bw_minus_1_slt_0_v8i8(
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; CHECK-NEXT: [[SUB:%.*]] = sub <8 x i8> <i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7>, [[B:%.*]]
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; CHECK-NEXT: [[SHL:%.*]] = shl <8 x i8> [[A:%.*]], [[SUB]]
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; CHECK-NEXT: [[CMP:%.*]] = icmp slt <8 x i8> [[SHL]], zeroinitializer
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; CHECK-NEXT: ret <8 x i1> [[CMP]]
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;
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%sub = sub <8 x i8> <i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7>, %b
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%shl = shl <8 x i8> %a, %sub
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%cmp = icmp slt <8 x i8> %shl, zeroinitializer
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ret <8 x i1> %cmp
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}
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define <8 x i1> @test_const_shl_sub_bw_minus_1_slt_0_v8i8_splat(<8 x i8> %b) {
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; CHECK-LABEL: @test_const_shl_sub_bw_minus_1_slt_0_v8i8_splat(
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; CHECK-NEXT: [[SUB:%.*]] = sub <8 x i8> <i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7>, [[B:%.*]]
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; CHECK-NEXT: [[SHL:%.*]] = shl <8 x i8> <i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42>, [[SUB]]
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; CHECK-NEXT: [[CMP:%.*]] = icmp slt <8 x i8> [[SHL]], zeroinitializer
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; CHECK-NEXT: ret <8 x i1> [[CMP]]
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;
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%sub = sub <8 x i8> <i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7>, %b
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%shl = shl <8 x i8> <i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42>, %sub
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%cmp = icmp slt <8 x i8> %shl, zeroinitializer
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ret <8 x i1> %cmp
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}
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define <8 x i1> @test_const_shl_sub_bw_minus_1_slt_0_v8i8_splat_poison_1(<8 x i8> %b) {
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; CHECK-LABEL: @test_const_shl_sub_bw_minus_1_slt_0_v8i8_splat_poison_1(
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; CHECK-NEXT: [[SUB:%.*]] = sub <8 x i8> <i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 poison>, [[B:%.*]]
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; CHECK-NEXT: [[SHL:%.*]] = shl <8 x i8> <i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42>, [[SUB]]
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; CHECK-NEXT: [[CMP:%.*]] = icmp slt <8 x i8> [[SHL]], zeroinitializer
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; CHECK-NEXT: ret <8 x i1> [[CMP]]
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;
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%sub = sub <8 x i8> <i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 poison>, %b
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%shl = shl <8 x i8> <i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42>, %sub
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%cmp = icmp slt <8 x i8> %shl, zeroinitializer
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ret <8 x i1> %cmp
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}
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define <8 x i1> @test_const_shl_sub_bw_minus_1_slt_0_v8i8_splat_poison_2(<8 x i8> %b) {
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; CHECK-LABEL: @test_const_shl_sub_bw_minus_1_slt_0_v8i8_splat_poison_2(
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; CHECK-NEXT: [[SUB:%.*]] = sub <8 x i8> <i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7>, [[B:%.*]]
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; CHECK-NEXT: [[SHL:%.*]] = shl <8 x i8> <i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 poison>, [[SUB]]
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; CHECK-NEXT: [[CMP:%.*]] = icmp slt <8 x i8> [[SHL]], zeroinitializer
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; CHECK-NEXT: ret <8 x i1> [[CMP]]
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;
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%sub = sub <8 x i8> <i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7>, %b
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%shl = shl <8 x i8> <i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 poison>, %sub
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%cmp = icmp slt <8 x i8> %shl, zeroinitializer
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ret <8 x i1> %cmp
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}
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define <8 x i1> @test_const_shl_sub_bw_minus_1_slt_0_v8i8_nonsplat(<8 x i8> %b) {
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; CHECK-LABEL: @test_const_shl_sub_bw_minus_1_slt_0_v8i8_nonsplat(
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; CHECK-NEXT: [[SUB:%.*]] = sub <8 x i8> <i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7>, [[B:%.*]]
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; CHECK-NEXT: [[SHL:%.*]] = shl <8 x i8> <i8 42, i8 43, i8 44, i8 45, i8 46, i8 47, i8 48, i8 49>, [[SUB]]
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; CHECK-NEXT: [[CMP:%.*]] = icmp slt <8 x i8> [[SHL]], zeroinitializer
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; CHECK-NEXT: ret <8 x i1> [[CMP]]
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;
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%sub = sub <8 x i8> <i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7>, %b
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%shl = shl <8 x i8> <i8 42, i8 43, i8 44, i8 45, i8 46, i8 47, i8 48, i8 49>, %sub
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%cmp = icmp slt <8 x i8> %shl, zeroinitializer
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ret <8 x i1> %cmp
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}
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define i1 @test_shl_sub_non_bw_minus_1_slt_0_negative(i32 %a, i32 %b) {
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; CHECK-LABEL: @test_shl_sub_non_bw_minus_1_slt_0_negative(
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; CHECK-NEXT: [[SUB:%.*]] = sub i32 32, [[B:%.*]]
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; CHECK-NEXT: [[SHL:%.*]] = shl i32 [[A:%.*]], [[SUB]]
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; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[SHL]], 0
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; CHECK-NEXT: ret i1 [[CMP]]
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;
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%sub = sub i32 32, %b
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%shl = shl i32 %a, %sub
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%cmp = icmp slt i32 %shl, 0
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ret i1 %cmp
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}
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define i1 @test_shl_sub_bw_minus_1_slt_0_i1_negative(i1 %a, i1 %b) {
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; CHECK-LABEL: @test_shl_sub_bw_minus_1_slt_0_i1_negative(
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; CHECK-NEXT: ret i1 [[A:%.*]]
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;
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%sub = sub i1 0, %b
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%shl = shl i1 %a, %sub
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%cmp = icmp slt i1 %shl, 0
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ret i1 %cmp
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}
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define i1 @test_shl_sub_bw_minus_1_slt_0_multi_use_sub_negative(i32 %a, i32 %b) {
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; CHECK-LABEL: @test_shl_sub_bw_minus_1_slt_0_multi_use_sub_negative(
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; CHECK-NEXT: [[SUB:%.*]] = sub i32 31, [[B:%.*]]
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; CHECK-NEXT: [[SHL:%.*]] = shl i32 [[A:%.*]], [[SUB]]
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; CHECK-NEXT: [[CMP1:%.*]] = icmp slt i32 [[SHL]], 0
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; CHECK-NEXT: [[CMP2:%.*]] = icmp sgt i32 [[SUB]], [[B]]
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; CHECK-NEXT: [[RET:%.*]] = or i1 [[CMP1]], [[CMP2]]
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; CHECK-NEXT: ret i1 [[RET]]
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;
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%sub = sub i32 31, %b
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%shl = shl i32 %a, %sub
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%cmp1 = icmp slt i32 %shl, 0
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%cmp2 = icmp slt i32 %b, %sub
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%ret = or i1 %cmp1, %cmp2
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ret i1 %ret
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}
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define i1 @test_shl_sub_bw_minus_1_slt_0_multi_use_shl_negative(i32 %a, i32 %b) {
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; CHECK-LABEL: @test_shl_sub_bw_minus_1_slt_0_multi_use_shl_negative(
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; CHECK-NEXT: [[SUB:%.*]] = sub i32 31, [[B:%.*]]
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; CHECK-NEXT: [[SHL:%.*]] = shl i32 [[A:%.*]], [[SUB]]
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; CHECK-NEXT: [[CMP1:%.*]] = icmp slt i32 [[SHL]], 0
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; CHECK-NEXT: [[CMP2:%.*]] = icmp eq i32 [[SHL]], [[B]]
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; CHECK-NEXT: [[RET:%.*]] = and i1 [[CMP1]], [[CMP2]]
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; CHECK-NEXT: ret i1 [[RET]]
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;
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%sub = sub i32 31, %b
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%shl = shl i32 %a, %sub
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%cmp1 = icmp slt i32 %shl, 0
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%cmp2 = icmp eq i32 %b, %shl
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%ret = and i1 %cmp1, %cmp2
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ret i1 %ret
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}

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