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[AMDGPU] Remove FlatVariant argument from isLegalFlatAddressingMode. NFC. (#93938)
This argument is easily deduced from AS argument.
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2 files changed

+11
-12
lines changed

2 files changed

+11
-12
lines changed

llvm/lib/Target/AMDGPU/SIISelLowering.cpp

Lines changed: 10 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -1484,23 +1484,26 @@ bool SITargetLowering::getAddrModeArguments(IntrinsicInst *II,
14841484
}
14851485

14861486
bool SITargetLowering::isLegalFlatAddressingMode(const AddrMode &AM,
1487-
unsigned AddrSpace,
1488-
uint64_t FlatVariant) const {
1487+
unsigned AddrSpace) const {
14891488
if (!Subtarget->hasFlatInstOffsets()) {
14901489
// Flat instructions do not have offsets, and only have the register
14911490
// address.
14921491
return AM.BaseOffs == 0 && AM.Scale == 0;
14931492
}
14941493

1494+
decltype(SIInstrFlags::FLAT) FlatVariant =
1495+
AddrSpace == AMDGPUAS::GLOBAL_ADDRESS ? SIInstrFlags::FlatGlobal
1496+
: AddrSpace == AMDGPUAS::PRIVATE_ADDRESS ? SIInstrFlags::FlatScratch
1497+
: SIInstrFlags::FLAT;
1498+
14951499
return AM.Scale == 0 &&
14961500
(AM.BaseOffs == 0 || Subtarget->getInstrInfo()->isLegalFLATOffset(
14971501
AM.BaseOffs, AddrSpace, FlatVariant));
14981502
}
14991503

15001504
bool SITargetLowering::isLegalGlobalAddressingMode(const AddrMode &AM) const {
15011505
if (Subtarget->hasFlatGlobalInsts())
1502-
return isLegalFlatAddressingMode(AM, AMDGPUAS::GLOBAL_ADDRESS,
1503-
SIInstrFlags::FlatGlobal);
1506+
return isLegalFlatAddressingMode(AM, AMDGPUAS::GLOBAL_ADDRESS);
15041507

15051508
if (!Subtarget->hasAddr64() || Subtarget->useFlatForGlobal()) {
15061509
// Assume the we will use FLAT for all global memory accesses
@@ -1512,8 +1515,7 @@ bool SITargetLowering::isLegalGlobalAddressingMode(const AddrMode &AM) const {
15121515
// by setting the stride value in the resource descriptor which would
15131516
// increase the size limit to (stride * 4GB). However, this is risky,
15141517
// because it has never been validated.
1515-
return isLegalFlatAddressingMode(AM, AMDGPUAS::FLAT_ADDRESS,
1516-
SIInstrFlags::FLAT);
1518+
return isLegalFlatAddressingMode(AM, AMDGPUAS::FLAT_ADDRESS);
15171519
}
15181520

15191521
return isLegalMUBUFAddressingMode(AM);
@@ -1619,8 +1621,7 @@ bool SITargetLowering::isLegalAddressingMode(const DataLayout &DL,
16191621

16201622
if (AS == AMDGPUAS::PRIVATE_ADDRESS)
16211623
return Subtarget->enableFlatScratch()
1622-
? isLegalFlatAddressingMode(AM, AMDGPUAS::PRIVATE_ADDRESS,
1623-
SIInstrFlags::FlatScratch)
1624+
? isLegalFlatAddressingMode(AM, AMDGPUAS::PRIVATE_ADDRESS)
16241625
: isLegalMUBUFAddressingMode(AM);
16251626

16261627
if (AS == AMDGPUAS::LOCAL_ADDRESS ||
@@ -1647,8 +1648,7 @@ bool SITargetLowering::isLegalAddressingMode(const DataLayout &DL,
16471648
// computation. We don't have instructions that compute pointers with any
16481649
// addressing modes, so treat them as having no offset like flat
16491650
// instructions.
1650-
return isLegalFlatAddressingMode(AM, AMDGPUAS::FLAT_ADDRESS,
1651-
SIInstrFlags::FLAT);
1651+
return isLegalFlatAddressingMode(AM, AMDGPUAS::FLAT_ADDRESS);
16521652
}
16531653

16541654
// Assume a user alias of global for unknown address spaces.

llvm/lib/Target/AMDGPU/SIISelLowering.h

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -223,8 +223,7 @@ class SITargetLowering final : public AMDGPUTargetLowering {
223223
SDValue performClampCombine(SDNode *N, DAGCombinerInfo &DCI) const;
224224
SDValue performRcpCombine(SDNode *N, DAGCombinerInfo &DCI) const;
225225

226-
bool isLegalFlatAddressingMode(const AddrMode &AM, unsigned AddrSpace,
227-
uint64_t FlatVariant) const;
226+
bool isLegalFlatAddressingMode(const AddrMode &AM, unsigned AddrSpace) const;
228227
bool isLegalMUBUFAddressingMode(const AddrMode &AM) const;
229228

230229
unsigned isCFIntrinsic(const SDNode *Intr) const;

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