@@ -2845,26 +2845,26 @@ declare i32 @llvm.amdgcn.readfirstlane(i32)
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@gv = constant i32 0
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- define amdgpu_kernel void @readfirstlane_constant (i32 %arg ) {
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+ define amdgpu_kernel void @readfirstlane_constant (i32 %arg , ptr %ptr ) {
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; CHECK-LABEL: @readfirstlane_constant(
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; CHECK-NEXT: [[VAR:%.*]] = call i32 @llvm.amdgcn.readfirstlane.i32(i32 [[ARG:%.*]])
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- ; CHECK-NEXT: store volatile i32 [[VAR]], ptr undef , align 4
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- ; CHECK-NEXT: store volatile i32 0, ptr undef , align 4
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- ; CHECK-NEXT: store volatile i32 123, ptr undef , align 4
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- ; CHECK-NEXT: store volatile i32 ptrtoint (ptr @gv to i32), ptr undef , align 4
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- ; CHECK-NEXT: store volatile i32 undef, ptr undef , align 4
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+ ; CHECK-NEXT: store volatile i32 [[VAR]], ptr [[PTR:%.*]] , align 4
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+ ; CHECK-NEXT: store volatile i32 0, ptr [[PTR]] , align 4
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+ ; CHECK-NEXT: store volatile i32 123, ptr [[PTR]] , align 4
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+ ; CHECK-NEXT: store volatile i32 ptrtoint (ptr @gv to i32), ptr [[PTR]] , align 4
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+ ; CHECK-NEXT: store volatile i32 undef, ptr [[PTR]] , align 4
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; CHECK-NEXT: ret void
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;
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%var = call i32 @llvm.amdgcn.readfirstlane (i32 %arg )
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%zero = call i32 @llvm.amdgcn.readfirstlane (i32 0 )
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%imm = call i32 @llvm.amdgcn.readfirstlane (i32 123 )
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%constexpr = call i32 @llvm.amdgcn.readfirstlane (i32 ptrtoint (ptr @gv to i32 ))
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%undef = call i32 @llvm.amdgcn.readfirstlane (i32 undef )
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- store volatile i32 %var , ptr undef
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- store volatile i32 %zero , ptr undef
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- store volatile i32 %imm , ptr undef
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- store volatile i32 %constexpr , ptr undef
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- store volatile i32 %undef , ptr undef
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+ store volatile i32 %var , ptr %ptr
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+ store volatile i32 %zero , ptr %ptr
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+ store volatile i32 %imm , ptr %ptr
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+ store volatile i32 %constexpr , ptr %ptr
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+ store volatile i32 %undef , ptr %ptr
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ret void
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}
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@@ -2931,26 +2931,26 @@ bb1:
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declare i32 @llvm.amdgcn.readlane (i32 , i32 )
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- define amdgpu_kernel void @readlane_constant (i32 %arg , i32 %lane ) {
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+ define amdgpu_kernel void @readlane_constant (i32 %arg , i32 %lane , ptr %ptr ) {
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; CHECK-LABEL: @readlane_constant(
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; CHECK-NEXT: [[VAR:%.*]] = call i32 @llvm.amdgcn.readlane.i32(i32 [[ARG:%.*]], i32 7)
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- ; CHECK-NEXT: store volatile i32 [[VAR]], ptr undef , align 4
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- ; CHECK-NEXT: store volatile i32 0, ptr undef , align 4
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- ; CHECK-NEXT: store volatile i32 123, ptr undef , align 4
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- ; CHECK-NEXT: store volatile i32 ptrtoint (ptr @gv to i32), ptr undef , align 4
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- ; CHECK-NEXT: store volatile i32 undef, ptr undef , align 4
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+ ; CHECK-NEXT: store volatile i32 [[VAR]], ptr [[PTR:%.*]] , align 4
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+ ; CHECK-NEXT: store volatile i32 0, ptr [[PTR]] , align 4
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+ ; CHECK-NEXT: store volatile i32 123, ptr [[PTR]] , align 4
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+ ; CHECK-NEXT: store volatile i32 ptrtoint (ptr @gv to i32), ptr [[PTR]] , align 4
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+ ; CHECK-NEXT: store volatile i32 undef, ptr [[PTR]] , align 4
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; CHECK-NEXT: ret void
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;
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%var = call i32 @llvm.amdgcn.readlane (i32 %arg , i32 7 )
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%zero = call i32 @llvm.amdgcn.readlane (i32 0 , i32 %lane )
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%imm = call i32 @llvm.amdgcn.readlane (i32 123 , i32 %lane )
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%constexpr = call i32 @llvm.amdgcn.readlane (i32 ptrtoint (ptr @gv to i32 ), i32 %lane )
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%undef = call i32 @llvm.amdgcn.readlane (i32 undef , i32 %lane )
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- store volatile i32 %var , ptr undef
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- store volatile i32 %zero , ptr undef
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- store volatile i32 %imm , ptr undef
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- store volatile i32 %constexpr , ptr undef
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- store volatile i32 %undef , ptr undef
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+ store volatile i32 %var , ptr %ptr
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+ store volatile i32 %zero , ptr %ptr
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+ store volatile i32 %imm , ptr %ptr
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+ store volatile i32 %constexpr , ptr %ptr
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+ store volatile i32 %undef , ptr %ptr
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ret void
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}
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