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Chen Zheng
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[PPC] [NFC] add testcase for more store forwarding
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llvm/test/CodeGen/PowerPC/legalize-vaarg.ll

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@@ -1,6 +1,7 @@
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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;RUN: llc < %s --mtriple=powerpc64-unknown-linux-gnu -mattr=+altivec | FileCheck %s -check-prefix=BE
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;RUN: llc < %s --mtriple=powerpc64le-unknown-linux-gnu -mattr=+altivec | FileCheck %s -check-prefix=LE
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;RUN: llc < %s --mtriple=powerpc64-unknown-linux-gnu -mattr=+altivec -ppc-gather-alias-max-depth=0 | FileCheck %s -check-prefix=FORWARD
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define <8 x i32> @test_large_vec_vaarg(i32 %n, ...) {
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; BE-LABEL: test_large_vec_vaarg:
@@ -35,6 +36,22 @@ define <8 x i32> @test_large_vec_vaarg(i32 %n, ...) {
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; LE-NEXT: lxvd2x 0, 0, 3
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; LE-NEXT: xxswapd 35, 0
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; LE-NEXT: blr
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;
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; FORWARD-LABEL: test_large_vec_vaarg:
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; FORWARD: # %bb.0:
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; FORWARD-NEXT: ld 3, -8(1)
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; FORWARD-NEXT: addi 3, 3, 15
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; FORWARD-NEXT: rldicr 3, 3, 0, 59
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; FORWARD-NEXT: addi 4, 3, 16
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; FORWARD-NEXT: std 4, -8(1)
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; FORWARD-NEXT: ld 4, -8(1)
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; FORWARD-NEXT: lvx 2, 0, 3
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; FORWARD-NEXT: addi 4, 4, 15
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; FORWARD-NEXT: rldicr 3, 4, 0, 59
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; FORWARD-NEXT: addi 4, 3, 16
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; FORWARD-NEXT: std 4, -8(1)
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; FORWARD-NEXT: lvx 3, 0, 3
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; FORWARD-NEXT: blr
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%args = alloca ptr, align 4
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%x = va_arg ptr %args, <8 x i32>
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ret <8 x i32> %x

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