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Shao-Ce SUN
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[NFC][MC] remove unused argument MCRegisterInfo in MCCodeEmitter
Reviewed By: skan Differential Revision: https://reviews.llvm.org/D119846
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57 files changed

+33
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‎bolt/include/bolt/Core/BinaryContext.h

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1192,14 +1192,14 @@ class BinaryContext {
11921192
/*PIC=*/!HasFixedLoadAddress));
11931193
MCEInstance.LocalCtx->setObjectFileInfo(MCEInstance.LocalMOFI.get());
11941194
MCEInstance.MCE.reset(
1195-
TheTarget->createMCCodeEmitter(*MII, *MRI, *MCEInstance.LocalCtx));
1195+
TheTarget->createMCCodeEmitter(*MII, *MCEInstance.LocalCtx));
11961196
return MCEInstance;
11971197
}
11981198

11991199
/// Creating MCStreamer instance.
12001200
std::unique_ptr<MCStreamer>
12011201
createStreamer(llvm::raw_pwrite_stream &OS) const {
1202-
MCCodeEmitter *MCE = TheTarget->createMCCodeEmitter(*MII, *MRI, *Ctx);
1202+
MCCodeEmitter *MCE = TheTarget->createMCCodeEmitter(*MII, *Ctx);
12031203
MCAsmBackend *MAB =
12041204
TheTarget->createMCAsmBackend(*STI, *MRI, MCTargetOptions());
12051205
std::unique_ptr<MCObjectWriter> OW = MAB->createObjectWriter(OS);

‎bolt/lib/Core/BinaryContext.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -223,7 +223,7 @@ BinaryContext::createBinaryContext(const ObjectFile *File, bool IsPIC,
223223
InstructionPrinter->setPrintImmHex(true);
224224

225225
std::unique_ptr<MCCodeEmitter> MCE(
226-
TheTarget->createMCCodeEmitter(*MII, *MRI, *Ctx));
226+
TheTarget->createMCCodeEmitter(*MII, *Ctx));
227227

228228
// Make sure we don't miss any output on core dumps.
229229
outs().SetUnbuffered();

‎clang/tools/driver/cc1as_main.cpp

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -455,7 +455,7 @@ static bool ExecuteAssemblerImpl(AssemblerInvocation &Opts,
455455

456456
std::unique_ptr<MCCodeEmitter> CE;
457457
if (Opts.ShowEncoding)
458-
CE.reset(TheTarget->createMCCodeEmitter(*MCII, *MRI, Ctx));
458+
CE.reset(TheTarget->createMCCodeEmitter(*MCII, Ctx));
459459
std::unique_ptr<MCAsmBackend> MAB(
460460
TheTarget->createMCAsmBackend(*STI, *MRI, MCOptions));
461461

@@ -475,7 +475,7 @@ static bool ExecuteAssemblerImpl(AssemblerInvocation &Opts,
475475
}
476476

477477
std::unique_ptr<MCCodeEmitter> CE(
478-
TheTarget->createMCCodeEmitter(*MCII, *MRI, Ctx));
478+
TheTarget->createMCCodeEmitter(*MCII, Ctx));
479479
std::unique_ptr<MCAsmBackend> MAB(
480480
TheTarget->createMCAsmBackend(*STI, *MRI, MCOptions));
481481
assert(MAB && "Unable to create asm backend!");

‎llvm/include/llvm/MC/TargetRegistry.h

Lines changed: 1 addition & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -175,7 +175,6 @@ class Target {
175175
const MCInstrInfo &MII,
176176
const MCRegisterInfo &MRI);
177177
using MCCodeEmitterCtorTy = MCCodeEmitter *(*)(const MCInstrInfo &II,
178-
const MCRegisterInfo &MRI,
179178
MCContext &Ctx);
180179
using ELFStreamerCtorTy =
181180
MCStreamer *(*)(const Triple &T, MCContext &Ctx,
@@ -506,11 +505,10 @@ class Target {
506505

507506
/// createMCCodeEmitter - Create a target specific code emitter.
508507
MCCodeEmitter *createMCCodeEmitter(const MCInstrInfo &II,
509-
const MCRegisterInfo &MRI,
510508
MCContext &Ctx) const {
511509
if (!MCCodeEmitterCtorFn)
512510
return nullptr;
513-
return MCCodeEmitterCtorFn(II, MRI, Ctx);
511+
return MCCodeEmitterCtorFn(II, Ctx);
514512
}
515513

516514
/// Create a target specific MCStreamer.
@@ -1360,7 +1358,6 @@ template <class MCCodeEmitterImpl> struct RegisterMCCodeEmitter {
13601358

13611359
private:
13621360
static MCCodeEmitter *Allocator(const MCInstrInfo & /*II*/,
1363-
const MCRegisterInfo & /*MRI*/,
13641361
MCContext & /*Ctx*/) {
13651362
return new MCCodeEmitterImpl();
13661363
}

‎llvm/lib/CodeGen/LLVMTargetMachine.cpp

Lines changed: 3 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -165,7 +165,7 @@ Expected<std::unique_ptr<MCStreamer>> LLVMTargetMachine::createMCStreamer(
165165
// Create a code emitter if asked to show the encoding.
166166
std::unique_ptr<MCCodeEmitter> MCE;
167167
if (Options.MCOptions.ShowMCEncoding)
168-
MCE.reset(getTarget().createMCCodeEmitter(MII, MRI, Context));
168+
MCE.reset(getTarget().createMCCodeEmitter(MII, Context));
169169

170170
std::unique_ptr<MCAsmBackend> MAB(
171171
getTarget().createMCAsmBackend(STI, MRI, Options.MCOptions));
@@ -180,7 +180,7 @@ Expected<std::unique_ptr<MCStreamer>> LLVMTargetMachine::createMCStreamer(
180180
case CGFT_ObjectFile: {
181181
// Create the code emitter for the target if it exists. If not, .o file
182182
// emission fails.
183-
MCCodeEmitter *MCE = getTarget().createMCCodeEmitter(MII, MRI, Context);
183+
MCCodeEmitter *MCE = getTarget().createMCCodeEmitter(MII, Context);
184184
if (!MCE)
185185
return make_error<StringError>("createMCCodeEmitter failed",
186186
inconvertibleErrorCode());
@@ -260,8 +260,7 @@ bool LLVMTargetMachine::addPassesToEmitMC(PassManagerBase &PM, MCContext *&Ctx,
260260
// emission fails.
261261
const MCSubtargetInfo &STI = *getMCSubtargetInfo();
262262
const MCRegisterInfo &MRI = *getMCRegisterInfo();
263-
MCCodeEmitter *MCE =
264-
getTarget().createMCCodeEmitter(*getMCInstrInfo(), MRI, *Ctx);
263+
MCCodeEmitter *MCE = getTarget().createMCCodeEmitter(*getMCInstrInfo(), *Ctx);
265264
MCAsmBackend *MAB =
266265
getTarget().createMCAsmBackend(STI, MRI, Options.MCOptions);
267266
if (!MCE || !MAB)

‎llvm/lib/DWARFLinker/DWARFStreamer.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -68,7 +68,7 @@ bool DwarfStreamer::init(Triple TheTriple,
6868
if (!MII)
6969
return error("no instr info info for target " + TripleName, Context), false;
7070

71-
MCE = TheTarget->createMCCodeEmitter(*MII, *MRI, *MC);
71+
MCE = TheTarget->createMCCodeEmitter(*MII, *MC);
7272
if (!MCE)
7373
return error("no code emitter for target " + TripleName, Context), false;
7474

‎llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCCodeEmitter.cpp

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -678,7 +678,6 @@ unsigned AArch64MCCodeEmitter::fixOneOperandFPComparison(
678678
#include "AArch64GenMCCodeEmitter.inc"
679679

680680
MCCodeEmitter *llvm::createAArch64MCCodeEmitter(const MCInstrInfo &MCII,
681-
const MCRegisterInfo &MRI,
682681
MCContext &Ctx) {
683682
return new AArch64MCCodeEmitter(MCII, Ctx);
684683
}

‎llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCTargetDesc.h

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -33,7 +33,6 @@ class MCTargetStreamer;
3333
class Target;
3434

3535
MCCodeEmitter *createAArch64MCCodeEmitter(const MCInstrInfo &MCII,
36-
const MCRegisterInfo &MRI,
3736
MCContext &Ctx);
3837
MCAsmBackend *createAArch64leAsmBackend(const Target &T,
3938
const MCSubtargetInfo &STI,

‎llvm/lib/Target/AMDGPU/AMDGPUMCInstLower.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -240,7 +240,7 @@ void AMDGPUAsmPrinter::emitInstruction(const MachineInstr *MI) {
240240
raw_svector_ostream CodeStream(CodeBytes);
241241

242242
std::unique_ptr<MCCodeEmitter> InstEmitter(createSIMCCodeEmitter(
243-
*STI.getInstrInfo(), *OutContext.getRegisterInfo(), OutContext));
243+
*STI.getInstrInfo(), OutContext));
244244
InstEmitter->encodeInstruction(TmpInst, CodeStream, Fixups, STI);
245245

246246
assert(CodeBytes.size() == STI.getInstrInfo()->getInstSizeInBytes(*MI));

‎llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCTargetDesc.h

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -33,7 +33,6 @@ enum AMDGPUDwarfFlavour : unsigned { Wave64 = 0, Wave32 = 1 };
3333
MCRegisterInfo *createGCNMCRegisterInfo(AMDGPUDwarfFlavour DwarfFlavour);
3434

3535
MCCodeEmitter *createSIMCCodeEmitter(const MCInstrInfo &MCII,
36-
const MCRegisterInfo &MRI,
3736
MCContext &Ctx);
3837

3938
MCAsmBackend *createAMDGPUAsmBackend(const Target &T,

‎llvm/lib/Target/AMDGPU/MCTargetDesc/R600MCCodeEmitter.cpp

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -85,9 +85,8 @@ enum FCInstr {
8585
};
8686

8787
MCCodeEmitter *llvm::createR600MCCodeEmitter(const MCInstrInfo &MCII,
88-
const MCRegisterInfo &MRI,
8988
MCContext &Ctx) {
90-
return new R600MCCodeEmitter(MCII, MRI);
89+
return new R600MCCodeEmitter(MCII, *Ctx.getRegisterInfo());
9190
}
9291

9392
void R600MCCodeEmitter::encodeInstruction(const MCInst &MI, raw_ostream &OS,

‎llvm/lib/Target/AMDGPU/MCTargetDesc/R600MCTargetDesc.h

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -24,7 +24,6 @@ class MCInstrInfo;
2424
class MCRegisterInfo;
2525

2626
MCCodeEmitter *createR600MCCodeEmitter(const MCInstrInfo &MCII,
27-
const MCRegisterInfo &MRI,
2827
MCContext &Ctx);
2928
MCInstrInfo *createR600MCInstrInfo();
3029

‎llvm/lib/Target/AMDGPU/MCTargetDesc/SIMCCodeEmitter.cpp

Lines changed: 3 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -37,9 +37,8 @@ class SIMCCodeEmitter : public AMDGPUMCCodeEmitter {
3737
const MCSubtargetInfo &STI) const;
3838

3939
public:
40-
SIMCCodeEmitter(const MCInstrInfo &mcii, const MCRegisterInfo &mri,
41-
MCContext &ctx)
42-
: AMDGPUMCCodeEmitter(mcii), MRI(mri) {}
40+
SIMCCodeEmitter(const MCInstrInfo &mcii, MCContext &ctx)
41+
: AMDGPUMCCodeEmitter(mcii), MRI(*ctx.getRegisterInfo()) {}
4342
SIMCCodeEmitter(const SIMCCodeEmitter &) = delete;
4443
SIMCCodeEmitter &operator=(const SIMCCodeEmitter &) = delete;
4544

@@ -82,9 +81,8 @@ class SIMCCodeEmitter : public AMDGPUMCCodeEmitter {
8281
} // end anonymous namespace
8382

8483
MCCodeEmitter *llvm::createSIMCCodeEmitter(const MCInstrInfo &MCII,
85-
const MCRegisterInfo &MRI,
8684
MCContext &Ctx) {
87-
return new SIMCCodeEmitter(MCII, MRI, Ctx);
85+
return new SIMCCodeEmitter(MCII, Ctx);
8886
}
8987

9088
// Returns the encoding value to use if the given integer is an integer inline

‎llvm/lib/Target/ARM/MCTargetDesc/ARMMCCodeEmitter.cpp

Lines changed: 0 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -2006,13 +2006,11 @@ getMVEPairVectorIndexOpValue(const MCInst &MI, unsigned OpIdx,
20062006
#include "ARMGenMCCodeEmitter.inc"
20072007

20082008
MCCodeEmitter *llvm::createARMLEMCCodeEmitter(const MCInstrInfo &MCII,
2009-
const MCRegisterInfo &MRI,
20102009
MCContext &Ctx) {
20112010
return new ARMMCCodeEmitter(MCII, Ctx, true);
20122011
}
20132012

20142013
MCCodeEmitter *llvm::createARMBEMCCodeEmitter(const MCInstrInfo &MCII,
2015-
const MCRegisterInfo &MRI,
20162014
MCContext &Ctx) {
20172015
return new ARMMCCodeEmitter(MCII, Ctx, false);
20182016
}

‎llvm/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.h

Lines changed: 0 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -73,11 +73,9 @@ MCTargetStreamer *createARMObjectTargetStreamer(MCStreamer &S,
7373
const MCSubtargetInfo &STI);
7474

7575
MCCodeEmitter *createARMLEMCCodeEmitter(const MCInstrInfo &MCII,
76-
const MCRegisterInfo &MRI,
7776
MCContext &Ctx);
7877

7978
MCCodeEmitter *createARMBEMCCodeEmitter(const MCInstrInfo &MCII,
80-
const MCRegisterInfo &MRI,
8179
MCContext &Ctx);
8280

8381
MCAsmBackend *createARMLEAsmBackend(const Target &T, const MCSubtargetInfo &STI,

‎llvm/lib/Target/AVR/MCTargetDesc/AVRMCCodeEmitter.cpp

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -295,7 +295,6 @@ void AVRMCCodeEmitter::encodeInstruction(const MCInst &MI, raw_ostream &OS,
295295
}
296296

297297
MCCodeEmitter *createAVRMCCodeEmitter(const MCInstrInfo &MCII,
298-
const MCRegisterInfo &MRI,
299298
MCContext &Ctx) {
300299
return new AVRMCCodeEmitter(MCII, Ctx);
301300
}

‎llvm/lib/Target/AVR/MCTargetDesc/AVRMCTargetDesc.h

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -33,7 +33,6 @@ MCInstrInfo *createAVRMCInstrInfo();
3333

3434
/// Creates a machine code emitter for AVR.
3535
MCCodeEmitter *createAVRMCCodeEmitter(const MCInstrInfo &MCII,
36-
const MCRegisterInfo &MRI,
3736
MCContext &Ctx);
3837

3938
/// Creates an assembly backend for AVR.

‎llvm/lib/Target/BPF/MCTargetDesc/BPFMCCodeEmitter.cpp

Lines changed: 2 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -73,15 +73,13 @@ class BPFMCCodeEmitter : public MCCodeEmitter {
7373
} // end anonymous namespace
7474

7575
MCCodeEmitter *llvm::createBPFMCCodeEmitter(const MCInstrInfo &MCII,
76-
const MCRegisterInfo &MRI,
7776
MCContext &Ctx) {
78-
return new BPFMCCodeEmitter(MCII, MRI, true);
77+
return new BPFMCCodeEmitter(MCII, *Ctx.getRegisterInfo(), true);
7978
}
8079

8180
MCCodeEmitter *llvm::createBPFbeMCCodeEmitter(const MCInstrInfo &MCII,
82-
const MCRegisterInfo &MRI,
8381
MCContext &Ctx) {
84-
return new BPFMCCodeEmitter(MCII, MRI, false);
82+
return new BPFMCCodeEmitter(MCII, *Ctx.getRegisterInfo(), false);
8583
}
8684

8785
unsigned BPFMCCodeEmitter::getMachineOpValue(const MCInst &MI,

‎llvm/lib/Target/BPF/MCTargetDesc/BPFMCTargetDesc.h

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -14,6 +14,7 @@
1414
#define LLVM_LIB_TARGET_BPF_MCTARGETDESC_BPFMCTARGETDESC_H
1515

1616
#include "llvm/Config/config.h"
17+
#include "llvm/MC/MCContext.h"
1718
#include "llvm/Support/DataTypes.h"
1819

1920
#include <memory>
@@ -30,10 +31,8 @@ class MCTargetOptions;
3031
class Target;
3132

3233
MCCodeEmitter *createBPFMCCodeEmitter(const MCInstrInfo &MCII,
33-
const MCRegisterInfo &MRI,
3434
MCContext &Ctx);
3535
MCCodeEmitter *createBPFbeMCCodeEmitter(const MCInstrInfo &MCII,
36-
const MCRegisterInfo &MRI,
3736
MCContext &Ctx);
3837

3938
MCAsmBackend *createBPFAsmBackend(const Target &T, const MCSubtargetInfo &STI,

‎llvm/lib/Target/CSKY/MCTargetDesc/CSKYMCCodeEmitter.cpp

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -173,7 +173,6 @@ MCFixupKind CSKYMCCodeEmitter::getTargetFixup(const MCExpr *Expr) const {
173173
}
174174

175175
MCCodeEmitter *llvm::createCSKYMCCodeEmitter(const MCInstrInfo &MCII,
176-
const MCRegisterInfo &MRI,
177176
MCContext &Ctx) {
178177
return new CSKYMCCodeEmitter(Ctx, MCII);
179178
}

‎llvm/lib/Target/CSKY/MCTargetDesc/CSKYMCTargetDesc.h

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -35,7 +35,6 @@ MCAsmBackend *createCSKYAsmBackend(const Target &T, const MCSubtargetInfo &STI,
3535
const MCTargetOptions &Options);
3636

3737
MCCodeEmitter *createCSKYMCCodeEmitter(const MCInstrInfo &MCII,
38-
const MCRegisterInfo &MRI,
3938
MCContext &Ctx);
4039
} // namespace llvm
4140

‎llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCCodeEmitter.cpp

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -789,7 +789,6 @@ HexagonMCCodeEmitter::getMachineOpValue(MCInst const &MI, MCOperand const &MO,
789789
}
790790

791791
MCCodeEmitter *llvm::createHexagonMCCodeEmitter(MCInstrInfo const &MII,
792-
MCRegisterInfo const &MRI,
793792
MCContext &MCT) {
794793
return new HexagonMCCodeEmitter(MII, MCT);
795794
}

‎llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCTargetDesc.h

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -85,7 +85,6 @@ namespace Hexagon_MC {
8585
}
8686

8787
MCCodeEmitter *createHexagonMCCodeEmitter(const MCInstrInfo &MCII,
88-
const MCRegisterInfo &MRI,
8988
MCContext &MCT);
9089

9190
MCAsmBackend *createHexagonAsmBackend(const Target &T,

‎llvm/lib/Target/Lanai/MCTargetDesc/LanaiMCCodeEmitter.cpp

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -304,7 +304,6 @@ unsigned LanaiMCCodeEmitter::getBranchTargetOpValue(
304304

305305
llvm::MCCodeEmitter *
306306
llvm::createLanaiMCCodeEmitter(const MCInstrInfo &InstrInfo,
307-
const MCRegisterInfo & /*MRI*/,
308307
MCContext &context) {
309308
return new LanaiMCCodeEmitter(InstrInfo, context);
310309
}

‎llvm/lib/Target/Lanai/MCTargetDesc/LanaiMCTargetDesc.h

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -27,7 +27,6 @@ class MCSubtargetInfo;
2727
class Target;
2828

2929
MCCodeEmitter *createLanaiMCCodeEmitter(const MCInstrInfo &MCII,
30-
const MCRegisterInfo &MRI,
3130
MCContext &Ctx);
3231

3332
MCAsmBackend *createLanaiAsmBackend(const Target &T, const MCSubtargetInfo &STI,

‎llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchMCCodeEmitter.cpp

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -88,7 +88,6 @@ void LoongArchMCCodeEmitter::encodeInstruction(
8888
}
8989

9090
MCCodeEmitter *llvm::createLoongArchMCCodeEmitter(const MCInstrInfo &MCII,
91-
const MCRegisterInfo &MRI,
9291
MCContext &Ctx) {
9392
return new LoongArchMCCodeEmitter(Ctx, MCII);
9493
}

‎llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchMCTargetDesc.h

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -28,7 +28,6 @@ class MCSubtargetInfo;
2828
class Target;
2929

3030
MCCodeEmitter *createLoongArchMCCodeEmitter(const MCInstrInfo &MCII,
31-
const MCRegisterInfo &MRI,
3231
MCContext &Ctx);
3332

3433
MCAsmBackend *createLoongArchAsmBackend(const Target &T,

‎llvm/lib/Target/M68k/MCTargetDesc/M68kMCCodeEmitter.cpp

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -566,7 +566,6 @@ void M68kMCCodeEmitter::encodeInstruction(const MCInst &MI, raw_ostream &OS,
566566
}
567567

568568
MCCodeEmitter *llvm::createM68kMCCodeEmitter(const MCInstrInfo &MCII,
569-
const MCRegisterInfo &MRI,
570569
MCContext &Ctx) {
571570
return new M68kMCCodeEmitter(MCII, Ctx);
572571
}

‎llvm/lib/Target/M68k/MCTargetDesc/M68kMCTargetDesc.h

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -38,7 +38,6 @@ MCAsmBackend *createM68kAsmBackend(const Target &T, const MCSubtargetInfo &STI,
3838
const MCTargetOptions &Options);
3939

4040
MCCodeEmitter *createM68kMCCodeEmitter(const MCInstrInfo &MCII,
41-
const MCRegisterInfo &MRI,
4241
MCContext &Ctx);
4342

4443
/// Construct an M68k ELF object writer.

‎llvm/lib/Target/MSP430/MCTargetDesc/MSP430MCCodeEmitter.cpp

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -167,7 +167,7 @@ unsigned MSP430MCCodeEmitter::getCGImmOpValue(const MCInst &MI, unsigned Op,
167167
const MCSubtargetInfo &STI) const {
168168
const MCOperand &MO = MI.getOperand(Op);
169169
assert(MO.isImm() && "Expr operand expected");
170-
170+
171171
int64_t Imm = MO.getImm();
172172
switch (Imm) {
173173
default:
@@ -200,7 +200,6 @@ unsigned MSP430MCCodeEmitter::getCCOpValue(const MCInst &MI, unsigned Op,
200200
}
201201

202202
MCCodeEmitter *createMSP430MCCodeEmitter(const MCInstrInfo &MCII,
203-
const MCRegisterInfo &MRI,
204203
MCContext &Ctx) {
205204
return new MSP430MCCodeEmitter(Ctx, MCII);
206205
}

‎llvm/lib/Target/MSP430/MCTargetDesc/MSP430MCTargetDesc.h

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -31,7 +31,6 @@ class MCTargetStreamer;
3131

3232
/// Creates a machine code emitter for MSP430.
3333
MCCodeEmitter *createMSP430MCCodeEmitter(const MCInstrInfo &MCII,
34-
const MCRegisterInfo &MRI,
3534
MCContext &Ctx);
3635

3736
MCAsmBackend *createMSP430MCAsmBackend(const Target &T,

‎llvm/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp

Lines changed: 0 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -42,13 +42,11 @@ using namespace llvm;
4242
namespace llvm {
4343

4444
MCCodeEmitter *createMipsMCCodeEmitterEB(const MCInstrInfo &MCII,
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const MCRegisterInfo &MRI,
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MCContext &Ctx) {
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return new MipsMCCodeEmitter(MCII, Ctx, false);
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}
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MCCodeEmitter *createMipsMCCodeEmitterEL(const MCInstrInfo &MCII,
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const MCRegisterInfo &MRI,
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MCContext &Ctx) {
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return new MipsMCCodeEmitter(MCII, Ctx, true);
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}

‎llvm/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.h

Lines changed: 0 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -31,10 +31,8 @@ class Target;
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class Triple;
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MCCodeEmitter *createMipsMCCodeEmitterEB(const MCInstrInfo &MCII,
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const MCRegisterInfo &MRI,
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MCContext &Ctx);
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MCCodeEmitter *createMipsMCCodeEmitterEL(const MCInstrInfo &MCII,
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const MCRegisterInfo &MRI,
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MCContext &Ctx);
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MCAsmBackend *createMipsAsmBackend(const Target &T, const MCSubtargetInfo &STI,

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