|
| 1 | +// Test code-gen for `omp.distribute` ops with delayed privatizers (i.e. using |
| 2 | +// `omp.private` ops). |
| 3 | + |
| 4 | +// RUN: mlir-translate -mlir-to-llvmir -split-input-file %s | FileCheck %s |
| 5 | + |
| 6 | +omp.private {type = private} @_QFEi_private_i32 : i32 |
| 7 | +omp.private {type = private} @_QFEpriv_val_dist_private_f32 : f32 |
| 8 | + |
| 9 | +llvm.func @_QQmain() { |
| 10 | + %0 = llvm.mlir.constant(1 : i64) : i64 |
| 11 | + %1 = llvm.alloca %0 x f32 {bindc_name = "priv_val_dist"} : (i64) -> !llvm.ptr |
| 12 | + %3 = llvm.alloca %0 x i32 {bindc_name = "i"} : (i64) -> !llvm.ptr |
| 13 | + %4 = llvm.mlir.constant(3.140000e+00 : f32) : f32 |
| 14 | + %5 = llvm.mlir.constant(1000 : i32) : i32 |
| 15 | + %6 = llvm.mlir.constant(1 : i32) : i32 |
| 16 | + |
| 17 | + omp.teams { |
| 18 | + omp.distribute private(@_QFEpriv_val_dist_private_f32 %1 -> %arg0, @_QFEi_private_i32 %3 -> %arg1 : !llvm.ptr, !llvm.ptr) { |
| 19 | + omp.loop_nest (%arg2) : i32 = (%6) to (%5) inclusive step (%6) { |
| 20 | + llvm.store %arg2, %arg1 : i32, !llvm.ptr |
| 21 | + llvm.store %4, %arg0 : f32, !llvm.ptr |
| 22 | + omp.yield |
| 23 | + } |
| 24 | + } |
| 25 | + omp.terminator |
| 26 | + } |
| 27 | + |
| 28 | + llvm.return |
| 29 | +} |
| 30 | + |
| 31 | +// CHECK-LABEL: define void @_QQmain() { |
| 32 | +// CHECK: call void {{.*}} @__kmpc_fork_teams(ptr @{{.*}}, i32 0, ptr @[[TEAMS_FUNC:.*]]) |
| 33 | +// CHECK-NEXT: br label %teams.exit |
| 34 | +// CHECK: } |
| 35 | + |
| 36 | +// CHECK: define internal void @[[TEAMS_FUNC]]({{.*}}) { |
| 37 | +// CHECK: call void @[[DIST_FUNC:.*]]() |
| 38 | +// CHECK-NEXT: br label %distribute.exit |
| 39 | +// CHECK: } |
| 40 | + |
| 41 | +// CHECK: define internal void @[[DIST_FUNC]]() { |
| 42 | +// CHECK: %[[PRIV_VAR_ALLOC:.*]] = alloca float, align 4 |
| 43 | +// CHECK: %[[IV_ALLOC:.*]] = alloca i32, align 4 |
| 44 | + |
| 45 | +// CHECK: omp.loop_nest.region: |
| 46 | +// CHECK-NEXT: store i32 %{{.*}}, ptr %[[IV_ALLOC]], align 4 |
| 47 | +// CHECK-NEXT: store float 0x40091EB860000000, ptr %[[PRIV_VAR_ALLOC]], align 4 |
| 48 | +// CHECK: } |
| 49 | + |
| 50 | +// ----- |
| 51 | + |
| 52 | +omp.private {type = firstprivate} @_QFEpriv_val_dist_firstprivate_f32 : f32 copy { |
| 53 | +^bb0(%arg0: !llvm.ptr, %arg1: !llvm.ptr): |
| 54 | + %0 = llvm.load %arg0 : !llvm.ptr -> f32 |
| 55 | + llvm.store %0, %arg1 : f32, !llvm.ptr |
| 56 | + omp.yield(%arg1 : !llvm.ptr) |
| 57 | +} |
| 58 | + |
| 59 | +llvm.func @_QQmain() { |
| 60 | + %0 = llvm.mlir.constant(1 : i64) : i64 |
| 61 | + %1 = llvm.alloca %0 x f32 {bindc_name = "priv_val_dist"} : (i64) -> !llvm.ptr |
| 62 | + %4 = llvm.mlir.constant(3.140000e+00 : f32) : f32 |
| 63 | + %6 = llvm.mlir.constant(1 : i32) : i32 |
| 64 | + omp.distribute private(@_QFEpriv_val_dist_firstprivate_f32 %1 -> %arg0 : !llvm.ptr) { |
| 65 | + omp.loop_nest (%arg2) : i32 = (%6) to (%6) inclusive step (%6) { |
| 66 | + llvm.store %4, %arg0 : f32, !llvm.ptr |
| 67 | + omp.yield |
| 68 | + } |
| 69 | + } |
| 70 | + llvm.return |
| 71 | +} |
| 72 | + |
| 73 | +// CHECK-LABEL: define void @_QQmain() { |
| 74 | +// CHECK: %[[SHARED_VAR_ALLOC:.*]] = alloca float, i64 1, align 4 |
| 75 | +// CHECK: %[[SHARED_VAR_PTR:.*]] = getelementptr { ptr }, ptr %[[DIST_PARAM:.*]], i32 0, i32 0 |
| 76 | +// CHECK: store ptr %[[SHARED_VAR_ALLOC]], ptr %[[SHARED_VAR_PTR]], align 8 |
| 77 | +// CHECK: call void @[[DIST_FUNC:.*]](ptr %[[DIST_PARAM]]) |
| 78 | +// CHECK-NEXT: br label %distribute.exit |
| 79 | +// CHECK: } |
| 80 | + |
| 81 | +// CHECK: define internal void @[[DIST_FUNC]](ptr %[[DIST_ARG:.*]]) { |
| 82 | +// CHECK: %[[SHARED_VAR_GEP:.*]] = getelementptr { ptr }, ptr %[[DIST_ARG]], i32 0, i32 0 |
| 83 | +// CHECK: %[[SHARED_VAR_PTR2:.*]] = load ptr, ptr %[[SHARED_VAR_GEP]], align 8 |
| 84 | +// CHECK: %[[PRIV_VAR_ALLOC:.*]] = alloca float, align 4 |
| 85 | + |
| 86 | +// CHECK: omp.private.copy: |
| 87 | +// CHECK-NEXT: %[[SHARED_VAR_VAL:.*]] = load float, ptr %[[SHARED_VAR_PTR2]], align 4 |
| 88 | +// CHECK-NEXT: store float %[[SHARED_VAR_VAL]], ptr %[[PRIV_VAR_ALLOC]], align 4 |
| 89 | + |
| 90 | +// CHECK: omp.loop_nest.region: |
| 91 | +// CHECK-NEXT: store float 0x40091EB860000000, ptr %[[PRIV_VAR_ALLOC]], align 4 |
| 92 | +// CHECK: } |
| 93 | + |
| 94 | + |
0 commit comments