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[InstCombine] Add tests for transforming (or/and (icmp eq/ne X,0),(icmp eq/ne X,Pow2OrZero)); NFC
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‎llvm/test/Transforms/InstCombine/and-or-icmps.ll

Lines changed: 152 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -3057,9 +3057,9 @@ define i32 @icmp_slt_0_or_icmp_add_1_sge_100_i32_fail(i32 %x) {
30573057
define i1 @logical_and_icmps1(i32 %a, i1 %other_cond) {
30583058
; CHECK-LABEL: @logical_and_icmps1(
30593059
; CHECK-NEXT: entry:
3060-
; CHECK-NEXT: [[CMP3:%.*]] = icmp ult i32 [[A:%.*]], 10086
3061-
; CHECK-NEXT: [[RET2:%.*]] = select i1 [[RET1:%.*]], i1 [[CMP3]], i1 false
3062-
; CHECK-NEXT: ret i1 [[RET2]]
3060+
; CHECK-NEXT: [[TMP0:%.*]] = icmp ult i32 [[A:%.*]], 10086
3061+
; CHECK-NEXT: [[RET:%.*]] = select i1 [[OTHER_COND:%.*]], i1 [[TMP0]], i1 false
3062+
; CHECK-NEXT: ret i1 [[RET]]
30633063
;
30643064
entry:
30653065
%cmp1 = icmp sgt i32 %a, -1
@@ -3085,9 +3085,9 @@ entry:
30853085
define <4 x i1> @logical_and_icmps_vec1(<4 x i32> %a, <4 x i1> %other_cond) {
30863086
; CHECK-LABEL: @logical_and_icmps_vec1(
30873087
; CHECK-NEXT: entry:
3088-
; CHECK-NEXT: [[CMP3:%.*]] = icmp ult <4 x i32> [[A:%.*]], <i32 10086, i32 10086, i32 10086, i32 10086>
3089-
; CHECK-NEXT: [[RET2:%.*]] = select <4 x i1> [[RET1:%.*]], <4 x i1> [[CMP3]], <4 x i1> zeroinitializer
3090-
; CHECK-NEXT: ret <4 x i1> [[RET2]]
3088+
; CHECK-NEXT: [[TMP0:%.*]] = icmp ult <4 x i32> [[A:%.*]], <i32 10086, i32 10086, i32 10086, i32 10086>
3089+
; CHECK-NEXT: [[RET:%.*]] = select <4 x i1> [[OTHER_COND:%.*]], <4 x i1> [[TMP0]], <4 x i1> zeroinitializer
3090+
; CHECK-NEXT: ret <4 x i1> [[RET]]
30913091
;
30923092
entry:
30933093
%cmp1 = icmp sgt <4 x i32> %a, <i32 -1, i32 -1, i32 -1, i32 -1 >
@@ -3113,3 +3113,149 @@ entry:
31133113
%ret = select i1 %logical_and, i1 %cmp2, i1 false
31143114
ret i1 %ret
31153115
}
3116+
3117+
3118+
define i1 @icmp_eq_or_z_or_pow2orz(i8 %x, i8 %y) {
3119+
; CHECK-LABEL: @icmp_eq_or_z_or_pow2orz(
3120+
; CHECK-NEXT: [[NY:%.*]] = sub i8 0, [[Y:%.*]]
3121+
; CHECK-NEXT: [[POW2ORZ:%.*]] = and i8 [[NY]], [[Y]]
3122+
; CHECK-NEXT: [[C0:%.*]] = icmp eq i8 [[X:%.*]], 0
3123+
; CHECK-NEXT: [[CP2:%.*]] = icmp eq i8 [[POW2ORZ]], [[X]]
3124+
; CHECK-NEXT: [[R:%.*]] = or i1 [[C0]], [[CP2]]
3125+
; CHECK-NEXT: ret i1 [[R]]
3126+
;
3127+
%ny = sub i8 0, %y
3128+
%pow2orz = and i8 %ny, %y
3129+
3130+
%c0 = icmp eq i8 %x, 0
3131+
%cp2 = icmp eq i8 %x, %pow2orz
3132+
%r = or i1 %c0, %cp2
3133+
ret i1 %r
3134+
}
3135+
3136+
3137+
define i1 @icmp_eq_or_z_or_pow2orz_fail_logic_or(i8 %x, i8 %y) {
3138+
; CHECK-LABEL: @icmp_eq_or_z_or_pow2orz_fail_logic_or(
3139+
; CHECK-NEXT: [[NY:%.*]] = sub i8 0, [[Y:%.*]]
3140+
; CHECK-NEXT: [[POW2ORZ:%.*]] = and i8 [[NY]], [[Y]]
3141+
; CHECK-NEXT: [[C0:%.*]] = icmp eq i8 [[X:%.*]], 0
3142+
; CHECK-NEXT: [[CP2:%.*]] = icmp eq i8 [[POW2ORZ]], [[X]]
3143+
; CHECK-NEXT: [[R:%.*]] = select i1 [[C0]], i1 true, i1 [[CP2]]
3144+
; CHECK-NEXT: ret i1 [[R]]
3145+
;
3146+
%ny = sub i8 0, %y
3147+
%pow2orz = and i8 %ny, %y
3148+
3149+
%c0 = icmp eq i8 %x, 0
3150+
%cp2 = icmp eq i8 %x, %pow2orz
3151+
%r = select i1 %c0, i1 true, i1 %cp2
3152+
ret i1 %r
3153+
}
3154+
3155+
3156+
define <2 x i1> @icmp_ne_and_z_and_pow2orz(<2 x i8> %x, <2 x i8> %y) {
3157+
; CHECK-LABEL: @icmp_ne_and_z_and_pow2orz(
3158+
; CHECK-NEXT: [[NY:%.*]] = sub <2 x i8> zeroinitializer, [[Y:%.*]]
3159+
; CHECK-NEXT: [[POW2ORZ:%.*]] = and <2 x i8> [[NY]], [[Y]]
3160+
; CHECK-NEXT: [[C0:%.*]] = icmp ne <2 x i8> [[X:%.*]], zeroinitializer
3161+
; CHECK-NEXT: [[CP2:%.*]] = icmp ne <2 x i8> [[POW2ORZ]], [[X]]
3162+
; CHECK-NEXT: [[R:%.*]] = and <2 x i1> [[C0]], [[CP2]]
3163+
; CHECK-NEXT: ret <2 x i1> [[R]]
3164+
;
3165+
%ny = sub <2 x i8> zeroinitializer, %y
3166+
%pow2orz = and <2 x i8> %ny, %y
3167+
3168+
%c0 = icmp ne <2 x i8> %x, zeroinitializer
3169+
%cp2 = icmp ne <2 x i8> %x, %pow2orz
3170+
%r = and <2 x i1> %c0, %cp2
3171+
ret <2 x i1> %r
3172+
}
3173+
3174+
define <2 x i1> @icmp_ne_and_z_and_pow2orz_fail_logic_and(<2 x i8> %x, <2 x i8> %y) {
3175+
; CHECK-LABEL: @icmp_ne_and_z_and_pow2orz_fail_logic_and(
3176+
; CHECK-NEXT: [[NY:%.*]] = sub <2 x i8> zeroinitializer, [[Y:%.*]]
3177+
; CHECK-NEXT: [[POW2ORZ:%.*]] = and <2 x i8> [[NY]], [[Y]]
3178+
; CHECK-NEXT: [[C0:%.*]] = icmp ne <2 x i8> [[X:%.*]], zeroinitializer
3179+
; CHECK-NEXT: [[CP2:%.*]] = icmp ne <2 x i8> [[POW2ORZ]], [[X]]
3180+
; CHECK-NEXT: [[R:%.*]] = select <2 x i1> [[C0]], <2 x i1> [[CP2]], <2 x i1> zeroinitializer
3181+
; CHECK-NEXT: ret <2 x i1> [[R]]
3182+
;
3183+
%ny = sub <2 x i8> zeroinitializer, %y
3184+
%pow2orz = and <2 x i8> %ny, %y
3185+
3186+
%c0 = icmp ne <2 x i8> %x, zeroinitializer
3187+
%cp2 = icmp ne <2 x i8> %x, %pow2orz
3188+
%r = select <2 x i1> %c0, <2 x i1> %cp2, <2 x i1> zeroinitializer
3189+
ret <2 x i1> %r
3190+
}
3191+
3192+
define i1 @icmp_eq_or_z_or_pow2orz_fail_not_pow2(i8 %x, i8 %y) {
3193+
; CHECK-LABEL: @icmp_eq_or_z_or_pow2orz_fail_not_pow2(
3194+
; CHECK-NEXT: [[NY:%.*]] = sub i8 1, [[Y:%.*]]
3195+
; CHECK-NEXT: [[POW2ORZ:%.*]] = and i8 [[NY]], [[Y]]
3196+
; CHECK-NEXT: [[C0:%.*]] = icmp eq i8 [[X:%.*]], 0
3197+
; CHECK-NEXT: [[CP2:%.*]] = icmp eq i8 [[POW2ORZ]], [[X]]
3198+
; CHECK-NEXT: [[R:%.*]] = or i1 [[C0]], [[CP2]]
3199+
; CHECK-NEXT: ret i1 [[R]]
3200+
;
3201+
%ny = sub i8 1, %y
3202+
%pow2orz = and i8 %ny, %y
3203+
3204+
%c0 = icmp eq i8 %x, 0
3205+
%cp2 = icmp eq i8 %x, %pow2orz
3206+
%r = or i1 %c0, %cp2
3207+
ret i1 %r
3208+
}
3209+
3210+
define i1 @icmp_eq_or_z_or_pow2orz_fail_nonzero_const(i8 %x, i8 %y) {
3211+
; CHECK-LABEL: @icmp_eq_or_z_or_pow2orz_fail_nonzero_const(
3212+
; CHECK-NEXT: [[NY:%.*]] = sub i8 0, [[Y:%.*]]
3213+
; CHECK-NEXT: [[POW2ORZ:%.*]] = and i8 [[NY]], [[Y]]
3214+
; CHECK-NEXT: [[C0:%.*]] = icmp eq i8 [[X:%.*]], 1
3215+
; CHECK-NEXT: [[CP2:%.*]] = icmp eq i8 [[POW2ORZ]], [[X]]
3216+
; CHECK-NEXT: [[R:%.*]] = or i1 [[C0]], [[CP2]]
3217+
; CHECK-NEXT: ret i1 [[R]]
3218+
;
3219+
%ny = sub i8 0, %y
3220+
%pow2orz = and i8 %ny, %y
3221+
3222+
%c0 = icmp eq i8 %x, 1
3223+
%cp2 = icmp eq i8 %x, %pow2orz
3224+
%r = or i1 %c0, %cp2
3225+
ret i1 %r
3226+
}
3227+
3228+
define <2 x i1> @icmp_ne_and_z_and_pow2orz_fail_bad_pred(<2 x i8> %x, <2 x i8> %y) {
3229+
; CHECK-LABEL: @icmp_ne_and_z_and_pow2orz_fail_bad_pred(
3230+
; CHECK-NEXT: [[NY:%.*]] = sub <2 x i8> zeroinitializer, [[Y:%.*]]
3231+
; CHECK-NEXT: [[POW2ORZ:%.*]] = and <2 x i8> [[NY]], [[Y]]
3232+
; CHECK-NEXT: [[TMP1:%.*]] = or <2 x i8> [[POW2ORZ]], [[X:%.*]]
3233+
; CHECK-NEXT: [[R:%.*]] = icmp eq <2 x i8> [[TMP1]], zeroinitializer
3234+
; CHECK-NEXT: ret <2 x i1> [[R]]
3235+
;
3236+
%ny = sub <2 x i8> zeroinitializer, %y
3237+
%pow2orz = and <2 x i8> %ny, %y
3238+
3239+
%c0 = icmp eq <2 x i8> %x, zeroinitializer
3240+
%cp2 = icmp eq <2 x i8> %x, %pow2orz
3241+
%r = and <2 x i1> %c0, %cp2
3242+
ret <2 x i1> %r
3243+
}
3244+
3245+
define i1 @icmp_eq_or_z_or_pow2orz_fail_bad_pred2(i8 %x, i8 %y) {
3246+
; CHECK-LABEL: @icmp_eq_or_z_or_pow2orz_fail_bad_pred2(
3247+
; CHECK-NEXT: [[NY:%.*]] = sub i8 0, [[Y:%.*]]
3248+
; CHECK-NEXT: [[POW2ORZ:%.*]] = and i8 [[NY]], [[Y]]
3249+
; CHECK-NEXT: [[C0:%.*]] = icmp slt i8 [[X:%.*]], 1
3250+
; CHECK-NEXT: [[CP2:%.*]] = icmp sge i8 [[POW2ORZ]], [[X]]
3251+
; CHECK-NEXT: [[R:%.*]] = or i1 [[C0]], [[CP2]]
3252+
; CHECK-NEXT: ret i1 [[R]]
3253+
;
3254+
%ny = sub i8 0, %y
3255+
%pow2orz = and i8 %ny, %y
3256+
3257+
%c0 = icmp sle i8 %x, 0
3258+
%cp2 = icmp sle i8 %x, %pow2orz
3259+
%r = or i1 %c0, %cp2
3260+
ret i1 %r
3261+
}

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