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Revert "[InstSimplify] Make simplifyWithOpReplaced() recursive (PR63104)"
This is very likely the cause of a stage 2 failure in Transforms/LoopVectorize/check-prof-info.ll. Revert until I can investigate this. This reverts commit 3d199d0.
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6 files changed

+73
-62
lines changed

6 files changed

+73
-62
lines changed

‎llvm/lib/Analysis/InstructionSimplify.cpp

Lines changed: 11 additions & 23 deletions
Original file line numberDiff line numberDiff line change
@@ -4256,15 +4256,12 @@ static Value *simplifyWithOpReplaced(Value *V, Value *Op, Value *RepOp,
42564256
if (V == Op)
42574257
return RepOp;
42584258

4259-
if (!MaxRecurse--)
4260-
return nullptr;
4261-
42624259
// We cannot replace a constant, and shouldn't even try.
42634260
if (isa<Constant>(Op))
42644261
return nullptr;
42654262

42664263
auto *I = dyn_cast<Instruction>(V);
4267-
if (!I)
4264+
if (!I || !is_contained(I->operands(), Op))
42684265
return nullptr;
42694266

42704267
// The arguments of a phi node might refer to a value from a previous
@@ -4275,26 +4272,15 @@ static Value *simplifyWithOpReplaced(Value *V, Value *Op, Value *RepOp,
42754272
if (Op->getType()->isVectorTy()) {
42764273
// For vector types, the simplification must hold per-lane, so forbid
42774274
// potentially cross-lane operations like shufflevector.
4278-
if (!I->getType()->isVectorTy() || isa<ShuffleVectorInst>(I) ||
4279-
isa<CallBase>(I))
4275+
assert(I->getType()->isVectorTy() && "Vector type mismatch");
4276+
if (isa<ShuffleVectorInst>(I) || isa<CallBase>(I))
42804277
return nullptr;
42814278
}
42824279

42834280
// Replace Op with RepOp in instruction operands.
4284-
SmallVector<Value *, 8> NewOps;
4285-
bool AnyReplaced = false;
4286-
for (Value *InstOp : I->operands()) {
4287-
if (Value *NewInstOp = simplifyWithOpReplaced(
4288-
InstOp, Op, RepOp, Q, AllowRefinement, MaxRecurse)) {
4289-
NewOps.push_back(NewInstOp);
4290-
AnyReplaced = InstOp != NewInstOp;
4291-
} else {
4292-
NewOps.push_back(InstOp);
4293-
}
4294-
}
4295-
4296-
if (!AnyReplaced)
4297-
return nullptr;
4281+
SmallVector<Value *, 8> NewOps(I->getNumOperands());
4282+
transform(I->operands(), NewOps.begin(),
4283+
[&](Value *V) { return V == Op ? RepOp : V; });
42984284

42994285
if (!AllowRefinement) {
43004286
// General InstSimplify functions may refine the result, e.g. by returning
@@ -4319,8 +4305,10 @@ static Value *simplifyWithOpReplaced(Value *V, Value *Op, Value *RepOp,
43194305
// by assumption and this case never wraps, so nowrap flags can be
43204306
// ignored.
43214307
if ((Opcode == Instruction::Sub || Opcode == Instruction::Xor) &&
4322-
NewOps[0] == RepOp && NewOps[1] == RepOp)
4308+
NewOps[0] == NewOps[1]) {
4309+
assert(NewOps[0] == RepOp && "Precondition for non-poison assumption");
43234310
return Constant::getNullValue(I->getType());
4311+
}
43244312

43254313
// If we are substituting an absorber constant into a binop and extra
43264314
// poison can't leak if we remove the select -- because both operands of
@@ -4340,7 +4328,7 @@ static Value *simplifyWithOpReplaced(Value *V, Value *Op, Value *RepOp,
43404328
if (NewOps.size() == 2 && match(NewOps[1], m_Zero()))
43414329
return NewOps[0];
43424330
}
4343-
} else {
4331+
} else if (MaxRecurse) {
43444332
// The simplification queries below may return the original value. Consider:
43454333
// %div = udiv i32 %arg, %arg2
43464334
// %mul = mul nsw i32 %div, %arg2
@@ -4355,7 +4343,7 @@ static Value *simplifyWithOpReplaced(Value *V, Value *Op, Value *RepOp,
43554343
};
43564344

43574345
return PreventSelfSimplify(
4358-
::simplifyInstructionWithOperands(I, NewOps, Q, MaxRecurse));
4346+
::simplifyInstructionWithOperands(I, NewOps, Q, MaxRecurse - 1));
43594347
}
43604348

43614349
// If all operands are constant after substituting Op for RepOp then we can

‎llvm/test/Transforms/InstCombine/div-by-0-guard-before-smul_ov-not.ll

Lines changed: 11 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -53,7 +53,12 @@ define i1 @n2_wrong_size(i4 %size0, i4 %size1, i4 %nmemb) {
5353

5454
define i1 @n3_wrong_pred(i4 %size, i4 %nmemb) {
5555
; CHECK-LABEL: @n3_wrong_pred(
56-
; CHECK-NEXT: ret i1 true
56+
; CHECK-NEXT: [[CMP:%.*]] = icmp ne i4 [[SIZE:%.*]], 0
57+
; CHECK-NEXT: [[SMUL:%.*]] = tail call { i4, i1 } @llvm.smul.with.overflow.i4(i4 [[SIZE]], i4 [[NMEMB:%.*]])
58+
; CHECK-NEXT: [[SMUL_OV:%.*]] = extractvalue { i4, i1 } [[SMUL]], 1
59+
; CHECK-NEXT: [[PHITMP:%.*]] = xor i1 [[SMUL_OV]], true
60+
; CHECK-NEXT: [[OR:%.*]] = select i1 [[CMP]], i1 true, i1 [[PHITMP]]
61+
; CHECK-NEXT: ret i1 [[OR]]
5762
;
5863
%cmp = icmp ne i4 %size, 0 ; not 'eq'
5964
%smul = tail call { i4, i1 } @llvm.smul.with.overflow.i4(i4 %size, i4 %nmemb)
@@ -66,7 +71,11 @@ define i1 @n3_wrong_pred(i4 %size, i4 %nmemb) {
6671
define i1 @n4_not_and(i4 %size, i4 %nmemb) {
6772
; CHECK-LABEL: @n4_not_and(
6873
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i4 [[SIZE:%.*]], 0
69-
; CHECK-NEXT: ret i1 [[CMP]]
74+
; CHECK-NEXT: [[SMUL:%.*]] = tail call { i4, i1 } @llvm.smul.with.overflow.i4(i4 [[SIZE]], i4 [[NMEMB:%.*]])
75+
; CHECK-NEXT: [[SMUL_OV:%.*]] = extractvalue { i4, i1 } [[SMUL]], 1
76+
; CHECK-NEXT: [[PHITMP:%.*]] = xor i1 [[SMUL_OV]], true
77+
; CHECK-NEXT: [[OR:%.*]] = select i1 [[CMP]], i1 [[PHITMP]], i1 false
78+
; CHECK-NEXT: ret i1 [[OR]]
7079
;
7180
%cmp = icmp eq i4 %size, 0
7281
%smul = tail call { i4, i1 } @llvm.smul.with.overflow.i4(i4 %size, i4 %nmemb)

‎llvm/test/Transforms/InstCombine/div-by-0-guard-before-umul_ov-not.ll

Lines changed: 11 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -53,7 +53,12 @@ define i1 @n2_wrong_size(i4 %size0, i4 %size1, i4 %nmemb) {
5353

5454
define i1 @n3_wrong_pred(i4 %size, i4 %nmemb) {
5555
; CHECK-LABEL: @n3_wrong_pred(
56-
; CHECK-NEXT: ret i1 true
56+
; CHECK-NEXT: [[CMP:%.*]] = icmp ne i4 [[SIZE:%.*]], 0
57+
; CHECK-NEXT: [[UMUL:%.*]] = tail call { i4, i1 } @llvm.umul.with.overflow.i4(i4 [[SIZE]], i4 [[NMEMB:%.*]])
58+
; CHECK-NEXT: [[UMUL_OV:%.*]] = extractvalue { i4, i1 } [[UMUL]], 1
59+
; CHECK-NEXT: [[PHITMP:%.*]] = xor i1 [[UMUL_OV]], true
60+
; CHECK-NEXT: [[OR:%.*]] = select i1 [[CMP]], i1 true, i1 [[PHITMP]]
61+
; CHECK-NEXT: ret i1 [[OR]]
5762
;
5863
%cmp = icmp ne i4 %size, 0 ; not 'eq'
5964
%umul = tail call { i4, i1 } @llvm.umul.with.overflow.i4(i4 %size, i4 %nmemb)
@@ -66,7 +71,11 @@ define i1 @n3_wrong_pred(i4 %size, i4 %nmemb) {
6671
define i1 @n4_not_and(i4 %size, i4 %nmemb) {
6772
; CHECK-LABEL: @n4_not_and(
6873
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i4 [[SIZE:%.*]], 0
69-
; CHECK-NEXT: ret i1 [[CMP]]
74+
; CHECK-NEXT: [[UMUL:%.*]] = tail call { i4, i1 } @llvm.umul.with.overflow.i4(i4 [[SIZE]], i4 [[NMEMB:%.*]])
75+
; CHECK-NEXT: [[UMUL_OV:%.*]] = extractvalue { i4, i1 } [[UMUL]], 1
76+
; CHECK-NEXT: [[PHITMP:%.*]] = xor i1 [[UMUL_OV]], true
77+
; CHECK-NEXT: [[OR:%.*]] = select i1 [[CMP]], i1 [[PHITMP]], i1 false
78+
; CHECK-NEXT: ret i1 [[OR]]
7079
;
7180
%cmp = icmp eq i4 %size, 0
7281
%umul = tail call { i4, i1 } @llvm.umul.with.overflow.i4(i4 %size, i4 %nmemb)

‎llvm/test/Transforms/InstCombine/select-ctlz-to-cttz.ll

Lines changed: 26 additions & 18 deletions
Original file line numberDiff line numberDiff line change
@@ -16,8 +16,8 @@ declare void @use2(i1)
1616

1717
define i32 @select_clz_to_ctz(i32 %a) {
1818
; CHECK-LABEL: @select_clz_to_ctz(
19-
; CHECK-NEXT: [[SUB1:%.*]] = call i32 @llvm.cttz.i32(i32 [[A:%.*]], i1 true), !range [[RNG0:![0-9]+]]
20-
; CHECK-NEXT: ret i32 [[SUB1]]
19+
; CHECK-NEXT: [[COND:%.*]] = call i32 @llvm.cttz.i32(i32 [[A:%.*]], i1 true), !range [[RNG0:![0-9]+]]
20+
; CHECK-NEXT: ret i32 [[COND]]
2121
;
2222
%sub = sub i32 0, %a
2323
%and = and i32 %sub, %a
@@ -74,7 +74,8 @@ define i32 @select_clz_to_ctz_extra_use(i32 %a) {
7474
; CHECK-LABEL: @select_clz_to_ctz_extra_use(
7575
; CHECK-NEXT: [[SUB1:%.*]] = call i32 @llvm.cttz.i32(i32 [[A:%.*]], i1 true), !range [[RNG0]]
7676
; CHECK-NEXT: call void @use(i32 [[SUB1]])
77-
; CHECK-NEXT: ret i32 [[SUB1]]
77+
; CHECK-NEXT: [[COND:%.*]] = call i32 @llvm.cttz.i32(i32 [[A]], i1 true), !range [[RNG0]]
78+
; CHECK-NEXT: ret i32 [[COND]]
7879
;
7980
%sub = sub i32 0, %a
8081
%and = and i32 %sub, %a
@@ -88,8 +89,8 @@ define i32 @select_clz_to_ctz_extra_use(i32 %a) {
8889

8990
define i32 @select_clz_to_ctz_and_commuted(i32 %a) {
9091
; CHECK-LABEL: @select_clz_to_ctz_and_commuted(
91-
; CHECK-NEXT: [[SUB1:%.*]] = call i32 @llvm.cttz.i32(i32 [[A:%.*]], i1 true), !range [[RNG0]]
92-
; CHECK-NEXT: ret i32 [[SUB1]]
92+
; CHECK-NEXT: [[COND:%.*]] = call i32 @llvm.cttz.i32(i32 [[A:%.*]], i1 true), !range [[RNG0]]
93+
; CHECK-NEXT: ret i32 [[COND]]
9394
;
9495
%sub = sub i32 0, %a
9596
%and = and i32 %a, %sub
@@ -104,8 +105,8 @@ define i32 @select_clz_to_ctz_icmp_ne(i32 %a) {
104105
; CHECK-LABEL: @select_clz_to_ctz_icmp_ne(
105106
; CHECK-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[A:%.*]], 0
106107
; CHECK-NEXT: call void @use2(i1 [[TOBOOL]])
107-
; CHECK-NEXT: [[SUB1:%.*]] = call i32 @llvm.cttz.i32(i32 [[A]], i1 true), !range [[RNG0]]
108-
; CHECK-NEXT: ret i32 [[SUB1]]
108+
; CHECK-NEXT: [[COND:%.*]] = call i32 @llvm.cttz.i32(i32 [[A]], i1 true), !range [[RNG0]]
109+
; CHECK-NEXT: ret i32 [[COND]]
109110
;
110111
%sub = sub i32 0, %a
111112
%and = and i32 %sub, %a
@@ -119,8 +120,8 @@ define i32 @select_clz_to_ctz_icmp_ne(i32 %a) {
119120

120121
define i64 @select_clz_to_ctz_i64(i64 %a) {
121122
; CHECK-LABEL: @select_clz_to_ctz_i64(
122-
; CHECK-NEXT: [[SUB1:%.*]] = call i64 @llvm.cttz.i64(i64 [[A:%.*]], i1 true), !range [[RNG1:![0-9]+]]
123-
; CHECK-NEXT: ret i64 [[SUB1]]
123+
; CHECK-NEXT: [[COND:%.*]] = call i64 @llvm.cttz.i64(i64 [[A:%.*]], i1 true), !range [[RNG1:![0-9]+]]
124+
; CHECK-NEXT: ret i64 [[COND]]
124125
;
125126
%sub = sub i64 0, %a
126127
%and = and i64 %sub, %a
@@ -138,8 +139,10 @@ define i32 @select_clz_to_ctz_wrong_sub(i32 %a) {
138139
; CHECK-NEXT: [[SUB:%.*]] = sub i32 1, [[A:%.*]]
139140
; CHECK-NEXT: [[AND:%.*]] = and i32 [[SUB]], [[A]]
140141
; CHECK-NEXT: [[LZ:%.*]] = tail call i32 @llvm.ctlz.i32(i32 [[AND]], i1 true), !range [[RNG0]]
142+
; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[A]], 0
141143
; CHECK-NEXT: [[SUB1:%.*]] = xor i32 [[LZ]], 31
142-
; CHECK-NEXT: ret i32 [[SUB1]]
144+
; CHECK-NEXT: [[COND:%.*]] = select i1 [[TOBOOL]], i32 [[LZ]], i32 [[SUB1]]
145+
; CHECK-NEXT: ret i32 [[COND]]
143146
;
144147
%sub = sub i32 1, %a
145148
%and = and i32 %sub, %a
@@ -156,8 +159,10 @@ define i64 @select_clz_to_ctz_i64_wrong_xor(i64 %a) {
156159
; CHECK-NEXT: [[SUB:%.*]] = sub i64 0, [[A:%.*]]
157160
; CHECK-NEXT: [[AND:%.*]] = and i64 [[SUB]], [[A]]
158161
; CHECK-NEXT: [[LZ:%.*]] = tail call i64 @llvm.ctlz.i64(i64 [[AND]], i1 true), !range [[RNG1]]
162+
; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i64 [[A]], 0
159163
; CHECK-NEXT: [[SUB11:%.*]] = or i64 [[LZ]], 64
160-
; CHECK-NEXT: ret i64 [[SUB11]]
164+
; CHECK-NEXT: [[COND:%.*]] = select i1 [[TOBOOL]], i64 [[LZ]], i64 [[SUB11]]
165+
; CHECK-NEXT: ret i64 [[COND]]
161166
;
162167
%sub = sub i64 0, %a
163168
%and = and i64 %sub, %a
@@ -170,9 +175,12 @@ define i64 @select_clz_to_ctz_i64_wrong_xor(i64 %a) {
170175

171176
define i64 @select_clz_to_ctz_i64_wrong_icmp_cst(i64 %a) {
172177
; CHECK-LABEL: @select_clz_to_ctz_i64_wrong_icmp_cst(
173-
; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i64 [[A:%.*]], 1
174-
; CHECK-NEXT: [[SUB1:%.*]] = call i64 @llvm.cttz.i64(i64 [[A]], i1 true), !range [[RNG1]]
175-
; CHECK-NEXT: [[COND:%.*]] = select i1 [[TOBOOL]], i64 63, i64 [[SUB1]]
178+
; CHECK-NEXT: [[SUB:%.*]] = sub i64 0, [[A:%.*]]
179+
; CHECK-NEXT: [[AND:%.*]] = and i64 [[SUB]], [[A]]
180+
; CHECK-NEXT: [[LZ:%.*]] = tail call i64 @llvm.ctlz.i64(i64 [[AND]], i1 true), !range [[RNG1]]
181+
; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i64 [[A]], 1
182+
; CHECK-NEXT: [[SUB1:%.*]] = xor i64 [[LZ]], 63
183+
; CHECK-NEXT: [[COND:%.*]] = select i1 [[TOBOOL]], i64 [[LZ]], i64 [[SUB1]]
176184
; CHECK-NEXT: ret i64 [[COND]]
177185
;
178186
%sub = sub i64 0, %a
@@ -247,8 +255,8 @@ define i4 @PR45762(i3 %x4) {
247255
; CHECK-NEXT: [[T7:%.*]] = zext i3 [[T4]] to i4
248256
; CHECK-NEXT: [[ONE_HOT_16:%.*]] = shl nuw i4 1, [[T7]]
249257
; CHECK-NEXT: [[OR_69_NOT:%.*]] = icmp eq i3 [[X4]], 0
250-
; CHECK-NEXT: [[UMUL_231:%.*]] = shl i4 [[ONE_HOT_16]], [[T7]]
251-
; CHECK-NEXT: [[SEL_71:%.*]] = select i1 [[OR_69_NOT]], i4 -8, i4 [[UMUL_231]]
258+
; CHECK-NEXT: [[UMUL_231:%.*]] = select i1 [[OR_69_NOT]], i4 0, i4 [[T7]]
259+
; CHECK-NEXT: [[SEL_71:%.*]] = shl i4 [[ONE_HOT_16]], [[UMUL_231]]
252260
; CHECK-NEXT: ret i4 [[SEL_71]]
253261
;
254262
%t4 = call i3 @llvm.cttz.i3(i3 %x4, i1 false)
@@ -276,8 +284,8 @@ define i4 @PR45762_logical(i3 %x4) {
276284
; CHECK-NEXT: [[T7:%.*]] = zext i3 [[T4]] to i4
277285
; CHECK-NEXT: [[ONE_HOT_16:%.*]] = shl nuw i4 1, [[T7]]
278286
; CHECK-NEXT: [[OR_69_NOT:%.*]] = icmp eq i3 [[X4]], 0
279-
; CHECK-NEXT: [[UMUL_231:%.*]] = shl i4 [[ONE_HOT_16]], [[T7]]
280-
; CHECK-NEXT: [[SEL_71:%.*]] = select i1 [[OR_69_NOT]], i4 -8, i4 [[UMUL_231]]
287+
; CHECK-NEXT: [[UMUL_231:%.*]] = select i1 [[OR_69_NOT]], i4 0, i4 [[T7]]
288+
; CHECK-NEXT: [[SEL_71:%.*]] = shl i4 [[ONE_HOT_16]], [[UMUL_231]]
281289
; CHECK-NEXT: ret i4 [[SEL_71]]
282290
;
283291
%t4 = call i3 @llvm.cttz.i3(i3 %x4, i1 false)

‎llvm/test/Transforms/InstCombine/shift.ll

Lines changed: 0 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -1747,19 +1747,6 @@ define void @ashr_out_of_range(ptr %A) {
17471747
; https://bugs.chromium.org/p/oss-fuzz/issues/detail?id=26135
17481748
define void @ashr_out_of_range_1(ptr %A) {
17491749
; CHECK-LABEL: @ashr_out_of_range_1(
1750-
; CHECK-NEXT: [[L:%.*]] = load i177, ptr [[A:%.*]], align 4
1751-
; CHECK-NEXT: [[L_FROZEN:%.*]] = freeze i177 [[L]]
1752-
; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i177 [[L_FROZEN]], -1
1753-
; CHECK-NEXT: [[B:%.*]] = select i1 [[TMP1]], i177 0, i177 [[L_FROZEN]]
1754-
; CHECK-NEXT: [[TMP2:%.*]] = trunc i177 [[B]] to i64
1755-
; CHECK-NEXT: [[TMP3:%.*]] = add i64 [[TMP2]], -1
1756-
; CHECK-NEXT: [[G11:%.*]] = getelementptr i177, ptr [[A]], i64 [[TMP3]]
1757-
; CHECK-NEXT: [[C17:%.*]] = icmp sgt i177 [[B]], [[L_FROZEN]]
1758-
; CHECK-NEXT: [[TMP4:%.*]] = sext i1 [[C17]] to i64
1759-
; CHECK-NEXT: [[G62:%.*]] = getelementptr i177, ptr [[G11]], i64 [[TMP4]]
1760-
; CHECK-NEXT: [[TMP5:%.*]] = icmp eq i177 [[L_FROZEN]], -1
1761-
; CHECK-NEXT: [[B28:%.*]] = select i1 [[TMP5]], i177 0, i177 [[L_FROZEN]]
1762-
; CHECK-NEXT: store i177 [[B28]], ptr [[G62]], align 4
17631750
; CHECK-NEXT: ret void
17641751
;
17651752
%L = load i177, ptr %A, align 4

‎llvm/test/Transforms/InstSimplify/select.ll

Lines changed: 14 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -1094,7 +1094,9 @@ define i8 @select_eq_xor_recursive(i8 %a, i8 %b) {
10941094
; CHECK-LABEL: @select_eq_xor_recursive(
10951095
; CHECK-NEXT: [[XOR:%.*]] = xor i8 [[A:%.*]], [[B:%.*]]
10961096
; CHECK-NEXT: [[INV:%.*]] = xor i8 [[XOR]], -1
1097-
; CHECK-NEXT: ret i8 [[INV]]
1097+
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i8 [[A]], [[B]]
1098+
; CHECK-NEXT: [[SEL:%.*]] = select i1 [[CMP]], i8 -1, i8 [[INV]]
1099+
; CHECK-NEXT: ret i8 [[SEL]]
10981100
;
10991101
%xor = xor i8 %a, %b
11001102
%inv = xor i8 %xor, -1
@@ -1108,7 +1110,9 @@ define i8 @select_eq_xor_recursive2(i8 %a, i8 %b) {
11081110
; CHECK-NEXT: [[XOR:%.*]] = xor i8 [[A:%.*]], [[B:%.*]]
11091111
; CHECK-NEXT: [[INV:%.*]] = xor i8 [[XOR]], -1
11101112
; CHECK-NEXT: [[ADD:%.*]] = add i8 [[INV]], 10
1111-
; CHECK-NEXT: ret i8 [[ADD]]
1113+
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i8 [[A]], [[B]]
1114+
; CHECK-NEXT: [[SEL:%.*]] = select i1 [[CMP]], i8 9, i8 [[ADD]]
1115+
; CHECK-NEXT: ret i8 [[SEL]]
11121116
;
11131117
%xor = xor i8 %a, %b
11141118
%inv = xor i8 %xor, -1
@@ -1158,7 +1162,9 @@ define i8 @select_eq_and_recursive(i8 %a) {
11581162
; CHECK-NEXT: [[NEG:%.*]] = sub i8 0, [[A:%.*]]
11591163
; CHECK-NEXT: [[AND:%.*]] = and i8 [[NEG]], [[A]]
11601164
; CHECK-NEXT: [[ADD:%.*]] = add i8 [[AND]], 1
1161-
; CHECK-NEXT: ret i8 [[ADD]]
1165+
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i8 [[A]], 0
1166+
; CHECK-NEXT: [[SEL:%.*]] = select i1 [[CMP]], i8 1, i8 [[ADD]]
1167+
; CHECK-NEXT: ret i8 [[SEL]]
11621168
;
11631169
%neg = sub i8 0, %a
11641170
%and = and i8 %neg, %a
@@ -1188,7 +1194,11 @@ define i8 @select_eq_and_recursive_propagates_poison(i8 %a, i8 %b) {
11881194

11891195
define i8 @select_eq_xor_recursive_allow_refinement(i8 %a, i8 %b) {
11901196
; CHECK-LABEL: @select_eq_xor_recursive_allow_refinement(
1191-
; CHECK-NEXT: ret i8 0
1197+
; CHECK-NEXT: [[XOR1:%.*]] = add i8 [[A:%.*]], [[B:%.*]]
1198+
; CHECK-NEXT: [[XOR2:%.*]] = xor i8 [[A]], [[XOR1]]
1199+
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i8 [[B]], 0
1200+
; CHECK-NEXT: [[SEL:%.*]] = select i1 [[CMP]], i8 [[XOR2]], i8 0
1201+
; CHECK-NEXT: ret i8 [[SEL]]
11921202
;
11931203
%xor1 = add i8 %a, %b
11941204
%xor2 = xor i8 %a, %xor1

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