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Revert "[InstCombine] Add reverse of ((X << nuw Z) sub nuw Y) >>u exact Z --> X sub nuw (Y >>u exact Z) (#91386)"
This reverts commit c42c320. PR merged without review.
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2 files changed

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llvm/lib/Transforms/InstCombine/InstCombineShifts.cpp

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@@ -1275,17 +1275,6 @@ Instruction *InstCombinerImpl::visitLShr(BinaryOperator &I) {
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return NewSub;
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}
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// (sub nuw X, (Y << nuw Z)) >>u exact Z --> (X >>u exact Z) sub nuw Y
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if (I.isExact() &&
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match(Op0, m_OneUse(m_NUWSub(m_Value(X),
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m_NUWShl(m_Value(Y), m_Specific(Op1)))))) {
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Value *NewLshr = Builder.CreateLShr(X, Op1, "", /*isExact=*/true);
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auto *NewSub = BinaryOperator::CreateNUWSub(NewLshr, Y);
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NewSub->setHasNoSignedWrap(
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cast<OverflowingBinaryOperator>(Op0)->hasNoSignedWrap());
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return NewSub;
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}
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auto isSuitableBinOpcode = [](Instruction::BinaryOps BinOpcode) {
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switch (BinOpcode) {
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default:

llvm/test/Transforms/InstCombine/lshr.ll

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Original file line numberDiff line numberDiff line change
@@ -466,33 +466,6 @@ define i32 @shl_sub_lshr(i32 %x, i32 %c, i32 %y) {
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ret i32 %lshr
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}
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define i32 @shl_sub_lshr_reverse(i32 %x, i32 %c, i32 %y) {
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; CHECK-LABEL: @shl_sub_lshr_reverse(
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; CHECK-NEXT: [[TMP1:%.*]] = lshr exact i32 [[Y:%.*]], [[C:%.*]]
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; CHECK-NEXT: [[LSHR:%.*]] = sub nuw nsw i32 [[TMP1]], [[X:%.*]]
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; CHECK-NEXT: ret i32 [[LSHR]]
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;
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%shl = shl nuw i32 %x, %c
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%sub = sub nuw nsw i32 %y, %shl
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%lshr = lshr exact i32 %sub, %c
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ret i32 %lshr
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}
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; Negative test
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define i32 @shl_sub_lshr_reverse_no_exact(i32 %x, i32 %c, i32 %y) {
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; CHECK-LABEL: @shl_sub_lshr_reverse_no_exact(
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; CHECK-NEXT: [[SHL:%.*]] = shl nuw i32 [[X:%.*]], [[C:%.*]]
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; CHECK-NEXT: [[SUB:%.*]] = sub nuw nsw i32 [[Y:%.*]], [[SHL]]
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; CHECK-NEXT: [[LSHR:%.*]] = lshr i32 [[SUB]], [[C]]
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; CHECK-NEXT: ret i32 [[LSHR]]
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;
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%shl = shl nuw i32 %x, %c
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%sub = sub nuw nsw i32 %y, %shl
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%lshr = lshr i32 %sub, %c
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ret i32 %lshr
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}
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define i32 @shl_or_lshr(i32 %x, i32 %c, i32 %y) {
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; CHECK-LABEL: @shl_or_lshr(
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; CHECK-NEXT: [[TMP1:%.*]] = lshr i32 [[Y:%.*]], [[C:%.*]]

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