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klensy
committed
fixup indent
1 parent 2129c06 commit 2be9a28

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4 files changed

+38
-38
lines changed

4 files changed

+38
-38
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‎llvm/test/CodeGen/AArch64/arm64ec-entry-thunks.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,7 +1,7 @@
11
; RUN: llc -mtriple=arm64ec-pc-windows-msvc < %s | FileCheck %s
22

33
define void @no_op() nounwind {
4-
; CHECK-LABEL: .def $ientry_thunk$cdecl$v$v;
4+
; CHECK-LABEL: .def $ientry_thunk$cdecl$v$v;
55
; CHECK: .section .wowthk$aa,"xr",discard,$ientry_thunk$cdecl$v$v
66
; CHECK: // %bb.0:
77
; CHECK-NEXT: stp q6, q7, [sp, #-176]! // 32-byte Folded Spill

‎llvm/test/CodeGen/NVPTX/idioms.ll

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -42,7 +42,7 @@ define %struct.S16 @i32_to_2xi16(i32 noundef %in) {
4242
%high = trunc i32 %high32 to i16
4343
; CHECK: ld.param.u32 %[[R32:r[0-9]+]], [i32_to_2xi16_param_0];
4444
; CHECK-DAG: cvt.u16.u32 %rs{{[0-9+]}}, %[[R32]];
45-
; CHECK-DAG: mov.b32 {tmp, %rs{{[0-9+]}}}, %[[R32]];
45+
; CHECK-DAG: mov.b32 {tmp, %rs{{[0-9+]}}}, %[[R32]];
4646
%s1 = insertvalue %struct.S16 poison, i16 %low, 0
4747
%s = insertvalue %struct.S16 %s1, i16 %high, 1
4848
ret %struct.S16 %s
@@ -56,7 +56,7 @@ define %struct.S16 @i32_to_2xi16_lh(i32 noundef %in) {
5656
%low = trunc i32 %in to i16
5757
; CHECK: ld.param.u32 %[[R32:r[0-9]+]], [i32_to_2xi16_lh_param_0];
5858
; CHECK-DAG: cvt.u16.u32 %rs{{[0-9+]}}, %[[R32]];
59-
; CHECK-DAG: mov.b32 {tmp, %rs{{[0-9+]}}}, %[[R32]];
59+
; CHECK-DAG: mov.b32 {tmp, %rs{{[0-9+]}}}, %[[R32]];
6060
%s1 = insertvalue %struct.S16 poison, i16 %low, 0
6161
%s = insertvalue %struct.S16 %s1, i16 %high, 1
6262
ret %struct.S16 %s
@@ -84,7 +84,7 @@ define %struct.S32 @i64_to_2xi32(i64 noundef %in) {
8484
%high = trunc i64 %high64 to i32
8585
; CHECK: ld.param.u64 %[[R64:rd[0-9]+]], [i64_to_2xi32_param_0];
8686
; CHECK-DAG: cvt.u32.u64 %r{{[0-9+]}}, %[[R64]];
87-
; CHECK-DAG: mov.b64 {tmp, %r{{[0-9+]}}}, %[[R64]];
87+
; CHECK-DAG: mov.b64 {tmp, %r{{[0-9+]}}}, %[[R64]];
8888
%s1 = insertvalue %struct.S32 poison, i32 %low, 0
8989
%s = insertvalue %struct.S32 %s1, i32 %high, 1
9090
ret %struct.S32 %s
@@ -114,8 +114,8 @@ define %struct.S16 @i32_to_2xi16_shr(i32 noundef %i){
114114
%h = trunc i32 %h32 to i16
115115
; CHECK: ld.param.u32 %[[R32:r[0-9]+]], [i32_to_2xi16_shr_param_0];
116116
; CHECK: shr.s32 %[[R32H:r[0-9]+]], %[[R32]], 16;
117-
; CHECK-DAG: mov.b32 {tmp, %rs{{[0-9+]}}}, %[[R32]];
118-
; CHECK-DAG: mov.b32 {tmp, %rs{{[0-9+]}}}, %[[R32H]];
117+
; CHECK-DAG: mov.b32 {tmp, %rs{{[0-9+]}}}, %[[R32]];
118+
; CHECK-DAG: mov.b32 {tmp, %rs{{[0-9+]}}}, %[[R32H]];
119119
%s0 = insertvalue %struct.S16 poison, i16 %l, 0
120120
%s1 = insertvalue %struct.S16 %s0, i16 %h, 1
121121
ret %struct.S16 %s1

‎llvm/test/CodeGen/X86/global-sections.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -35,7 +35,7 @@ bb5:
3535
ret void
3636
}
3737

38-
; LINUX: .size F2,
38+
; LINUX: .size F2,
3939
; LINUX-NEXT: .cfi_endproc
4040
; LINUX-NEXT: .section .rodata,"a",@progbits
4141

‎llvm/test/MC/Xtensa/Relocations/relocations.s

Lines changed: 31 additions & 31 deletions
Original file line numberDiff line numberDiff line change
@@ -13,157 +13,157 @@
1313

1414
ball a1, a3, func
1515
# RELOC: R_XTENSA_SLOT0_OP
16-
# INSTR: ball a1, a3, func
16+
# INSTR: ball a1, a3, func
1717
# FIXUP: fixup A - offset: 0, value: func, kind: fixup_xtensa_branch_8
1818

1919
bany a8, a13, func
2020
# RELOC: R_XTENSA_SLOT0_OP
21-
# INSTR: bany a8, a13, func
21+
# INSTR: bany a8, a13, func
2222
# FIXUP: fixup A - offset: 0, value: func, kind: fixup_xtensa_branch_8
2323

2424
bbc a8, a7, func
2525
# RELOC: R_XTENSA_SLOT0_OP
26-
# INSTR: bbc a8, a7, func
26+
# INSTR: bbc a8, a7, func
2727
# FIXUP: fixup A - offset: 0, value: func, kind: fixup_xtensa_branch_8
2828

2929
bbci a3, 16, func
3030
# RELOC: R_XTENSA_SLOT0_OP
31-
# INSTR: bbci a3, 16, func
31+
# INSTR: bbci a3, 16, func
3232
# FIXUP: fixup A - offset: 0, value: func, kind: fixup_xtensa_branch_8
3333

3434
bbs a12, a5, func
3535
# RELOC: R_XTENSA_SLOT0_OP
36-
# INSTR: bbs a12, a5, func
36+
# INSTR: bbs a12, a5, func
3737
# FIXUP: fixup A - offset: 0, value: func, kind: fixup_xtensa_branch_8
3838

3939
bbsi a3, 16, func
4040
# RELOC: R_XTENSA_SLOT0_OP
41-
# INSTR: bbsi a3, 16, func
41+
# INSTR: bbsi a3, 16, func
4242
# FIXUP: fixup A - offset: 0, value: func, kind: fixup_xtensa_branch_8
4343

4444
bnall a7, a3, func
4545
# RELOC: R_XTENSA_SLOT0_OP
46-
# INSTR: bnall a7, a3, func
46+
# INSTR: bnall a7, a3, func
4747
# FIXUP: fixup A - offset: 0, value: func, kind: fixup_xtensa_branch_8
4848

4949
bnone a2, a4, func
5050
# RELOC: R_XTENSA_SLOT0_OP
51-
# INSTR: bnone a2, a4, func
51+
# INSTR: bnone a2, a4, func
5252
# FIXUP: fixup A - offset: 0, value: func, kind: fixup_xtensa_branch_8
5353

5454
beq a1, a2, func
5555
# RELOC: R_XTENSA_SLOT0_OP
56-
# INSTR: beq a1, a2, func
56+
# INSTR: beq a1, a2, func
5757
# FIXUP: fixup A - offset: 0, value: func, kind: fixup_xtensa_branch_8
5858

5959
beq a11, a5, func
6060
# RELOC: R_XTENSA_SLOT0_OP
61-
# INSTR: beq a11, a5, func
61+
# INSTR: beq a11, a5, func
6262
# FIXUP: fixup A - offset: 0, value: func, kind: fixup_xtensa_branch_8
6363

6464
beqi a1, 256, func
6565
# RELOC: R_XTENSA_SLOT0_OP
66-
# INSTR: beqi a1, 256, func
66+
# INSTR: beqi a1, 256, func
6767
# FIXUP: fixup A - offset: 0, value: func, kind: fixup_xtensa_branch_8
6868

6969
beqi a11, -1, func
7070
# RELOC: R_XTENSA_SLOT0_OP
71-
# INSTR: beqi a11, -1, func
71+
# INSTR: beqi a11, -1, func
7272
# FIXUP: fixup A - offset: 0, value: func, kind: fixup_xtensa_branch_8
7373

7474
beqz a8, func
7575
# RELOC: R_XTENSA_SLOT0_OP
76-
# INSTR: beqz a8, func
76+
# INSTR: beqz a8, func
7777
# FIXUP: fixup A - offset: 0, value: func, kind: fixup_xtensa_branch_12
7878

7979
bge a14, a2, func
8080
# RELOC: R_XTENSA_SLOT0_OP
81-
# INSTR: bge a14, a2, func
81+
# INSTR: bge a14, a2, func
8282
# FIXUP: fixup A - offset: 0, value: func, kind: fixup_xtensa_branch_8
8383

8484
bgei a11, -1, func
8585
# RELOC: R_XTENSA_SLOT0_OP
86-
# INSTR: bgei a11, -1, func
86+
# INSTR: bgei a11, -1, func
8787
# FIXUP: fixup A - offset: 0, value: func, kind: fixup_xtensa_branch_8
8888

8989
bgei a11, 128, func
9090
# RELOC: R_XTENSA_SLOT0_OP
91-
# INSTR: bgei a11, 128, func
91+
# INSTR: bgei a11, 128, func
9292
# FIXUP: fixup A - offset: 0, value: func, kind: fixup_xtensa_branch_8
9393

9494
bgeu a14, a2, func
9595
# RELOC: R_XTENSA_SLOT0_OP
96-
# INSTR: bgeu a14, a2, func
96+
# INSTR: bgeu a14, a2, func
9797
# FIXUP: fixup A - offset: 0, value: func, kind: fixup_xtensa_branch_8
9898

9999
bgeui a9, 32768, func
100100
# RELOC: R_XTENSA_SLOT0_OP
101-
# INSTR: bgeui a9, 32768, func
101+
# INSTR: bgeui a9, 32768, func
102102
# FIXUP: fixup A - offset: 0, value: func, kind: fixup_xtensa_branch_8
103103

104104
bgeui a7, 65536, func
105105
# RELOC: R_XTENSA_SLOT0_OP
106-
# INSTR: bgeui a7, 65536, func
106+
# INSTR: bgeui a7, 65536, func
107107
# FIXUP: fixup A - offset: 0, value: func, kind: fixup_xtensa_branch_8
108108

109109
bgeui a7, 64, func
110110
# RELOC: R_XTENSA_SLOT0_OP
111-
# INSTR: bgeui a7, 64, func
111+
# INSTR: bgeui a7, 64, func
112112
# FIXUP: fixup A - offset: 0, value: func, kind: fixup_xtensa_branch_8
113113

114114
bgez a8, func
115115
# RELOC: R_XTENSA_SLOT0_OP
116-
# INSTR: bgez a8, func
116+
# INSTR: bgez a8, func
117117
# FIXUP: fixup A - offset: 0, value: func, kind: fixup_xtensa_branch_12
118118

119119
blt a14, a2, func
120120
# RELOC: R_XTENSA_SLOT0_OP
121-
# INSTR: blt a14, a2, func
121+
# INSTR: blt a14, a2, func
122122
# FIXUP: fixup A - offset: 0, value: func, kind: fixup_xtensa_branch_8
123123

124124
blti a12, -1, func
125125
# RELOC: R_XTENSA_SLOT0_OP
126-
# INSTR: blti a12, -1, func
126+
# INSTR: blti a12, -1, func
127127
# FIXUP: fixup A - offset: 0, value: func, kind: fixup_xtensa_branch_8
128128

129129
blti a0, 32, func
130130
# RELOC: R_XTENSA_SLOT0_OP
131-
# INSTR: blti a0, 32, func
131+
# INSTR: blti a0, 32, func
132132
# FIXUP: fixup A - offset: 0, value: func, kind: fixup_xtensa_branch_8
133133

134134
bgeu a13, a1, func
135135
# RELOC: R_XTENSA_SLOT0_OP
136-
# INSTR: bgeu a13, a1, func
136+
# INSTR: bgeu a13, a1, func
137137
# FIXUP: fixup A - offset: 0, value: func, kind: fixup_xtensa_branch_8
138138

139139
bltui a7, 16, func
140140
# RELOC: R_XTENSA_SLOT0_OP
141-
# INSTR: bltui a7, 16, func
141+
# INSTR: bltui a7, 16, func
142142
# FIXUP: fixup A - offset: 0, value: func, kind: fixup_xtensa_branch_8
143143

144144
bltz a6, func
145145
# RELOC: R_XTENSA_SLOT0_OP
146-
# INSTR: bltz a6, func
146+
# INSTR: bltz a6, func
147147
# FIXUP: fixup A - offset: 0, value: func, kind: fixup_xtensa_branch_12
148148

149149
bne a3, a4, func
150150
# RELOC: R_XTENSA_SLOT0_OP
151-
# INSTR: bne a3, a4, func
151+
# INSTR: bne a3, a4, func
152152
# FIXUP: fixup A - offset: 0, value: func, kind: fixup_xtensa_branch_8
153153

154154
bnei a5, 12, func
155155
# RELOC: R_XTENSA_SLOT0_OP
156-
# INSTR: bnei a5, 12, func
156+
# INSTR: bnei a5, 12, func
157157
# FIXUP: fixup A - offset: 0, value: func, kind: fixup_xtensa_branch_8
158158

159159
bnez a5, func
160160
# RELOC: R_XTENSA_SLOT0_OP
161-
# INSTR: bnez a5, func
161+
# INSTR: bnez a5, func
162162
# FIXUP: fixup A - offset: 0, value: func, kind: fixup_xtensa_branch_12
163163

164164
call0 func
165165
# RELOC: R_XTENSA_SLOT0_OP
166-
# INSTR: call0 func
166+
# INSTR: call0 func
167167
# FIXUP: fixup A - offset: 0, value: func, kind: fixup_xtensa_call_18
168168

169169
j func

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