@@ -560,7 +560,7 @@ define <4 x i32> @test_srem_odd_poweroftwo(<4 x i32> %X) nounwind {
560
560
; CHECK-SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm1[0,1],xmm0[2,3],xmm1[4,5],xmm0[6,7]
561
561
; CHECK-SSE41-NEXT: psrlq $32, %xmm1
562
562
; CHECK-SSE41-NEXT: por %xmm1, %xmm0
563
- ; CHECK-SSE41-NEXT: movdqa {{.*#+}} xmm1 = [858993458,858993458,268435454 ,858993458]
563
+ ; CHECK-SSE41-NEXT: movdqa {{.*#+}} xmm1 = [858993458,858993458,268435455 ,858993458]
564
564
; CHECK-SSE41-NEXT: pminud %xmm0, %xmm1
565
565
; CHECK-SSE41-NEXT: pcmpeqd %xmm1, %xmm0
566
566
; CHECK-SSE41-NEXT: psrld $31, %xmm0
@@ -646,7 +646,7 @@ define <4 x i32> @test_srem_even_poweroftwo(<4 x i32> %X) nounwind {
646
646
; CHECK-SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,0,2,2]
647
647
; CHECK-SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3],xmm0[4,5],xmm1[6,7]
648
648
; CHECK-SSE41-NEXT: por %xmm2, %xmm0
649
- ; CHECK-SSE41-NEXT: movdqa {{.*#+}} xmm1 = [306783378,306783378,268435454 ,306783378]
649
+ ; CHECK-SSE41-NEXT: movdqa {{.*#+}} xmm1 = [306783378,306783378,268435455 ,306783378]
650
650
; CHECK-SSE41-NEXT: pminud %xmm0, %xmm1
651
651
; CHECK-SSE41-NEXT: pcmpeqd %xmm1, %xmm0
652
652
; CHECK-SSE41-NEXT: psrld $31, %xmm0
@@ -735,7 +735,7 @@ define <4 x i32> @test_srem_odd_even_poweroftwo(<4 x i32> %X) nounwind {
735
735
; CHECK-SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,0,2,2]
736
736
; CHECK-SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3],xmm0[4,5],xmm1[6,7]
737
737
; CHECK-SSE41-NEXT: por %xmm2, %xmm0
738
- ; CHECK-SSE41-NEXT: movdqa {{.*#+}} xmm1 = [858993458,306783378,268435454 ,42949672]
738
+ ; CHECK-SSE41-NEXT: movdqa {{.*#+}} xmm1 = [858993458,306783378,268435455 ,42949672]
739
739
; CHECK-SSE41-NEXT: pminud %xmm0, %xmm1
740
740
; CHECK-SSE41-NEXT: pcmpeqd %xmm1, %xmm0
741
741
; CHECK-SSE41-NEXT: psrld $31, %xmm0
@@ -1041,7 +1041,7 @@ define <4 x i32> @test_srem_odd_INT_MIN(<4 x i32> %X) nounwind {
1041
1041
; CHECK-SSE41-NEXT: pcmpeqd %xmm1, %xmm2
1042
1042
; CHECK-SSE41-NEXT: pmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
1043
1043
; CHECK-SSE41-NEXT: paddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
1044
- ; CHECK-SSE41-NEXT: movdqa {{.*#+}} xmm1 = [858993458,858993458,0 ,858993458]
1044
+ ; CHECK-SSE41-NEXT: movdqa {{.*#+}} xmm1 = [858993458,858993458,1 ,858993458]
1045
1045
; CHECK-SSE41-NEXT: pminud %xmm0, %xmm1
1046
1046
; CHECK-SSE41-NEXT: pcmpeqd %xmm1, %xmm0
1047
1047
; CHECK-SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0,1,2,3],xmm2[4,5],xmm0[6,7]
@@ -1135,39 +1135,38 @@ define <4 x i32> @test_srem_even_INT_MIN(<4 x i32> %X) nounwind {
1135
1135
; CHECK-SSE41-NEXT: pxor %xmm1, %xmm1
1136
1136
; CHECK-SSE41-NEXT: movdqa {{.*#+}} xmm2 = [3067833783,3067833783,1,3067833783]
1137
1137
; CHECK-SSE41-NEXT: pmulld %xmm0, %xmm2
1138
- ; CHECK-SSE41-NEXT: movdqa {{.*#+}} xmm3 = [306783378,306783378,0,306783378]
1139
- ; CHECK-SSE41-NEXT: paddd %xmm3, %xmm2
1140
- ; CHECK-SSE41-NEXT: pshufd {{.*#+}} xmm4 = xmm2[1,1,3,3]
1141
- ; CHECK-SSE41-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm4
1138
+ ; CHECK-SSE41-NEXT: paddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2
1139
+ ; CHECK-SSE41-NEXT: pshufd {{.*#+}} xmm3 = xmm2[1,1,3,3]
1140
+ ; CHECK-SSE41-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm3
1142
1141
; CHECK-SSE41-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2
1143
- ; CHECK-SSE41-NEXT: pshufd {{.*#+}} xmm5 = xmm2[1,1,3,3]
1144
- ; CHECK-SSE41-NEXT: pblendw {{.*#+}} xmm5 = xmm5[0,1],xmm4[2,3],xmm5[4,5],xmm4[6,7]
1145
- ; CHECK-SSE41-NEXT: pshufd {{.*#+}} xmm4 = xmm4[0,0,2,2]
1146
- ; CHECK-SSE41-NEXT: pblendw {{.*#+}} xmm4 = xmm2[0,1],xmm4[2,3],xmm2[4,5],xmm4[6,7]
1147
- ; CHECK-SSE41-NEXT: por %xmm5, %xmm4
1148
- ; CHECK-SSE41-NEXT: pminud %xmm4, %xmm3
1149
- ; CHECK-SSE41-NEXT: pcmpeqd %xmm4, %xmm3
1142
+ ; CHECK-SSE41-NEXT: pshufd {{.*#+}} xmm4 = xmm2[1,1,3,3]
1143
+ ; CHECK-SSE41-NEXT: pblendw {{.*#+}} xmm4 = xmm4[0,1],xmm3[2,3],xmm4[4,5],xmm3[6,7]
1144
+ ; CHECK-SSE41-NEXT: pshufd {{.*#+}} xmm3 = xmm3[0,0,2,2]
1145
+ ; CHECK-SSE41-NEXT: pblendw {{.*#+}} xmm3 = xmm2[0,1],xmm3[2,3],xmm2[4,5],xmm3[6,7]
1146
+ ; CHECK-SSE41-NEXT: por %xmm4, %xmm3
1147
+ ; CHECK-SSE41-NEXT: movdqa {{.*#+}} xmm2 = [306783378,306783378,1,306783378]
1148
+ ; CHECK-SSE41-NEXT: pminud %xmm3, %xmm2
1149
+ ; CHECK-SSE41-NEXT: pcmpeqd %xmm3, %xmm2
1150
1150
; CHECK-SSE41-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
1151
1151
; CHECK-SSE41-NEXT: pcmpeqd %xmm1, %xmm0
1152
- ; CHECK-SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm3 [0,1,2,3],xmm0[4,5],xmm3 [6,7]
1152
+ ; CHECK-SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm2 [0,1,2,3],xmm0[4,5],xmm2 [6,7]
1153
1153
; CHECK-SSE41-NEXT: psrld $31, %xmm0
1154
1154
; CHECK-SSE41-NEXT: retq
1155
1155
;
1156
1156
; CHECK-AVX1-LABEL: test_srem_even_INT_MIN:
1157
1157
; CHECK-AVX1: # %bb.0:
1158
1158
; CHECK-AVX1-NEXT: vpxor %xmm1, %xmm1, %xmm1
1159
1159
; CHECK-AVX1-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm2
1160
- ; CHECK-AVX1-NEXT: vmovdqa {{.*#+}} xmm3 = [306783378,306783378,0,306783378]
1161
- ; CHECK-AVX1-NEXT: vpaddd %xmm3, %xmm2, %xmm2
1162
- ; CHECK-AVX1-NEXT: vpshufd {{.*#+}} xmm4 = xmm2[1,1,3,3]
1163
- ; CHECK-AVX1-NEXT: vpmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm4, %xmm4
1160
+ ; CHECK-AVX1-NEXT: vpaddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2, %xmm2
1161
+ ; CHECK-AVX1-NEXT: vpshufd {{.*#+}} xmm3 = xmm2[1,1,3,3]
1162
+ ; CHECK-AVX1-NEXT: vpmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm3, %xmm3
1164
1163
; CHECK-AVX1-NEXT: vpmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2, %xmm2
1165
- ; CHECK-AVX1-NEXT: vpshufd {{.*#+}} xmm5 = xmm2[1,1,3,3]
1166
- ; CHECK-AVX1-NEXT: vpblendw {{.*#+}} xmm5 = xmm5 [0,1],xmm4 [2,3],xmm5 [4,5],xmm4 [6,7]
1167
- ; CHECK-AVX1-NEXT: vpshufd {{.*#+}} xmm4 = xmm4 [0,0,2,2]
1168
- ; CHECK-AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm2[0,1],xmm4 [2,3],xmm2[4,5],xmm4 [6,7]
1169
- ; CHECK-AVX1-NEXT: vpor %xmm5 , %xmm2, %xmm2
1170
- ; CHECK-AVX1-NEXT: vpminud %xmm3 , %xmm2, %xmm3
1164
+ ; CHECK-AVX1-NEXT: vpshufd {{.*#+}} xmm4 = xmm2[1,1,3,3]
1165
+ ; CHECK-AVX1-NEXT: vpblendw {{.*#+}} xmm4 = xmm4 [0,1],xmm3 [2,3],xmm4 [4,5],xmm3 [6,7]
1166
+ ; CHECK-AVX1-NEXT: vpshufd {{.*#+}} xmm3 = xmm3 [0,0,2,2]
1167
+ ; CHECK-AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm2[0,1],xmm3 [2,3],xmm2[4,5],xmm3 [6,7]
1168
+ ; CHECK-AVX1-NEXT: vpor %xmm4 , %xmm2, %xmm2
1169
+ ; CHECK-AVX1-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip) , %xmm2, %xmm3
1171
1170
; CHECK-AVX1-NEXT: vpcmpeqd %xmm3, %xmm2, %xmm2
1172
1171
; CHECK-AVX1-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
1173
1172
; CHECK-AVX1-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0
@@ -1179,12 +1178,11 @@ define <4 x i32> @test_srem_even_INT_MIN(<4 x i32> %X) nounwind {
1179
1178
; CHECK-AVX2: # %bb.0:
1180
1179
; CHECK-AVX2-NEXT: vpxor %xmm1, %xmm1, %xmm1
1181
1180
; CHECK-AVX2-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm2
1182
- ; CHECK-AVX2-NEXT: vmovdqa {{.*#+}} xmm3 = [306783378,306783378,0,306783378]
1183
- ; CHECK-AVX2-NEXT: vpaddd %xmm3, %xmm2, %xmm2
1184
- ; CHECK-AVX2-NEXT: vpsrlvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2, %xmm4
1181
+ ; CHECK-AVX2-NEXT: vpaddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2, %xmm2
1182
+ ; CHECK-AVX2-NEXT: vpsrlvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2, %xmm3
1185
1183
; CHECK-AVX2-NEXT: vpsllvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2, %xmm2
1186
- ; CHECK-AVX2-NEXT: vpor %xmm4 , %xmm2, %xmm2
1187
- ; CHECK-AVX2-NEXT: vpminud %xmm3 , %xmm2, %xmm3
1184
+ ; CHECK-AVX2-NEXT: vpor %xmm3 , %xmm2, %xmm2
1185
+ ; CHECK-AVX2-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip) , %xmm2, %xmm3
1188
1186
; CHECK-AVX2-NEXT: vpcmpeqd %xmm3, %xmm2, %xmm2
1189
1187
; CHECK-AVX2-NEXT: vpbroadcastd {{.*#+}} xmm3 = [2147483647,2147483647,2147483647,2147483647]
1190
1188
; CHECK-AVX2-NEXT: vpand %xmm3, %xmm0, %xmm0
@@ -1196,15 +1194,14 @@ define <4 x i32> @test_srem_even_INT_MIN(<4 x i32> %X) nounwind {
1196
1194
; CHECK-AVX512VL-LABEL: test_srem_even_INT_MIN:
1197
1195
; CHECK-AVX512VL: # %bb.0:
1198
1196
; CHECK-AVX512VL-NEXT: vpxor %xmm1, %xmm1, %xmm1
1199
- ; CHECK-AVX512VL-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm2
1200
- ; CHECK-AVX512VL-NEXT: vmovdqa {{.*#+}} xmm3 = [306783378,306783378,0,306783378]
1201
- ; CHECK-AVX512VL-NEXT: vpaddd %xmm3, %xmm2, %xmm2
1202
- ; CHECK-AVX512VL-NEXT: vprorvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2, %xmm2
1203
- ; CHECK-AVX512VL-NEXT: vpminud %xmm3, %xmm2, %xmm3
1204
- ; CHECK-AVX512VL-NEXT: vpcmpeqd %xmm3, %xmm2, %xmm2
1205
- ; CHECK-AVX512VL-NEXT: vpandd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm0, %xmm0
1206
- ; CHECK-AVX512VL-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0
1207
- ; CHECK-AVX512VL-NEXT: vpblendd {{.*#+}} xmm0 = xmm2[0,1],xmm0[2],xmm2[3]
1197
+ ; CHECK-AVX512VL-NEXT: vpandd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm0, %xmm2
1198
+ ; CHECK-AVX512VL-NEXT: vpcmpeqd %xmm1, %xmm2, %xmm1
1199
+ ; CHECK-AVX512VL-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
1200
+ ; CHECK-AVX512VL-NEXT: vpaddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
1201
+ ; CHECK-AVX512VL-NEXT: vprorvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
1202
+ ; CHECK-AVX512VL-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm2
1203
+ ; CHECK-AVX512VL-NEXT: vpcmpeqd %xmm2, %xmm0, %xmm0
1204
+ ; CHECK-AVX512VL-NEXT: vpblendd {{.*#+}} xmm0 = xmm0[0,1],xmm1[2],xmm0[3]
1208
1205
; CHECK-AVX512VL-NEXT: vpsrld $31, %xmm0, %xmm0
1209
1206
; CHECK-AVX512VL-NEXT: retq
1210
1207
%srem = srem <4 x i32 > %X , <i32 14 , i32 14 , i32 2147483648 , i32 14 >
@@ -1263,7 +1260,7 @@ define <4 x i32> @test_srem_odd_even_INT_MIN(<4 x i32> %X) nounwind {
1263
1260
; CHECK-SSE41-NEXT: pshufd {{.*#+}} xmm3 = xmm3[0,0,2,2]
1264
1261
; CHECK-SSE41-NEXT: pblendw {{.*#+}} xmm3 = xmm2[0,1],xmm3[2,3],xmm2[4,5],xmm3[6,7]
1265
1262
; CHECK-SSE41-NEXT: por %xmm4, %xmm3
1266
- ; CHECK-SSE41-NEXT: movdqa {{.*#+}} xmm2 = [858993458,306783378,0 ,42949672]
1263
+ ; CHECK-SSE41-NEXT: movdqa {{.*#+}} xmm2 = [858993458,306783378,1 ,42949672]
1267
1264
; CHECK-SSE41-NEXT: pminud %xmm3, %xmm2
1268
1265
; CHECK-SSE41-NEXT: pcmpeqd %xmm3, %xmm2
1269
1266
; CHECK-SSE41-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
@@ -1362,7 +1359,7 @@ define <4 x i32> @test_srem_odd_allones_and_poweroftwo(<4 x i32> %X) nounwind {
1362
1359
; CHECK-SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm1[0,1],xmm0[2,3],xmm1[4,5],xmm0[6,7]
1363
1360
; CHECK-SSE41-NEXT: psrlq $32, %xmm1
1364
1361
; CHECK-SSE41-NEXT: por %xmm1, %xmm0
1365
- ; CHECK-SSE41-NEXT: movdqa {{.*#+}} xmm1 = [858993458,4294967295,268435454 ,858993458]
1362
+ ; CHECK-SSE41-NEXT: movdqa {{.*#+}} xmm1 = [858993458,4294967295,268435455 ,858993458]
1366
1363
; CHECK-SSE41-NEXT: pminud %xmm0, %xmm1
1367
1364
; CHECK-SSE41-NEXT: pcmpeqd %xmm1, %xmm0
1368
1365
; CHECK-SSE41-NEXT: psrld $31, %xmm0
@@ -1447,7 +1444,7 @@ define <4 x i32> @test_srem_even_allones_and_poweroftwo(<4 x i32> %X) nounwind {
1447
1444
; CHECK-SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,0,2,2]
1448
1445
; CHECK-SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3],xmm0[4,5],xmm1[6,7]
1449
1446
; CHECK-SSE41-NEXT: por %xmm2, %xmm0
1450
- ; CHECK-SSE41-NEXT: movdqa {{.*#+}} xmm1 = [306783378,4294967295,268435454 ,306783378]
1447
+ ; CHECK-SSE41-NEXT: movdqa {{.*#+}} xmm1 = [306783378,4294967295,268435455 ,306783378]
1451
1448
; CHECK-SSE41-NEXT: pminud %xmm0, %xmm1
1452
1449
; CHECK-SSE41-NEXT: pcmpeqd %xmm1, %xmm0
1453
1450
; CHECK-SSE41-NEXT: psrld $31, %xmm0
@@ -1536,7 +1533,7 @@ define <4 x i32> @test_srem_odd_even_allones_and_poweroftwo(<4 x i32> %X) nounwi
1536
1533
; CHECK-SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,0,2,2]
1537
1534
; CHECK-SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3],xmm0[4,5],xmm1[6,7]
1538
1535
; CHECK-SSE41-NEXT: por %xmm2, %xmm0
1539
- ; CHECK-SSE41-NEXT: movdqa {{.*#+}} xmm1 = [858993458,4294967295,268435454 ,42949672]
1536
+ ; CHECK-SSE41-NEXT: movdqa {{.*#+}} xmm1 = [858993458,4294967295,268435455 ,42949672]
1540
1537
; CHECK-SSE41-NEXT: pminud %xmm0, %xmm1
1541
1538
; CHECK-SSE41-NEXT: pcmpeqd %xmm1, %xmm0
1542
1539
; CHECK-SSE41-NEXT: psrld $31, %xmm0
@@ -1844,7 +1841,7 @@ define <4 x i32> @test_srem_odd_poweroftwo_and_one(<4 x i32> %X) nounwind {
1844
1841
; CHECK-SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,0,2,2]
1845
1842
; CHECK-SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3],xmm0[4,5],xmm1[6,7]
1846
1843
; CHECK-SSE41-NEXT: por %xmm2, %xmm0
1847
- ; CHECK-SSE41-NEXT: movdqa {{.*#+}} xmm1 = [858993458,268435454 ,4294967295,858993458]
1844
+ ; CHECK-SSE41-NEXT: movdqa {{.*#+}} xmm1 = [858993458,268435455 ,4294967295,858993458]
1848
1845
; CHECK-SSE41-NEXT: pminud %xmm0, %xmm1
1849
1846
; CHECK-SSE41-NEXT: pcmpeqd %xmm1, %xmm0
1850
1847
; CHECK-SSE41-NEXT: psrld $31, %xmm0
@@ -1932,7 +1929,7 @@ define <4 x i32> @test_srem_even_poweroftwo_and_one(<4 x i32> %X) nounwind {
1932
1929
; CHECK-SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,0,2,2]
1933
1930
; CHECK-SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3],xmm0[4,5],xmm1[6,7]
1934
1931
; CHECK-SSE41-NEXT: por %xmm2, %xmm0
1935
- ; CHECK-SSE41-NEXT: movdqa {{.*#+}} xmm1 = [306783378,268435454 ,4294967295,306783378]
1932
+ ; CHECK-SSE41-NEXT: movdqa {{.*#+}} xmm1 = [306783378,268435455 ,4294967295,306783378]
1936
1933
; CHECK-SSE41-NEXT: pminud %xmm0, %xmm1
1937
1934
; CHECK-SSE41-NEXT: pcmpeqd %xmm1, %xmm0
1938
1935
; CHECK-SSE41-NEXT: psrld $31, %xmm0
@@ -2016,7 +2013,7 @@ define <4 x i32> @test_srem_odd_even_poweroftwo_and_one(<4 x i32> %X) nounwind {
2016
2013
; CHECK-SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,0,2,2]
2017
2014
; CHECK-SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3],xmm0[4,5],xmm1[6,7]
2018
2015
; CHECK-SSE41-NEXT: por %xmm2, %xmm0
2019
- ; CHECK-SSE41-NEXT: movdqa {{.*#+}} xmm1 = [858993458,268435454 ,4294967295,42949672]
2016
+ ; CHECK-SSE41-NEXT: movdqa {{.*#+}} xmm1 = [858993458,268435455 ,4294967295,42949672]
2020
2017
; CHECK-SSE41-NEXT: pminud %xmm0, %xmm1
2021
2018
; CHECK-SSE41-NEXT: pcmpeqd %xmm1, %xmm0
2022
2019
; CHECK-SSE41-NEXT: psrld $31, %xmm0
@@ -2093,7 +2090,7 @@ define <4 x i32> @test_srem_odd_allones_and_poweroftwo_and_one(<4 x i32> %X) nou
2093
2090
; CHECK-SSE41-NEXT: pblendw {{.*#+}} xmm1 = xmm0[0,1],xmm1[2,3],xmm0[4,5],xmm1[6,7]
2094
2091
; CHECK-SSE41-NEXT: psrlq $32, %xmm0
2095
2092
; CHECK-SSE41-NEXT: por %xmm1, %xmm0
2096
- ; CHECK-SSE41-NEXT: movdqa {{.*#+}} xmm1 = [858993458,4294967295,268435454 ,4294967295]
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+ ; CHECK-SSE41-NEXT: movdqa {{.*#+}} xmm1 = [858993458,4294967295,268435455 ,4294967295]
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; CHECK-SSE41-NEXT: pminud %xmm0, %xmm1
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; CHECK-SSE41-NEXT: pcmpeqd %xmm1, %xmm0
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; CHECK-SSE41-NEXT: psrld $31, %xmm0
@@ -2166,7 +2163,7 @@ define <4 x i32> @test_srem_even_allones_and_poweroftwo_and_one(<4 x i32> %X) no
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; CHECK-SSE41-NEXT: pblendw {{.*#+}} xmm1 = xmm0[0,1],xmm1[2,3],xmm0[4,5],xmm1[6,7]
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; CHECK-SSE41-NEXT: psrlq $32, %xmm0
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; CHECK-SSE41-NEXT: por %xmm1, %xmm0
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- ; CHECK-SSE41-NEXT: movdqa {{.*#+}} xmm1 = [306783378,4294967295,268435454 ,4294967295]
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+ ; CHECK-SSE41-NEXT: movdqa {{.*#+}} xmm1 = [306783378,4294967295,268435455 ,4294967295]
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; CHECK-SSE41-NEXT: pminud %xmm0, %xmm1
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; CHECK-SSE41-NEXT: pcmpeqd %xmm1, %xmm0
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; CHECK-SSE41-NEXT: psrld $31, %xmm0
@@ -2237,7 +2234,7 @@ define <32 x i1> @pr51133(<32 x i8> %x, <32 x i8> %y) {
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; CHECK-SSE2-NEXT: pmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm6
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; CHECK-SSE2-NEXT: psrlw $8, %xmm6
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; CHECK-SSE2-NEXT: packuswb %xmm5, %xmm6
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- ; CHECK-SSE2-NEXT: movdqa {{.*#+}} xmm7 = [84,2,36,42,2,0 ,2,4,2,255,4,36,126,30 ,2,2]
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+ ; CHECK-SSE2-NEXT: movdqa {{.*#+}} xmm7 = [84,2,36,42,2,1 ,2,4,2,255,4,36,127,31 ,2,2]
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; CHECK-SSE2-NEXT: pminub %xmm6, %xmm7
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; CHECK-SSE2-NEXT: pcmpeqb %xmm6, %xmm7
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; CHECK-SSE2-NEXT: movdqa {{.*#+}} xmm5 = [255,255,255,255,255,0,255,255,255,255,255,255,255,255,255,255]
@@ -2264,7 +2261,7 @@ define <32 x i1> @pr51133(<32 x i8> %x, <32 x i8> %y) {
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; CHECK-SSE2-NEXT: pmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
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; CHECK-SSE2-NEXT: psrlw $8, %xmm0
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; CHECK-SSE2-NEXT: packuswb %xmm1, %xmm0
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- ; CHECK-SSE2-NEXT: movdqa {{.*#+}} xmm1 = [19,51,13,7,127,31,127 ,3,5,5,51,37,3,127 ,85,5]
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+ ; CHECK-SSE2-NEXT: movdqa {{.*#+}} xmm1 = [19,51,13,7,128,32,128 ,3,5,5,51,37,3,128 ,85,5]
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; CHECK-SSE2-NEXT: pmaxub %xmm0, %xmm1
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; CHECK-SSE2-NEXT: pcmpeqb %xmm0, %xmm1
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; CHECK-SSE2-NEXT: pcmpeqb %xmm6, %xmm3
@@ -2300,7 +2297,7 @@ define <32 x i1> @pr51133(<32 x i8> %x, <32 x i8> %y) {
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; CHECK-SSE41-NEXT: pmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm6
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; CHECK-SSE41-NEXT: psrlw $8, %xmm6
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; CHECK-SSE41-NEXT: packuswb %xmm0, %xmm6
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- ; CHECK-SSE41-NEXT: movdqa {{.*#+}} xmm0 = [84,2,36,42,2,0 ,2,4,2,255,4,36,126,30 ,2,2]
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+ ; CHECK-SSE41-NEXT: movdqa {{.*#+}} xmm0 = [84,2,36,42,2,1 ,2,4,2,255,4,36,127,31 ,2,2]
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; CHECK-SSE41-NEXT: pminub %xmm6, %xmm0
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; CHECK-SSE41-NEXT: pcmpeqb %xmm6, %xmm0
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; CHECK-SSE41-NEXT: pcmpeqd %xmm7, %xmm7
@@ -2326,7 +2323,7 @@ define <32 x i1> @pr51133(<32 x i8> %x, <32 x i8> %y) {
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; CHECK-SSE41-NEXT: pmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
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; CHECK-SSE41-NEXT: psrlw $8, %xmm0
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; CHECK-SSE41-NEXT: packuswb %xmm4, %xmm0
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- ; CHECK-SSE41-NEXT: movdqa {{.*#+}} xmm4 = [19,51,13,7,127,31,127 ,3,5,5,51,37,3,127 ,85,5]
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+ ; CHECK-SSE41-NEXT: movdqa {{.*#+}} xmm4 = [19,51,13,7,128,32,128 ,3,5,5,51,37,3,128 ,85,5]
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; CHECK-SSE41-NEXT: pmaxub %xmm0, %xmm4
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; CHECK-SSE41-NEXT: pcmpeqb %xmm0, %xmm4
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; CHECK-SSE41-NEXT: pcmpeqb %xmm6, %xmm3
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