use clamp + add s8 testcases

Author: Pierre-vh

llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp

@@ -2013,10 +2013,9 @@ AMDGPULegalizerInfo::AMDGPULegalizerInfo(const GCNSubtarget &ST_,
 
   // S64 is only legal on SALU, and needs to be broken into 32-bit elements in
   // RegBankSelect.
-  auto &SextInReg =
-      getActionDefinitionsBuilder(G_SEXT_INREG)
-          .legalFor({{S32}, {S64}})
-          .widenScalarIf(typeIs(0, S16), widenScalarOrEltToNextPow2(0, 32));
+  auto &SextInReg = getActionDefinitionsBuilder(G_SEXT_INREG)
+                        .legalFor({{S32}, {S64}})
+                        .clampScalar(0, S32, S64);
 
   if (ST.hasVOP3PInsts()) {
     SextInReg.lowerFor({{V2S16}})

llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sext-inreg.mir

@@ -480,6 +480,78 @@ body: |
 
 ...
 
+---
+name: test_sext_inreg_s8_1
+body: |
+  bb.0:
+    liveins: $vgpr0
+
+    ; GFX9-LABEL: name: test_sext_inreg_s8_1
+    ; GFX9: liveins: $vgpr0
+    ; GFX9-NEXT: {{  $}}
+    ; GFX9-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
+    ; GFX9-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY]], 1
+    ; GFX9-NEXT: [[TRUNC:%[0-9]+]]:_(s8) = G_TRUNC [[SEXT_INREG]](s32)
+    ; GFX9-NEXT: S_ENDPGM 0, implicit [[TRUNC]](s8)
+    ;
+    ; GFX8-LABEL: name: test_sext_inreg_s8_1
+    ; GFX8: liveins: $vgpr0
+    ; GFX8-NEXT: {{  $}}
+    ; GFX8-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
+    ; GFX8-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY]], 1
+    ; GFX8-NEXT: [[TRUNC:%[0-9]+]]:_(s8) = G_TRUNC [[SEXT_INREG]](s32)
+    ; GFX8-NEXT: S_ENDPGM 0, implicit [[TRUNC]](s8)
+    ;
+    ; GFX6-LABEL: name: test_sext_inreg_s8_1
+    ; GFX6: liveins: $vgpr0
+    ; GFX6-NEXT: {{  $}}
+    ; GFX6-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
+    ; GFX6-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY]], 1
+    ; GFX6-NEXT: [[TRUNC:%[0-9]+]]:_(s8) = G_TRUNC [[SEXT_INREG]](s32)
+    ; GFX6-NEXT: S_ENDPGM 0, implicit [[TRUNC]](s8)
+    %0:_(s32) = COPY $vgpr0
+    %1:_(s8) = G_TRUNC %0
+    %2:_(s8) = G_SEXT_INREG %1, 1
+    S_ENDPGM 0, implicit %2
+
+...
+
+---
+name: test_sext_inreg_s16_7
+body: |
+  bb.0:
+    liveins: $vgpr0
+
+    ; GFX9-LABEL: name: test_sext_inreg_s16_7
+    ; GFX9: liveins: $vgpr0
+    ; GFX9-NEXT: {{  $}}
+    ; GFX9-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
+    ; GFX9-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY]], 7
+    ; GFX9-NEXT: [[TRUNC:%[0-9]+]]:_(s8) = G_TRUNC [[SEXT_INREG]](s32)
+    ; GFX9-NEXT: S_ENDPGM 0, implicit [[TRUNC]](s8)
+    ;
+    ; GFX8-LABEL: name: test_sext_inreg_s16_7
+    ; GFX8: liveins: $vgpr0
+    ; GFX8-NEXT: {{  $}}
+    ; GFX8-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
+    ; GFX8-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY]], 7
+    ; GFX8-NEXT: [[TRUNC:%[0-9]+]]:_(s8) = G_TRUNC [[SEXT_INREG]](s32)
+    ; GFX8-NEXT: S_ENDPGM 0, implicit [[TRUNC]](s8)
+    ;
+    ; GFX6-LABEL: name: test_sext_inreg_s16_7
+    ; GFX6: liveins: $vgpr0
+    ; GFX6-NEXT: {{  $}}
+    ; GFX6-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
+    ; GFX6-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY]], 7
+    ; GFX6-NEXT: [[TRUNC:%[0-9]+]]:_(s8) = G_TRUNC [[SEXT_INREG]](s32)
+    ; GFX6-NEXT: S_ENDPGM 0, implicit [[TRUNC]](s8)
+    %0:_(s32) = COPY $vgpr0
+    %1:_(s8) = G_TRUNC %0
+    %2:_(s8) = G_SEXT_INREG %1, 7
+    S_ENDPGM 0, implicit %2
+
+...
+
 ---
 name: test_sext_inreg_s96_8
 body: |

llvm/test/CodeGen/AMDGPU/GlobalISel/sext_inreg.ll

@@ -619,8 +619,7 @@ define <2 x i16> @v_sext_inreg_v2i16_8(<2 x i16> %value) {
 ; GFX8-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
 ; GFX8-NEXT:    v_mov_b32_e32 v1, 0xffff
 ; GFX8-NEXT:    v_and_b32_sdwa v2, sext(v0), v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
-; GFX8-NEXT:    v_and_b32_sdwa v0, sext(v0), v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
-; GFX8-NEXT:    v_lshlrev_b32_e32 v0, 16, v0
+; GFX8-NEXT:    v_and_b32_sdwa v0, sext(v0), v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
 ; GFX8-NEXT:    v_or_b32_e32 v0, v2, v0
 ; GFX8-NEXT:    s_setpc_b64 s[30:31]
 ;