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rastogishubhamrastogishubham
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Merge sourcelocation in CSEMIRBuilder::getDominatingInstrForID.
Make sure to merge the sourcelocation of the Dominating Instruction that is hoisted in a basic block in the CSEMIRBuilder in the legalizer pass. If this is not done, we can have a incorrect line table entry that makes the instruction pointer jump around. For example the line table without this patch looks like: Address Line Column File ISA Discriminator OpIndex Flags ------------------ ------ ------ ------ --- ------------- ------- ------------- 0x0000000000000000 0 0 1 0 0 0 is_stmt 0x0000000000000010 11 14 1 0 0 0 is_stmt prologue_end 0x0000000000000028 12 1 1 0 0 0 is_stmt 0x000000000000002c 12 15 1 0 0 0 0x000000000000004c 12 13 1 0 0 0 0x000000000000005c 13 1 1 0 0 0 is_stmt 0x0000000000000064 12 13 1 0 0 0 is_stmt 0x000000000000007c 13 7 1 0 0 0 is_stmt 0x00000000000000c8 13 1 1 0 0 0 0x00000000000000e8 13 1 1 0 0 0 epilogue_begin 0x00000000000000f8 13 1 1 0 0 0 end_sequence The line table entry for 0x000000000000005c should be 0
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‎llvm/include/llvm/CodeGen/GlobalISel/LegalizationArtifactCombiner.h

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@@ -26,6 +26,7 @@
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#include "llvm/CodeGen/Register.h"
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#include "llvm/CodeGen/TargetOpcodes.h"
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#include "llvm/IR/Constants.h"
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#include "llvm/IR/DebugInfoMetadata.h"
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#include "llvm/Support/Debug.h"
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#define DEBUG_TYPE "legalizer"
@@ -99,6 +100,8 @@ class LegalizationArtifactCombiner {
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const LLT DstTy = MRI.getType(DstReg);
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if (isInstLegal({TargetOpcode::G_CONSTANT, {DstTy}})) {
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auto &CstVal = SrcMI->getOperand(1);
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Builder.MergedLocation = DILocation::getMergedLocation(
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MI.getDebugLoc().get(), SrcMI->getDebugLoc().get());
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Builder.buildConstant(
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DstReg, CstVal.getCImm()->getValue().sext(DstTy.getSizeInBits()));
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UpdatedDefs.push_back(DstReg);

‎llvm/include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h

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@@ -243,6 +243,10 @@ class MachineIRBuilder {
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}
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public:
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/// This is the merged location of an instruction which is a result of a fold
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/// in the legalizer.
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DILocation *MergedLocation = nullptr;
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/// Some constructors for easy use.
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MachineIRBuilder() = default;
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MachineIRBuilder(MachineFunction &MF) { setMF(MF); }

‎llvm/lib/CodeGen/GlobalISel/CSEMIRBuilder.cpp

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@@ -51,6 +51,16 @@ CSEMIRBuilder::getDominatingInstrForID(FoldingSetNodeID &ID,
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// this builder will have the def ready.
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setInsertPt(*CurMBB, std::next(MII));
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} else if (!dominates(MI, CurrPos)) {
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// MergedLocation represents the merged location of two instructions that
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// were folded, if it is set, merge the location of MI with the merged
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// location and set it as MI's new location before moving it to the
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// CurrPos.
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if (MergedLocation) {
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auto *Loc = DILocation::getMergedLocation(MergedLocation,
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MI->getDebugLoc().get());
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MI->setDebugLoc(Loc);
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MergedLocation = nullptr;
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}
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CurMBB->splice(CurrPos, CurMBB, MI);
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}
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return MachineInstrBuilder(getMF(), MI);

‎llvm/test/DebugInfo/merge-locations-legalizer.mir

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# This test checks to make sure that when an instruction (%35 in the test) is
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# moved due to matching a result of a fold of two other instructions
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# (%16, and %17 in the test) in the legalizer, the DILocation of the
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# instruction that is moved (%35) is updated appropriately.
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# RUN: llc %s -O0 --start-before=legalizer --stop-after=legalizer -o - | FileCheck %s
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# CHECK-NOT: %35:_(s32) = G_CONSTANT i32 0, debug-location !71
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# CHECK: %35:_(s32) = G_CONSTANT i32 0, debug-location !DILocation(line: 0,
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--- |
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source_filename = "/tmp/main.ll"
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target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
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target triple = "arm64-apple-macosx14.0.0"
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define i32 @main(i32 %0, ptr %1) #0 !dbg !57 {
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entry:
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ret i32 0, !dbg !71
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}
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!3 = !DIFile(filename: "main.swift", directory: "/Volumes/Data/swift")
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!23 = distinct !DICompileUnit(language: DW_LANG_Swift, file: !3, sdk: "blah.sdk")
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!57 = distinct !DISubprogram(name: "main", unit: !23)
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!64 = distinct !DILexicalBlock(scope: !57, column: 1)
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!66 = distinct !DILexicalBlock(scope: !64, column: 1)
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!68 = !DILocation(line: 12, scope: !66)
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!70 = distinct !DILexicalBlock(scope: !66, column: 1)
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!71 = !DILocation(line: 13, scope: !70)
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name: main
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registers:
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- { id: 0, class: _, preferred-register: '' }
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- { id: 1, class: _, preferred-register: '' }
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- { id: 2, class: _, preferred-register: '' }
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- { id: 3, class: _, preferred-register: '' }
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- { id: 4, class: _, preferred-register: '' }
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- { id: 5, class: _, preferred-register: '' }
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- { id: 6, class: _, preferred-register: '' }
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- { id: 7, class: _, preferred-register: '' }
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- { id: 8, class: _, preferred-register: '' }
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- { id: 9, class: _, preferred-register: '' }
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- { id: 10, class: _, preferred-register: '' }
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- { id: 11, class: _, preferred-register: '' }
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- { id: 12, class: _, preferred-register: '' }
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- { id: 13, class: _, preferred-register: '' }
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- { id: 14, class: _, preferred-register: '' }
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- { id: 15, class: gpr64, preferred-register: '' }
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- { id: 18, class: _, preferred-register: '' }
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- { id: 19, class: _, preferred-register: '' }
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- { id: 20, class: _, preferred-register: '' }
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- { id: 21, class: _, preferred-register: '' }
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- { id: 22, class: _, preferred-register: '' }
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- { id: 23, class: _, preferred-register: '' }
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- { id: 24, class: _, preferred-register: '' }
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- { id: 25, class: _, preferred-register: '' }
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- { id: 26, class: _, preferred-register: '' }
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- { id: 27, class: _, preferred-register: '' }
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- { id: 28, class: _, preferred-register: '' }
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- { id: 29, class: _, preferred-register: '' }
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- { id: 30, class: _, preferred-register: '' }
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- { id: 31, class: _, preferred-register: '' }
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- { id: 32, class: _, preferred-register: '' }
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- { id: 33, class: _, preferred-register: '' }
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- { id: 34, class: _, preferred-register: '' }
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body: |
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bb.1.entry:
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%16:_(s8) = G_CONSTANT i8 0, debug-location !68
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%17:_(s32) = G_ANYEXT %16(s8), debug-location !68
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$w2 = COPY %17(s32), debug-location !68
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%35:_(s32) = G_CONSTANT i32 0, debug-location !71
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$w0 = COPY %35(s32), debug-location !71

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