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[ARM] Add Cortex-A510 CPU for AArch32 (#118811)
This core was originally AArch64-only, but the r1p0 revision added optional support for AArch32 at EL0. TRM: https://developer.arm.com/documentation/101604/0103
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‎clang/test/Driver/arm-cortex-cpus-2.c

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@@ -544,6 +544,17 @@
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// CHECK-CORTEX-A78AE-MFPU: "-target-feature" "+sha2"
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// CHECK-CORTEX-A78AE-MFPU: "-target-feature" "+aes"
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// RUN: %clang -target armv8a-arm-none-eabi -mcpu=cortex-a510 -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-CORTEX-A510 %s
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// RUN: %clang -target armv8a-arm-none-eabi -mcpu=cortex-a510 -mfpu=crypto-neon-fp-armv8 -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-CORTEX-A510-MFPU %s
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// CHECK-CORTEX-A510: "-cc1"{{.*}} "-triple" "armv9a-{{.*}} "-target-cpu" "cortex-a510"
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// CHECK-CORTEX-A510-NOT: "-target-feature" "{{[+-]}}sm4"
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// CHECK-CORTEX-A510-NOT: "-target-feature" "{{[+-]}}sha3"
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// CHECK-CORTEX-A510: "-target-feature" "-aes"
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// CHECK-CORTEX-A510-SAME: {{$}}
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// CHECK-CORTEX-A510-MFPU: "-cc1"{{.*}} "-target-feature" "+fp-armv8"
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// CHECK-CORTEX-A510-MFPU: "-target-feature" "+sha2"
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// CHECK-CORTEX-A510-MFPU: "-target-feature" "+aes"
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// RUN: %clang -target armv8a-arm-none-eabi -mcpu=cortex-a710 -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-CORTEX-A710 %s
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// RUN: %clang -target armv8a-arm-none-eabi -mcpu=cortex-a710 -mfpu=crypto-neon-fp-armv8 -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-CORTEX-A710-MFPU %s
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// CHECK-CORTEX-A710: "-cc1"{{.*}} "-triple" "armv9a-{{.*}} "-target-cpu" "cortex-a710"

‎clang/test/Misc/target-invalid-cpu-note/arm.c

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@@ -84,6 +84,7 @@
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// CHECK-SAME: {{^}}, cortex-a78
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// CHECK-SAME: {{^}}, cortex-a78ae
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// CHECK-SAME: {{^}}, cortex-a78c
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// CHECK-SAME: {{^}}, cortex-a510
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// CHECK-SAME: {{^}}, cortex-a710
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// CHECK-SAME: {{^}}, cortex-x1
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// CHECK-SAME: {{^}}, cortex-x1c

‎llvm/include/llvm/TargetParser/ARMTargetParser.def

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@@ -374,6 +374,9 @@ ARM_CPU_NAME("cortex-a78ae", ARMV8_2A, FK_CRYPTO_NEON_FP_ARMV8, false,
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(ARM::AEK_RAS | ARM::AEK_DOTPROD))
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ARM_CPU_NAME("cortex-a78c", ARMV8_2A, FK_CRYPTO_NEON_FP_ARMV8, false,
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ARM::AEK_FP16 | ARM::AEK_DOTPROD)
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ARM_CPU_NAME("cortex-a510", ARMV9A, FK_NEON_FP_ARMV8, false,
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(ARM::AEK_DOTPROD | ARM::AEK_FP16FML | ARM::AEK_BF16 |
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ARM::AEK_SB | ARM::AEK_I8MM))
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ARM_CPU_NAME("cortex-a710", ARMV9A, FK_NEON_FP_ARMV8, false,
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(ARM::AEK_DOTPROD | ARM::AEK_FP16FML | ARM::AEK_BF16 |
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ARM::AEK_SB | ARM::AEK_I8MM))

‎llvm/lib/Target/ARM/ARMProcessors.td

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@@ -45,6 +45,8 @@ def ProcA78AE : SubtargetFeature<"cortex-a78ae", "ARMProcFamily", "CortexA78AE
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"Cortex-A78AE ARM processors", []>;
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def ProcA78C : SubtargetFeature<"a78c", "ARMProcFamily", "CortexA78C",
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"Cortex-A78C ARM processors", []>;
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def ProcA510 : SubtargetFeature<"cortex-a510", "ARMProcFamily",
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"CortexA510", "Cortex-A510 ARM processors", []>;
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def ProcA710 : SubtargetFeature<"cortex-a710", "ARMProcFamily",
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"CortexA710", "Cortex-A710 ARM processors", []>;
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def ProcX1 : SubtargetFeature<"cortex-x1", "ARMProcFamily", "CortexX1",
@@ -518,6 +520,14 @@ def : ProcNoItin<"cortex-a78c", [ARMv82a, ProcA78C,
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FeatureDotProd,
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FeatureFullFP16]>;
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def : ProcNoItin<"cortex-a510", [ARMv9a, ProcA710,
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FeatureHWDivThumb,
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FeatureHWDivARM,
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FeatureFP16FML,
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FeatureBF16,
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FeatureMatMulInt8,
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FeatureSB]>;
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def : ProcNoItin<"cortex-a710", [ARMv9a, ProcA710,
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FeatureHWDivThumb,
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FeatureHWDivARM,

‎llvm/lib/Target/ARM/ARMSubtarget.cpp

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@@ -287,6 +287,7 @@ void ARMSubtarget::initSubtargetFeatures(StringRef CPU, StringRef FS) {
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case CortexA78:
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case CortexA78AE:
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case CortexA78C:
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case CortexA510:
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case CortexA710:
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case CortexR4:
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case CortexR5:

‎llvm/test/CodeGen/ARM/build-attributes.ll

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@@ -187,6 +187,12 @@
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; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=exynos-m5 | FileCheck %s --check-prefix=NO-STRICT-ALIGN
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; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=exynos-m5 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
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; ARMv9a (AArch32)
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; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a510 | FileCheck %s --check-prefix=NO-STRICT-ALIGN
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; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a510 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
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; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a710 | FileCheck %s --check-prefix=NO-STRICT-ALIGN
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; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a710 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
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; ARMv7a
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; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 | FileCheck %s --check-prefix=NO-STRICT-ALIGN
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; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN

‎llvm/unittests/TargetParser/TargetParserTest.cpp

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@@ -404,6 +404,14 @@ INSTANTIATE_TEST_SUITE_P(
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ARM::AEK_HWDIVTHUMB | ARM::AEK_DSP | ARM::AEK_CRC |
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ARM::AEK_RAS | ARM::AEK_FP16 | ARM::AEK_DOTPROD,
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"8.2-A"),
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ARMCPUTestParams<uint64_t>("cortex-a510", "armv9-a", "neon-fp-armv8",
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ARM::AEK_SEC | ARM::AEK_MP | ARM::AEK_VIRT |
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ARM::AEK_HWDIVARM | ARM::AEK_HWDIVTHUMB |
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ARM::AEK_DSP | ARM::AEK_CRC |
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ARM::AEK_RAS | ARM::AEK_DOTPROD |
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ARM::AEK_FP16FML | ARM::AEK_BF16 |
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ARM::AEK_I8MM | ARM::AEK_SB,
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"9-A"),
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ARMCPUTestParams<uint64_t>("cortex-a710", "armv9-a", "neon-fp-armv8",
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ARM::AEK_SEC | ARM::AEK_MP | ARM::AEK_VIRT |
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ARM::AEK_HWDIVARM | ARM::AEK_HWDIVTHUMB |
@@ -521,7 +529,7 @@ INSTANTIATE_TEST_SUITE_P(
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"7-S")),
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ARMCPUTestParams<uint64_t>::PrintToStringParamName);
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static constexpr unsigned NumARMCPUArchs = 93;
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static constexpr unsigned NumARMCPUArchs = 94;
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TEST(TargetParserTest, testARMCPUArchList) {
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SmallVector<StringRef, NumARMCPUArchs> List;

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