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Rename expansion function
1 parent 5f31079 commit 2f3a0dc

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4 files changed

+9
-10
lines changed

4 files changed

+9
-10
lines changed

llvm/include/llvm/CodeGen/SelectionDAG.h

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1596,8 +1596,8 @@ class SelectionDAG {
15961596

15971597
/// Expand a partial reduction intrinsic call.
15981598
/// Op1 and Op2 are its operands and ReducedTY is the intrinsic's return type.
1599-
SDValue expandPartialReductionIntrinsic(EVT ReducedTy, SDValue Op1,
1600-
SDValue Op2, SDLoc DL);
1599+
SDValue getPartialReduceAdd(SDLoc DL, EVT ReducedTy, SDValue Op1,
1600+
SDValue Op2);
16011601

16021602
/// Expand the specified \c ISD::VAARG node as the Legalize pass would.
16031603
SDValue expandVAArg(SDNode *Node);

llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp

Lines changed: 2 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -2427,9 +2427,8 @@ SDValue SelectionDAG::getShiftAmountOperand(EVT LHSTy, SDValue Op) {
24272427
return getZExtOrTrunc(Op, SDLoc(Op), ShTy);
24282428
}
24292429

2430-
SDValue SelectionDAG::expandPartialReductionIntrinsic(EVT ReducedTy,
2431-
SDValue Op1, SDValue Op2,
2432-
SDLoc DL) {
2430+
SDValue SelectionDAG::getPartialReduceAdd(SDLoc DL, EVT ReducedTy, SDValue Op1,
2431+
SDValue Op2) {
24332432
EVT FullTy = Op2.getValueType();
24342433

24352434
unsigned Stride = ReducedTy.getVectorMinNumElements();

llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -8011,9 +8011,9 @@ void SelectionDAGBuilder::visitIntrinsicCall(const CallInst &I,
80118011
return;
80128012
}
80138013

8014-
setValue(&I, DAG.expandPartialReductionIntrinsic(
8015-
EVT::getEVT(I.getType()), getValue(I.getOperand(0)),
8016-
getValue(I.getOperand(1)), sdl));
8014+
setValue(&I, DAG.getPartialReduceAdd(sdl, EVT::getEVT(I.getType()),
8015+
getValue(I.getOperand(0)),
8016+
getValue(I.getOperand(1))));
80178017
return;
80188018
}
80198019
case Intrinsic::experimental_cttz_elts: {

llvm/lib/Target/AArch64/AArch64ISelLowering.cpp

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -21883,8 +21883,8 @@ static SDValue performIntrinsicCombine(SDNode *N,
2188321883
case Intrinsic::experimental_vector_partial_reduce_add: {
2188421884
if (auto Dot = tryLowerPartialReductionToDot(N, Subtarget, DAG))
2188521885
return Dot;
21886-
return DAG.expandPartialReductionIntrinsic(
21887-
N->getValueType(0), N->getOperand(1), N->getOperand(2), SDLoc(N));
21886+
return DAG.getPartialReduceAdd(SDLoc(N), N->getValueType(0),
21887+
N->getOperand(1), N->getOperand(2));
2188821888
}
2188921889
case Intrinsic::aarch64_neon_vcvtfxs2fp:
2189021890
case Intrinsic::aarch64_neon_vcvtfxu2fp:

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