Skip to content

Commit 3016c06

Browse files
vitalybukavitalybuka
authored
[NFCI][msan] Use IntPtr for vscales origin for consistency (#90920)
1 parent 18707f5 commit 3016c06

File tree

3 files changed

+93
-91
lines changed

3 files changed

+93
-91
lines changed

‎llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp

Lines changed: 5 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1237,9 +1237,11 @@ struct MemorySanitizerVisitor : public InstVisitor<MemorySanitizerVisitor> {
12371237
// Note: The loop based formation works for fixed length vectors too,
12381238
// however we prefer to unroll and specialize alignment below.
12391239
if (TS.isScalable()) {
1240-
Value *Size = IRB.CreateTypeSize(IRB.getInt32Ty(), TS);
1241-
Value *RoundUp = IRB.CreateAdd(Size, IRB.getInt32(kOriginSize - 1));
1242-
Value *End = IRB.CreateUDiv(RoundUp, IRB.getInt32(kOriginSize));
1240+
Value *Size = IRB.CreateTypeSize(MS.IntptrTy, TS);
1241+
Value *RoundUp =
1242+
IRB.CreateAdd(Size, ConstantInt::get(MS.IntptrTy, kOriginSize - 1));
1243+
Value *End =
1244+
IRB.CreateUDiv(RoundUp, ConstantInt::get(MS.IntptrTy, kOriginSize));
12431245
auto [InsertPt, Index] =
12441246
SplitBlockAndInsertSimpleForLoop(End, &*IRB.GetInsertPoint());
12451247
IRB.SetInsertPoint(InsertPt);

‎llvm/test/Instrumentation/MemorySanitizer/vector-load-store.ll

Lines changed: 40 additions & 40 deletions
Original file line numberDiff line numberDiff line change
@@ -671,17 +671,17 @@ define void @store.nxv1i32(ptr %p) sanitize_memory {
671671
; ORIGINS-NEXT: [[_MSCMP:%.*]] = icmp ne i32 [[TMP6]], 0
672672
; ORIGINS-NEXT: br i1 [[_MSCMP]], label [[TMP7:%.*]], label [[TMP13:%.*]], !prof [[PROF0:![0-9]+]]
673673
; ORIGINS: 7:
674-
; ORIGINS-NEXT: [[TMP8:%.*]] = call i32 @llvm.vscale.i32()
675-
; ORIGINS-NEXT: [[TMP9:%.*]] = mul i32 [[TMP8]], 4
676-
; ORIGINS-NEXT: [[TMP10:%.*]] = add i32 [[TMP9]], 3
677-
; ORIGINS-NEXT: [[TMP11:%.*]] = udiv i32 [[TMP10]], 4
674+
; ORIGINS-NEXT: [[TMP8:%.*]] = call i64 @llvm.vscale.i64()
675+
; ORIGINS-NEXT: [[TMP9:%.*]] = mul i64 [[TMP8]], 4
676+
; ORIGINS-NEXT: [[TMP10:%.*]] = add i64 [[TMP9]], 3
677+
; ORIGINS-NEXT: [[TMP11:%.*]] = udiv i64 [[TMP10]], 4
678678
; ORIGINS-NEXT: br label [[DOTSPLIT:%.*]]
679679
; ORIGINS: .split:
680-
; ORIGINS-NEXT: [[IV:%.*]] = phi i32 [ 0, [[TMP7]] ], [ [[IV_NEXT:%.*]], [[DOTSPLIT]] ]
681-
; ORIGINS-NEXT: [[TMP12:%.*]] = getelementptr i32, ptr [[TMP5]], i32 [[IV]]
680+
; ORIGINS-NEXT: [[IV:%.*]] = phi i64 [ 0, [[TMP7]] ], [ [[IV_NEXT:%.*]], [[DOTSPLIT]] ]
681+
; ORIGINS-NEXT: [[TMP12:%.*]] = getelementptr i32, ptr [[TMP5]], i64 [[IV]]
682682
; ORIGINS-NEXT: store i32 0, ptr [[TMP12]], align 4
683-
; ORIGINS-NEXT: [[IV_NEXT]] = add nuw nsw i32 [[IV]], 1
684-
; ORIGINS-NEXT: [[IV_CHECK:%.*]] = icmp eq i32 [[IV_NEXT]], [[TMP11]]
683+
; ORIGINS-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 1
684+
; ORIGINS-NEXT: [[IV_CHECK:%.*]] = icmp eq i64 [[IV_NEXT]], [[TMP11]]
685685
; ORIGINS-NEXT: br i1 [[IV_CHECK]], label [[DOTSPLIT_SPLIT:%.*]], label [[DOTSPLIT]]
686686
; ORIGINS: .split.split:
687687
; ORIGINS-NEXT: br label [[TMP13]]
@@ -731,17 +731,17 @@ define void @store.nxv2i32(ptr %p) sanitize_memory {
731731
; ORIGINS-NEXT: [[_MSCMP:%.*]] = icmp ne i32 [[TMP6]], 0
732732
; ORIGINS-NEXT: br i1 [[_MSCMP]], label [[TMP7:%.*]], label [[TMP13:%.*]], !prof [[PROF0]]
733733
; ORIGINS: 7:
734-
; ORIGINS-NEXT: [[TMP8:%.*]] = call i32 @llvm.vscale.i32()
735-
; ORIGINS-NEXT: [[TMP9:%.*]] = mul i32 [[TMP8]], 8
736-
; ORIGINS-NEXT: [[TMP10:%.*]] = add i32 [[TMP9]], 3
737-
; ORIGINS-NEXT: [[TMP11:%.*]] = udiv i32 [[TMP10]], 4
734+
; ORIGINS-NEXT: [[TMP8:%.*]] = call i64 @llvm.vscale.i64()
735+
; ORIGINS-NEXT: [[TMP9:%.*]] = mul i64 [[TMP8]], 8
736+
; ORIGINS-NEXT: [[TMP10:%.*]] = add i64 [[TMP9]], 3
737+
; ORIGINS-NEXT: [[TMP11:%.*]] = udiv i64 [[TMP10]], 4
738738
; ORIGINS-NEXT: br label [[DOTSPLIT:%.*]]
739739
; ORIGINS: .split:
740-
; ORIGINS-NEXT: [[IV:%.*]] = phi i32 [ 0, [[TMP7]] ], [ [[IV_NEXT:%.*]], [[DOTSPLIT]] ]
741-
; ORIGINS-NEXT: [[TMP12:%.*]] = getelementptr i32, ptr [[TMP5]], i32 [[IV]]
740+
; ORIGINS-NEXT: [[IV:%.*]] = phi i64 [ 0, [[TMP7]] ], [ [[IV_NEXT:%.*]], [[DOTSPLIT]] ]
741+
; ORIGINS-NEXT: [[TMP12:%.*]] = getelementptr i32, ptr [[TMP5]], i64 [[IV]]
742742
; ORIGINS-NEXT: store i32 0, ptr [[TMP12]], align 4
743-
; ORIGINS-NEXT: [[IV_NEXT]] = add nuw nsw i32 [[IV]], 1
744-
; ORIGINS-NEXT: [[IV_CHECK:%.*]] = icmp eq i32 [[IV_NEXT]], [[TMP11]]
743+
; ORIGINS-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 1
744+
; ORIGINS-NEXT: [[IV_CHECK:%.*]] = icmp eq i64 [[IV_NEXT]], [[TMP11]]
745745
; ORIGINS-NEXT: br i1 [[IV_CHECK]], label [[DOTSPLIT_SPLIT:%.*]], label [[DOTSPLIT]]
746746
; ORIGINS: .split.split:
747747
; ORIGINS-NEXT: br label [[TMP13]]
@@ -791,17 +791,17 @@ define void @store.nxv4i32(ptr %p) sanitize_memory {
791791
; ORIGINS-NEXT: [[_MSCMP:%.*]] = icmp ne i32 [[TMP6]], 0
792792
; ORIGINS-NEXT: br i1 [[_MSCMP]], label [[TMP7:%.*]], label [[TMP13:%.*]], !prof [[PROF0]]
793793
; ORIGINS: 7:
794-
; ORIGINS-NEXT: [[TMP8:%.*]] = call i32 @llvm.vscale.i32()
795-
; ORIGINS-NEXT: [[TMP9:%.*]] = mul i32 [[TMP8]], 16
796-
; ORIGINS-NEXT: [[TMP10:%.*]] = add i32 [[TMP9]], 3
797-
; ORIGINS-NEXT: [[TMP11:%.*]] = udiv i32 [[TMP10]], 4
794+
; ORIGINS-NEXT: [[TMP8:%.*]] = call i64 @llvm.vscale.i64()
795+
; ORIGINS-NEXT: [[TMP9:%.*]] = mul i64 [[TMP8]], 16
796+
; ORIGINS-NEXT: [[TMP10:%.*]] = add i64 [[TMP9]], 3
797+
; ORIGINS-NEXT: [[TMP11:%.*]] = udiv i64 [[TMP10]], 4
798798
; ORIGINS-NEXT: br label [[DOTSPLIT:%.*]]
799799
; ORIGINS: .split:
800-
; ORIGINS-NEXT: [[IV:%.*]] = phi i32 [ 0, [[TMP7]] ], [ [[IV_NEXT:%.*]], [[DOTSPLIT]] ]
801-
; ORIGINS-NEXT: [[TMP12:%.*]] = getelementptr i32, ptr [[TMP5]], i32 [[IV]]
800+
; ORIGINS-NEXT: [[IV:%.*]] = phi i64 [ 0, [[TMP7]] ], [ [[IV_NEXT:%.*]], [[DOTSPLIT]] ]
801+
; ORIGINS-NEXT: [[TMP12:%.*]] = getelementptr i32, ptr [[TMP5]], i64 [[IV]]
802802
; ORIGINS-NEXT: store i32 0, ptr [[TMP12]], align 4
803-
; ORIGINS-NEXT: [[IV_NEXT]] = add nuw nsw i32 [[IV]], 1
804-
; ORIGINS-NEXT: [[IV_CHECK:%.*]] = icmp eq i32 [[IV_NEXT]], [[TMP11]]
803+
; ORIGINS-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 1
804+
; ORIGINS-NEXT: [[IV_CHECK:%.*]] = icmp eq i64 [[IV_NEXT]], [[TMP11]]
805805
; ORIGINS-NEXT: br i1 [[IV_CHECK]], label [[DOTSPLIT_SPLIT:%.*]], label [[DOTSPLIT]]
806806
; ORIGINS: .split.split:
807807
; ORIGINS-NEXT: br label [[TMP13]]
@@ -851,17 +851,17 @@ define void @store.nxv8i32(ptr %p) sanitize_memory {
851851
; ORIGINS-NEXT: [[_MSCMP:%.*]] = icmp ne i32 [[TMP6]], 0
852852
; ORIGINS-NEXT: br i1 [[_MSCMP]], label [[TMP7:%.*]], label [[TMP13:%.*]], !prof [[PROF0]]
853853
; ORIGINS: 7:
854-
; ORIGINS-NEXT: [[TMP8:%.*]] = call i32 @llvm.vscale.i32()
855-
; ORIGINS-NEXT: [[TMP9:%.*]] = mul i32 [[TMP8]], 32
856-
; ORIGINS-NEXT: [[TMP10:%.*]] = add i32 [[TMP9]], 3
857-
; ORIGINS-NEXT: [[TMP11:%.*]] = udiv i32 [[TMP10]], 4
854+
; ORIGINS-NEXT: [[TMP8:%.*]] = call i64 @llvm.vscale.i64()
855+
; ORIGINS-NEXT: [[TMP9:%.*]] = mul i64 [[TMP8]], 32
856+
; ORIGINS-NEXT: [[TMP10:%.*]] = add i64 [[TMP9]], 3
857+
; ORIGINS-NEXT: [[TMP11:%.*]] = udiv i64 [[TMP10]], 4
858858
; ORIGINS-NEXT: br label [[DOTSPLIT:%.*]]
859859
; ORIGINS: .split:
860-
; ORIGINS-NEXT: [[IV:%.*]] = phi i32 [ 0, [[TMP7]] ], [ [[IV_NEXT:%.*]], [[DOTSPLIT]] ]
861-
; ORIGINS-NEXT: [[TMP12:%.*]] = getelementptr i32, ptr [[TMP5]], i32 [[IV]]
860+
; ORIGINS-NEXT: [[IV:%.*]] = phi i64 [ 0, [[TMP7]] ], [ [[IV_NEXT:%.*]], [[DOTSPLIT]] ]
861+
; ORIGINS-NEXT: [[TMP12:%.*]] = getelementptr i32, ptr [[TMP5]], i64 [[IV]]
862862
; ORIGINS-NEXT: store i32 0, ptr [[TMP12]], align 4
863-
; ORIGINS-NEXT: [[IV_NEXT]] = add nuw nsw i32 [[IV]], 1
864-
; ORIGINS-NEXT: [[IV_CHECK:%.*]] = icmp eq i32 [[IV_NEXT]], [[TMP11]]
863+
; ORIGINS-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 1
864+
; ORIGINS-NEXT: [[IV_CHECK:%.*]] = icmp eq i64 [[IV_NEXT]], [[TMP11]]
865865
; ORIGINS-NEXT: br i1 [[IV_CHECK]], label [[DOTSPLIT_SPLIT:%.*]], label [[DOTSPLIT]]
866866
; ORIGINS: .split.split:
867867
; ORIGINS-NEXT: br label [[TMP13]]
@@ -911,17 +911,17 @@ define void @store.nxv16i32(ptr %p) sanitize_memory {
911911
; ORIGINS-NEXT: [[_MSCMP:%.*]] = icmp ne i32 [[TMP6]], 0
912912
; ORIGINS-NEXT: br i1 [[_MSCMP]], label [[TMP7:%.*]], label [[TMP13:%.*]], !prof [[PROF0]]
913913
; ORIGINS: 7:
914-
; ORIGINS-NEXT: [[TMP8:%.*]] = call i32 @llvm.vscale.i32()
915-
; ORIGINS-NEXT: [[TMP9:%.*]] = mul i32 [[TMP8]], 64
916-
; ORIGINS-NEXT: [[TMP10:%.*]] = add i32 [[TMP9]], 3
917-
; ORIGINS-NEXT: [[TMP11:%.*]] = udiv i32 [[TMP10]], 4
914+
; ORIGINS-NEXT: [[TMP8:%.*]] = call i64 @llvm.vscale.i64()
915+
; ORIGINS-NEXT: [[TMP9:%.*]] = mul i64 [[TMP8]], 64
916+
; ORIGINS-NEXT: [[TMP10:%.*]] = add i64 [[TMP9]], 3
917+
; ORIGINS-NEXT: [[TMP11:%.*]] = udiv i64 [[TMP10]], 4
918918
; ORIGINS-NEXT: br label [[DOTSPLIT:%.*]]
919919
; ORIGINS: .split:
920-
; ORIGINS-NEXT: [[IV:%.*]] = phi i32 [ 0, [[TMP7]] ], [ [[IV_NEXT:%.*]], [[DOTSPLIT]] ]
921-
; ORIGINS-NEXT: [[TMP12:%.*]] = getelementptr i32, ptr [[TMP5]], i32 [[IV]]
920+
; ORIGINS-NEXT: [[IV:%.*]] = phi i64 [ 0, [[TMP7]] ], [ [[IV_NEXT:%.*]], [[DOTSPLIT]] ]
921+
; ORIGINS-NEXT: [[TMP12:%.*]] = getelementptr i32, ptr [[TMP5]], i64 [[IV]]
922922
; ORIGINS-NEXT: store i32 0, ptr [[TMP12]], align 4
923-
; ORIGINS-NEXT: [[IV_NEXT]] = add nuw nsw i32 [[IV]], 1
924-
; ORIGINS-NEXT: [[IV_CHECK:%.*]] = icmp eq i32 [[IV_NEXT]], [[TMP11]]
923+
; ORIGINS-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 1
924+
; ORIGINS-NEXT: [[IV_CHECK:%.*]] = icmp eq i64 [[IV_NEXT]], [[TMP11]]
925925
; ORIGINS-NEXT: br i1 [[IV_CHECK]], label [[DOTSPLIT_SPLIT:%.*]], label [[DOTSPLIT]]
926926
; ORIGINS: .split.split:
927927
; ORIGINS-NEXT: br label [[TMP13]]

‎llvm/test/Instrumentation/MemorySanitizer/vscale.ll

Lines changed: 48 additions & 48 deletions
Original file line numberDiff line numberDiff line change
@@ -43,17 +43,17 @@ define void @test_load_store_i32(ptr %a, ptr %b) sanitize_memory {
4343
; ORIGIN-NEXT: br i1 [[_MSCMP]], label [[TMP14:%.*]], label [[TMP21:%.*]], !prof [[PROF0:![0-9]+]]
4444
; ORIGIN: 14:
4545
; ORIGIN-NEXT: [[TMP15:%.*]] = call i32 @__msan_chain_origin(i32 [[TMP7]])
46-
; ORIGIN-NEXT: [[TMP16:%.*]] = call i32 @llvm.vscale.i32()
47-
; ORIGIN-NEXT: [[TMP17:%.*]] = mul i32 [[TMP16]], 16
48-
; ORIGIN-NEXT: [[TMP18:%.*]] = add i32 [[TMP17]], 3
49-
; ORIGIN-NEXT: [[TMP19:%.*]] = udiv i32 [[TMP18]], 4
46+
; ORIGIN-NEXT: [[TMP16:%.*]] = call i64 @llvm.vscale.i64()
47+
; ORIGIN-NEXT: [[TMP17:%.*]] = mul i64 [[TMP16]], 16
48+
; ORIGIN-NEXT: [[TMP18:%.*]] = add i64 [[TMP17]], 3
49+
; ORIGIN-NEXT: [[TMP19:%.*]] = udiv i64 [[TMP18]], 4
5050
; ORIGIN-NEXT: br label [[DOTSPLIT:%.*]]
5151
; ORIGIN: .split:
52-
; ORIGIN-NEXT: [[IV:%.*]] = phi i32 [ 0, [[TMP14]] ], [ [[IV_NEXT:%.*]], [[DOTSPLIT]] ]
53-
; ORIGIN-NEXT: [[TMP20:%.*]] = getelementptr i32, ptr [[TMP12]], i32 [[IV]]
52+
; ORIGIN-NEXT: [[IV:%.*]] = phi i64 [ 0, [[TMP14]] ], [ [[IV_NEXT:%.*]], [[DOTSPLIT]] ]
53+
; ORIGIN-NEXT: [[TMP20:%.*]] = getelementptr i32, ptr [[TMP12]], i64 [[IV]]
5454
; ORIGIN-NEXT: store i32 [[TMP15]], ptr [[TMP20]], align 4
55-
; ORIGIN-NEXT: [[IV_NEXT]] = add nuw nsw i32 [[IV]], 1
56-
; ORIGIN-NEXT: [[IV_CHECK:%.*]] = icmp eq i32 [[IV_NEXT]], [[TMP19]]
55+
; ORIGIN-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 1
56+
; ORIGIN-NEXT: [[IV_CHECK:%.*]] = icmp eq i64 [[IV_NEXT]], [[TMP19]]
5757
; ORIGIN-NEXT: br i1 [[IV_CHECK]], label [[DOTSPLIT_SPLIT:%.*]], label [[DOTSPLIT]]
5858
; ORIGIN: .split.split:
5959
; ORIGIN-NEXT: br label [[TMP21]]
@@ -124,17 +124,17 @@ define void @test_load_store_add_int(ptr %a, ptr %b) sanitize_memory {
124124
; ORIGIN-NEXT: br i1 [[_MSCMP]], label [[TMP25:%.*]], label [[TMP32:%.*]], !prof [[PROF0]]
125125
; ORIGIN: 25:
126126
; ORIGIN-NEXT: [[TMP26:%.*]] = call i32 @__msan_chain_origin(i32 [[TMP14]])
127-
; ORIGIN-NEXT: [[TMP27:%.*]] = call i32 @llvm.vscale.i32()
128-
; ORIGIN-NEXT: [[TMP28:%.*]] = mul i32 [[TMP27]], 64
129-
; ORIGIN-NEXT: [[TMP29:%.*]] = add i32 [[TMP28]], 3
130-
; ORIGIN-NEXT: [[TMP30:%.*]] = udiv i32 [[TMP29]], 4
127+
; ORIGIN-NEXT: [[TMP27:%.*]] = call i64 @llvm.vscale.i64()
128+
; ORIGIN-NEXT: [[TMP28:%.*]] = mul i64 [[TMP27]], 64
129+
; ORIGIN-NEXT: [[TMP29:%.*]] = add i64 [[TMP28]], 3
130+
; ORIGIN-NEXT: [[TMP30:%.*]] = udiv i64 [[TMP29]], 4
131131
; ORIGIN-NEXT: br label [[DOTSPLIT:%.*]]
132132
; ORIGIN: .split:
133-
; ORIGIN-NEXT: [[IV:%.*]] = phi i32 [ 0, [[TMP25]] ], [ [[IV_NEXT:%.*]], [[DOTSPLIT]] ]
134-
; ORIGIN-NEXT: [[TMP31:%.*]] = getelementptr i32, ptr [[TMP23]], i32 [[IV]]
133+
; ORIGIN-NEXT: [[IV:%.*]] = phi i64 [ 0, [[TMP25]] ], [ [[IV_NEXT:%.*]], [[DOTSPLIT]] ]
134+
; ORIGIN-NEXT: [[TMP31:%.*]] = getelementptr i32, ptr [[TMP23]], i64 [[IV]]
135135
; ORIGIN-NEXT: store i32 [[TMP26]], ptr [[TMP31]], align 4
136-
; ORIGIN-NEXT: [[IV_NEXT]] = add nuw nsw i32 [[IV]], 1
137-
; ORIGIN-NEXT: [[IV_CHECK:%.*]] = icmp eq i32 [[IV_NEXT]], [[TMP30]]
136+
; ORIGIN-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 1
137+
; ORIGIN-NEXT: [[IV_CHECK:%.*]] = icmp eq i64 [[IV_NEXT]], [[TMP30]]
138138
; ORIGIN-NEXT: br i1 [[IV_CHECK]], label [[DOTSPLIT_SPLIT:%.*]], label [[DOTSPLIT]]
139139
; ORIGIN: .split.split:
140140
; ORIGIN-NEXT: br label [[TMP32]]
@@ -187,17 +187,17 @@ define void @test_load_store_float(ptr %a, ptr %b) sanitize_memory {
187187
; ORIGIN-NEXT: br i1 [[_MSCMP]], label [[TMP14:%.*]], label [[TMP21:%.*]], !prof [[PROF0]]
188188
; ORIGIN: 14:
189189
; ORIGIN-NEXT: [[TMP15:%.*]] = call i32 @__msan_chain_origin(i32 [[TMP7]])
190-
; ORIGIN-NEXT: [[TMP16:%.*]] = call i32 @llvm.vscale.i32()
191-
; ORIGIN-NEXT: [[TMP17:%.*]] = mul i32 [[TMP16]], 16
192-
; ORIGIN-NEXT: [[TMP18:%.*]] = add i32 [[TMP17]], 3
193-
; ORIGIN-NEXT: [[TMP19:%.*]] = udiv i32 [[TMP18]], 4
190+
; ORIGIN-NEXT: [[TMP16:%.*]] = call i64 @llvm.vscale.i64()
191+
; ORIGIN-NEXT: [[TMP17:%.*]] = mul i64 [[TMP16]], 16
192+
; ORIGIN-NEXT: [[TMP18:%.*]] = add i64 [[TMP17]], 3
193+
; ORIGIN-NEXT: [[TMP19:%.*]] = udiv i64 [[TMP18]], 4
194194
; ORIGIN-NEXT: br label [[DOTSPLIT:%.*]]
195195
; ORIGIN: .split:
196-
; ORIGIN-NEXT: [[IV:%.*]] = phi i32 [ 0, [[TMP14]] ], [ [[IV_NEXT:%.*]], [[DOTSPLIT]] ]
197-
; ORIGIN-NEXT: [[TMP20:%.*]] = getelementptr i32, ptr [[TMP12]], i32 [[IV]]
196+
; ORIGIN-NEXT: [[IV:%.*]] = phi i64 [ 0, [[TMP14]] ], [ [[IV_NEXT:%.*]], [[DOTSPLIT]] ]
197+
; ORIGIN-NEXT: [[TMP20:%.*]] = getelementptr i32, ptr [[TMP12]], i64 [[IV]]
198198
; ORIGIN-NEXT: store i32 [[TMP15]], ptr [[TMP20]], align 4
199-
; ORIGIN-NEXT: [[IV_NEXT]] = add nuw nsw i32 [[IV]], 1
200-
; ORIGIN-NEXT: [[IV_CHECK:%.*]] = icmp eq i32 [[IV_NEXT]], [[TMP19]]
199+
; ORIGIN-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 1
200+
; ORIGIN-NEXT: [[IV_CHECK:%.*]] = icmp eq i64 [[IV_NEXT]], [[TMP19]]
201201
; ORIGIN-NEXT: br i1 [[IV_CHECK]], label [[DOTSPLIT_SPLIT:%.*]], label [[DOTSPLIT]]
202202
; ORIGIN: .split.split:
203203
; ORIGIN-NEXT: br label [[TMP21]]
@@ -268,17 +268,17 @@ define void @test_load_store_add_float(ptr %a, ptr %b) sanitize_memory {
268268
; ORIGIN-NEXT: br i1 [[_MSCMP]], label [[TMP25:%.*]], label [[TMP32:%.*]], !prof [[PROF0]]
269269
; ORIGIN: 25:
270270
; ORIGIN-NEXT: [[TMP26:%.*]] = call i32 @__msan_chain_origin(i32 [[TMP14]])
271-
; ORIGIN-NEXT: [[TMP27:%.*]] = call i32 @llvm.vscale.i32()
272-
; ORIGIN-NEXT: [[TMP28:%.*]] = mul i32 [[TMP27]], 8
273-
; ORIGIN-NEXT: [[TMP29:%.*]] = add i32 [[TMP28]], 3
274-
; ORIGIN-NEXT: [[TMP30:%.*]] = udiv i32 [[TMP29]], 4
271+
; ORIGIN-NEXT: [[TMP27:%.*]] = call i64 @llvm.vscale.i64()
272+
; ORIGIN-NEXT: [[TMP28:%.*]] = mul i64 [[TMP27]], 8
273+
; ORIGIN-NEXT: [[TMP29:%.*]] = add i64 [[TMP28]], 3
274+
; ORIGIN-NEXT: [[TMP30:%.*]] = udiv i64 [[TMP29]], 4
275275
; ORIGIN-NEXT: br label [[DOTSPLIT:%.*]]
276276
; ORIGIN: .split:
277-
; ORIGIN-NEXT: [[IV:%.*]] = phi i32 [ 0, [[TMP25]] ], [ [[IV_NEXT:%.*]], [[DOTSPLIT]] ]
278-
; ORIGIN-NEXT: [[TMP31:%.*]] = getelementptr i32, ptr [[TMP23]], i32 [[IV]]
277+
; ORIGIN-NEXT: [[IV:%.*]] = phi i64 [ 0, [[TMP25]] ], [ [[IV_NEXT:%.*]], [[DOTSPLIT]] ]
278+
; ORIGIN-NEXT: [[TMP31:%.*]] = getelementptr i32, ptr [[TMP23]], i64 [[IV]]
279279
; ORIGIN-NEXT: store i32 [[TMP26]], ptr [[TMP31]], align 4
280-
; ORIGIN-NEXT: [[IV_NEXT]] = add nuw nsw i32 [[IV]], 1
281-
; ORIGIN-NEXT: [[IV_CHECK:%.*]] = icmp eq i32 [[IV_NEXT]], [[TMP30]]
280+
; ORIGIN-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 1
281+
; ORIGIN-NEXT: [[IV_CHECK:%.*]] = icmp eq i64 [[IV_NEXT]], [[TMP30]]
282282
; ORIGIN-NEXT: br i1 [[IV_CHECK]], label [[DOTSPLIT_SPLIT:%.*]], label [[DOTSPLIT]]
283283
; ORIGIN: .split.split:
284284
; ORIGIN-NEXT: br label [[TMP32]]
@@ -362,17 +362,17 @@ define void @test_ret(ptr %a, ptr %b) sanitize_memory {
362362
; ORIGIN-NEXT: br i1 [[_MSCMP]], label [[TMP11:%.*]], label [[TMP18:%.*]], !prof [[PROF0]]
363363
; ORIGIN: 11:
364364
; ORIGIN-NEXT: [[TMP12:%.*]] = call i32 @__msan_chain_origin(i32 [[TMP4]])
365-
; ORIGIN-NEXT: [[TMP13:%.*]] = call i32 @llvm.vscale.i32()
366-
; ORIGIN-NEXT: [[TMP14:%.*]] = mul i32 [[TMP13]], 8
367-
; ORIGIN-NEXT: [[TMP15:%.*]] = add i32 [[TMP14]], 3
368-
; ORIGIN-NEXT: [[TMP16:%.*]] = udiv i32 [[TMP15]], 4
365+
; ORIGIN-NEXT: [[TMP13:%.*]] = call i64 @llvm.vscale.i64()
366+
; ORIGIN-NEXT: [[TMP14:%.*]] = mul i64 [[TMP13]], 8
367+
; ORIGIN-NEXT: [[TMP15:%.*]] = add i64 [[TMP14]], 3
368+
; ORIGIN-NEXT: [[TMP16:%.*]] = udiv i64 [[TMP15]], 4
369369
; ORIGIN-NEXT: br label [[DOTSPLIT:%.*]]
370370
; ORIGIN: .split:
371-
; ORIGIN-NEXT: [[IV:%.*]] = phi i32 [ 0, [[TMP11]] ], [ [[IV_NEXT:%.*]], [[DOTSPLIT]] ]
372-
; ORIGIN-NEXT: [[TMP17:%.*]] = getelementptr i32, ptr [[TMP9]], i32 [[IV]]
371+
; ORIGIN-NEXT: [[IV:%.*]] = phi i64 [ 0, [[TMP11]] ], [ [[IV_NEXT:%.*]], [[DOTSPLIT]] ]
372+
; ORIGIN-NEXT: [[TMP17:%.*]] = getelementptr i32, ptr [[TMP9]], i64 [[IV]]
373373
; ORIGIN-NEXT: store i32 [[TMP12]], ptr [[TMP17]], align 4
374-
; ORIGIN-NEXT: [[IV_NEXT]] = add nuw nsw i32 [[IV]], 1
375-
; ORIGIN-NEXT: [[IV_CHECK:%.*]] = icmp eq i32 [[IV_NEXT]], [[TMP16]]
374+
; ORIGIN-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 1
375+
; ORIGIN-NEXT: [[IV_CHECK:%.*]] = icmp eq i64 [[IV_NEXT]], [[TMP16]]
376376
; ORIGIN-NEXT: br i1 [[IV_CHECK]], label [[DOTSPLIT_SPLIT:%.*]], label [[DOTSPLIT]]
377377
; ORIGIN: .split.split:
378378
; ORIGIN-NEXT: br label [[TMP18]]
@@ -410,17 +410,17 @@ define void @fn_param(<vscale x 2 x float> %a, ptr %b) sanitize_memory {
410410
; ORIGIN-NEXT: br i1 [[_MSCMP]], label [[TMP7:%.*]], label [[TMP14:%.*]], !prof [[PROF0]]
411411
; ORIGIN: 7:
412412
; ORIGIN-NEXT: [[TMP8:%.*]] = call i32 @__msan_chain_origin(i32 0)
413-
; ORIGIN-NEXT: [[TMP9:%.*]] = call i32 @llvm.vscale.i32()
414-
; ORIGIN-NEXT: [[TMP10:%.*]] = mul i32 [[TMP9]], 8
415-
; ORIGIN-NEXT: [[TMP11:%.*]] = add i32 [[TMP10]], 3
416-
; ORIGIN-NEXT: [[TMP12:%.*]] = udiv i32 [[TMP11]], 4
413+
; ORIGIN-NEXT: [[TMP9:%.*]] = call i64 @llvm.vscale.i64()
414+
; ORIGIN-NEXT: [[TMP10:%.*]] = mul i64 [[TMP9]], 8
415+
; ORIGIN-NEXT: [[TMP11:%.*]] = add i64 [[TMP10]], 3
416+
; ORIGIN-NEXT: [[TMP12:%.*]] = udiv i64 [[TMP11]], 4
417417
; ORIGIN-NEXT: br label [[DOTSPLIT:%.*]]
418418
; ORIGIN: .split:
419-
; ORIGIN-NEXT: [[IV:%.*]] = phi i32 [ 0, [[TMP7]] ], [ [[IV_NEXT:%.*]], [[DOTSPLIT]] ]
420-
; ORIGIN-NEXT: [[TMP13:%.*]] = getelementptr i32, ptr [[TMP5]], i32 [[IV]]
419+
; ORIGIN-NEXT: [[IV:%.*]] = phi i64 [ 0, [[TMP7]] ], [ [[IV_NEXT:%.*]], [[DOTSPLIT]] ]
420+
; ORIGIN-NEXT: [[TMP13:%.*]] = getelementptr i32, ptr [[TMP5]], i64 [[IV]]
421421
; ORIGIN-NEXT: store i32 [[TMP8]], ptr [[TMP13]], align 4
422-
; ORIGIN-NEXT: [[IV_NEXT]] = add nuw nsw i32 [[IV]], 1
423-
; ORIGIN-NEXT: [[IV_CHECK:%.*]] = icmp eq i32 [[IV_NEXT]], [[TMP12]]
422+
; ORIGIN-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 1
423+
; ORIGIN-NEXT: [[IV_CHECK:%.*]] = icmp eq i64 [[IV_NEXT]], [[TMP12]]
424424
; ORIGIN-NEXT: br i1 [[IV_CHECK]], label [[DOTSPLIT_SPLIT:%.*]], label [[DOTSPLIT]]
425425
; ORIGIN: .split.split:
426426
; ORIGIN-NEXT: br label [[TMP14]]

0 commit comments

Comments
 (0)