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clean up of true16 mc changes
1 parent 3275291 commit 302f981

26 files changed

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-492
lines changed

‎llvm/test/MC/AMDGPU/gfx11_asm_vinterp_err.s

Lines changed: 13 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
11
// NOTE: Assertions have been autogenerated by utils/update_mc_test_checks.py UTC_ARGS: --unique --version 5
2-
// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1100 %s 2>&1 | FileCheck %s -check-prefix=GCN-ERR --implicit-check-not=error: --strict-whitespace
3-
// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1200 %s 2>&1 | FileCheck %s -check-prefix=GCN-ERR --implicit-check-not=error: --strict-whitespace
2+
// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=+real-true16 %s 2>&1 | FileCheck %s -check-prefix=GCN-ERR --implicit-check-not=error: --strict-whitespace
3+
// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1200 -mattr=+real-true16 %s 2>&1 | FileCheck %s -check-prefix=GCN-ERR --implicit-check-not=error: --strict-whitespace
44

55
//===----------------------------------------------------------------------===//
66
// VINTERP src operands must be VGPRs.
@@ -25,20 +25,20 @@ v_interp_p2_f32 v0, v1, 2, v3
2525
v_interp_p2_f32 v0, v1, v2, 3
2626
// GCN-ERR: :[[@LINE-1]]:29: error: invalid operand for instruction
2727

28-
v_interp_p10_f16_f32 v0, s1, v2, v3
28+
v_interp_p10_f16_f32 v0, s1, v2, v3.l
2929
// GCN-ERR: :[[@LINE-1]]:26: error: invalid operand for instruction
3030

31-
v_interp_p10_f16_f32 v0, v1, s2, v3
32-
// GCN-ERR: :[[@LINE-1]]:30: error: invalid operand for instruction
31+
v_interp_p10_f16_f32 v0, v1.l, s2, v3.l
32+
// GCN-ERR: :[[@LINE-1]]:32: error: invalid operand for instruction
3333

34-
v_interp_p10_f16_f32 v0, v1, v2, s3
35-
// GCN-ERR: :[[@LINE-1]]:34: error: invalid operand for instruction
34+
v_interp_p10_f16_f32 v0, v1.l, v2, s3
35+
// GCN-ERR: :[[@LINE-1]]:36: error: invalid operand for instruction
3636

37-
v_interp_p2_f16_f32 v0, 1, v2, v3
38-
// GCN-ERR: :[[@LINE-1]]:25: error: invalid operand for instruction
37+
v_interp_p2_f16_f32 v0.l, 1, v2, v3.l
38+
// GCN-ERR: :[[@LINE-1]]:27: error: invalid operand for instruction
3939

40-
v_interp_p2_f16_f32 v0, v1, 2, v3
41-
// GCN-ERR: :[[@LINE-1]]:29: error: invalid operand for instruction
42-
43-
v_interp_p2_f16_f32 v0, v1, v2, 3
40+
v_interp_p2_f16_f32 v0.l, v1.l, 2, v3.l
4441
// GCN-ERR: :[[@LINE-1]]:33: error: invalid operand for instruction
42+
43+
v_interp_p2_f16_f32 v0.l, v1.l, v2, 3
44+
// GCN-ERR: :[[@LINE-1]]:37: error: invalid operand for instruction

‎llvm/test/MC/AMDGPU/gfx11_asm_vop1.s

Lines changed: 4 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -2,7 +2,7 @@
22
// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=+real-true16,+wavefrontsize32 -show-encoding %s | FileCheck --check-prefix=GFX11 %s
33
// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=+real-true16,+wavefrontsize64 -show-encoding %s | FileCheck --check-prefix=GFX11 %s
44

5-
v_bfrev_b32_e32 v5, v1
5+
v_bfrev_b32 v5, v1
66
// GFX11: v_bfrev_b32_e32 v5, v1 ; encoding: [0x01,0x71,0x0a,0x7e]
77

88
v_bfrev_b32 v5, v255
@@ -464,6 +464,9 @@ v_cvt_f16_f32 v5.h, src_scc
464464
v_cvt_f16_f32 v127.h, 0xaf123456
465465
// GFX11: v_cvt_f16_f32_e32 v127.h, 0xaf123456 ; encoding: [0xff,0x14,0xfe,0x7f,0x56,0x34,0x12,0xaf]
466466

467+
v_cvt_f16_f32 v127.l, 0.5
468+
// GFX11: v_cvt_f16_f32_e32 v127.l, 0.5 ; encoding: [0xf0,0x14,0xfe,0x7e]
469+
467470
v_cvt_f16_i16 v5.l, v1.l
468471
// GFX11: v_cvt_f16_i16_e32 v5.l, v1.l ; encoding: [0x01,0xa3,0x0a,0x7e]
469472

‎llvm/test/MC/AMDGPU/gfx11_asm_vop1_dpp16.s

Lines changed: 7 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -2,7 +2,7 @@
22
// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=+real-true16,+wavefrontsize32 -show-encoding %s | FileCheck --check-prefixes=GFX11 %s
33
// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=+real-true16,+wavefrontsize64 -show-encoding %s | FileCheck --check-prefixes=GFX11 %s
44

5-
v_bfrev_b32_dpp v5, v1 quad_perm:[3,2,1,0]
5+
v_bfrev_b32 v5, v1 quad_perm:[3,2,1,0]
66
// GFX11: v_bfrev_b32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x70,0x0a,0x7e,0x01,0x1b,0x00,0xff]
77

88
v_bfrev_b32 v5, v1 quad_perm:[0,1,2,3]
@@ -389,6 +389,9 @@ v_cvt_f16_f32 v5.h, v1 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
389389
v_cvt_f16_f32 v127.h, -|v255| row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
390390
// GFX11: v_cvt_f16_f32_dpp v127.h, -|v255| row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x14,0xfe,0x7f,0xff,0x6f,0x35,0x30]
391391

392+
v_cvt_f16_f32 v127.l, v1 row_share:15 row_mask:0x0 bank_mask:0x1
393+
// GFX11: v_cvt_f16_f32_dpp v127.l, v1 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x14,0xfe,0x7e,0x01,0x5f,0x01,0x01]
394+
392395
v_cvt_f16_i16 v5.l, v1.l quad_perm:[3,2,1,0]
393396
// GFX11: v_cvt_f16_i16_dpp v5.l, v1.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0xa2,0x0a,0x7e,0x01,0x1b,0x00,0xff]
394397

@@ -515,6 +518,9 @@ v_cvt_f32_f16 v5, v1.h row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
515518
v_cvt_f32_f16 v255, -|v127.h| row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
516519
// GFX11: v_cvt_f32_f16_dpp v255, -|v127.h| row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x16,0xfe,0x7f,0xff,0x6f,0x35,0x30]
517520

521+
v_cvt_f32_f16 v5, v127.l row_share:15 row_mask:0x0 bank_mask:0x1
522+
// GFX11: v_cvt_f32_f16_dpp v5, v127.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x16,0x0a,0x7e,0x7f,0x5f,0x01,0x01]
523+
518524
v_cvt_f32_i32 v5, v1 quad_perm:[3,2,1,0]
519525
// GFX11: v_cvt_f32_i32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x0a,0x0a,0x7e,0x01,0x1b,0x00,0xff]
520526

‎llvm/test/MC/AMDGPU/gfx11_asm_vop1_dpp8.s

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -2,7 +2,7 @@
22
// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=+real-true16,+wavefrontsize32 -show-encoding %s | FileCheck --check-prefixes=GFX11 %s
33
// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=+real-true16,+wavefrontsize64 -show-encoding %s | FileCheck --check-prefixes=GFX11 %s
44

5-
v_bfrev_b32_dpp v5, v1 dpp8:[7,6,5,4,3,2,1,0]
5+
v_bfrev_b32 v5, v1 dpp8:[7,6,5,4,3,2,1,0]
66
// GFX11: v_bfrev_b32_dpp v5, v1 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x70,0x0a,0x7e,0x01,0x77,0x39,0x05]
77

88
v_bfrev_b32 v5, v1 dpp8:[7,6,5,4,3,2,1,0] fi:1

‎llvm/test/MC/AMDGPU/gfx11_asm_vop1_t16_err.s

Lines changed: 73 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,4 +1,4 @@
1-
// NOTE: Assertions have been autogenerated by utils/update_mc_test_checks.py UTC_ARGS: --unique --version 5
1+
// NOTE: Assertions have been autogenerated by utils/update_mc_test_checks.py UTC_ARGS: --unique --sort --version 5
22
// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=+real-true16,+wavefrontsize32 -show-encoding %s 2>&1 | FileCheck --check-prefix=GFX11 --implicit-check-not=error: %s
33
// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=+real-true16,+wavefrontsize64 -show-encoding %s 2>&1 | FileCheck --check-prefix=GFX11 --implicit-check-not=error: %s
44

@@ -116,6 +116,24 @@ v_cvt_f16_f32_e32 v128, 0xaf123456 dpp8:[7,6,5,4,3,2,1,0]
116116
v_cvt_f16_f32_e32 v128, 0xaf123456 quad_perm:[3,2,1,0]
117117
// GFX11: :[[@LINE-1]]:36: error: invalid operand for instruction
118118

119+
v_cvt_f16_f32_e32 v128.h, 0xaf123456
120+
// GFX11: :[[@LINE-1]]:19: error: invalid operand for instruction
121+
122+
v_cvt_f16_f32_e32 v128.h, 0xaf123456 dpp8:[7,6,5,4,3,2,1,0]
123+
// GFX11: :[[@LINE-1]]:19: error: invalid operand for instruction
124+
125+
v_cvt_f16_f32_e32 v128.h, 0xaf123456 quad_perm:[3,2,1,0]
126+
// GFX11: :[[@LINE-1]]:19: error: invalid operand for instruction
127+
128+
v_cvt_f16_f32_e32 v128.l, 0xaf123456
129+
// GFX11: :[[@LINE-1]]:19: error: invalid operand for instruction
130+
131+
v_cvt_f16_f32_e32 v128.l, 0xaf123456 dpp8:[7,6,5,4,3,2,1,0]
132+
// GFX11: :[[@LINE-1]]:19: error: invalid operand for instruction
133+
134+
v_cvt_f16_f32_e32 v128.l, 0xaf123456 quad_perm:[3,2,1,0]
135+
// GFX11: :[[@LINE-1]]:19: error: invalid operand for instruction
136+
119137
v_cvt_f16_f32_e32 v255, v1
120138
// GFX11: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
121139

@@ -134,6 +152,42 @@ v_cvt_f16_f32_e32 v255, v255 dpp8:[7,6,5,4,3,2,1,0]
134152
v_cvt_f16_f32_e32 v255, v255 quad_perm:[3,2,1,0]
135153
// GFX11: :[[@LINE-1]]:30: error: invalid operand for instruction
136154

155+
v_cvt_f16_f32_e32 v255.h, v1.h
156+
// GFX11: :[[@LINE-1]]:19: error: invalid operand for instruction
157+
158+
v_cvt_f16_f32_e32 v255.h, v1.h dpp8:[7,6,5,4,3,2,1,0]
159+
// GFX11: :[[@LINE-1]]:19: error: invalid operand for instruction
160+
161+
v_cvt_f16_f32_e32 v255.h, v1.h quad_perm:[3,2,1,0]
162+
// GFX11: :[[@LINE-1]]:19: error: invalid operand for instruction
163+
164+
v_cvt_f16_f32_e32 v255.h, v255.h
165+
// GFX11: :[[@LINE-1]]:19: error: invalid operand for instruction
166+
167+
v_cvt_f16_f32_e32 v255.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
168+
// GFX11: :[[@LINE-1]]:19: error: invalid operand for instruction
169+
170+
v_cvt_f16_f32_e32 v255.h, v255.h quad_perm:[3,2,1,0]
171+
// GFX11: :[[@LINE-1]]:19: error: invalid operand for instruction
172+
173+
v_cvt_f16_f32_e32 v255.l, v1.l
174+
// GFX11: :[[@LINE-1]]:19: error: invalid operand for instruction
175+
176+
v_cvt_f16_f32_e32 v255.l, v1.l dpp8:[7,6,5,4,3,2,1,0]
177+
// GFX11: :[[@LINE-1]]:19: error: invalid operand for instruction
178+
179+
v_cvt_f16_f32_e32 v255.l, v1.l quad_perm:[3,2,1,0]
180+
// GFX11: :[[@LINE-1]]:19: error: invalid operand for instruction
181+
182+
v_cvt_f16_f32_e32 v255.l, v255.l
183+
// GFX11: :[[@LINE-1]]:19: error: invalid operand for instruction
184+
185+
v_cvt_f16_f32_e32 v255.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
186+
// GFX11: :[[@LINE-1]]:19: error: invalid operand for instruction
187+
188+
v_cvt_f16_f32_e32 v255.l, v255.l quad_perm:[3,2,1,0]
189+
// GFX11: :[[@LINE-1]]:19: error: invalid operand for instruction
190+
137191
v_cvt_f16_i16_e32 v128.h, 0xfe0b
138192
// GFX11: :[[@LINE-1]]:19: error: invalid operand for instruction
139193

@@ -227,6 +281,24 @@ v_cvt_f32_f16_e32 v5, v199 dpp8:[7,6,5,4,3,2,1,0]
227281
v_cvt_f32_f16_e32 v5, v199 quad_perm:[3,2,1,0]
228282
// GFX11: :[[@LINE-1]]:28: error: invalid operand for instruction
229283

284+
v_cvt_f32_f16_e32 v5.h, v199.h
285+
// GFX11: :[[@LINE-1]]:19: error: invalid operand for instruction
286+
287+
v_cvt_f32_f16_e32 v5.h, v199.h dpp8:[7,6,5,4,3,2,1,0]
288+
// GFX11: :[[@LINE-1]]:19: error: invalid operand for instruction
289+
290+
v_cvt_f32_f16_e32 v5.h, v199.h quad_perm:[3,2,1,0]
291+
// GFX11: :[[@LINE-1]]:19: error: invalid operand for instruction
292+
293+
v_cvt_f32_f16_e32 v5.l, v199.l
294+
// GFX11: :[[@LINE-1]]:19: error: invalid operand for instruction
295+
296+
v_cvt_f32_f16_e32 v5.l, v199.l dpp8:[7,6,5,4,3,2,1,0]
297+
// GFX11: :[[@LINE-1]]:19: error: invalid operand for instruction
298+
299+
v_cvt_f32_f16_e32 v5.l, v199.l quad_perm:[3,2,1,0]
300+
// GFX11: :[[@LINE-1]]:19: error: invalid operand for instruction
301+
230302
v_cvt_i16_f16_e32 v128.h, 0xfe0b
231303
// GFX11: :[[@LINE-1]]:19: error: invalid operand for instruction
232304

‎llvm/test/MC/AMDGPU/gfx11_asm_vop1_t16_promote.s

Lines changed: 4 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,4 +1,4 @@
1-
// NOTE: Assertions have been autogenerated by utils/update_mc_test_checks.py UTC_ARGS: --version 5
1+
// NOTE: Assertions have been autogenerated by utils/update_mc_test_checks.py UTC_ARGS: --unique --sort --version 5
22
// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32,+real-true16 -show-encoding %s | FileCheck --check-prefix=GFX11 --implicit-check-not=_e32 %s
33
// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize64,+real-true16 -show-encoding %s | FileCheck --check-prefix=GFX11 --implicit-check-not=_e32 %s
44

@@ -308,6 +308,9 @@ v_cvt_f16_f32 v255.h, ttmp15
308308
v_cvt_f16_f32 v255.h, v1
309309
// GFX11: v_cvt_f16_f32_e64 v255.h, v1 op_sel:[0,1] ; encoding: [0xff,0x40,0x8a,0xd5,0x01,0x01,0x00,0x00]
310310

311+
v_cvt_f16_f32 v255.h, v1 dpp8:[7,6,5,4,3,2,1,0]
312+
// GFX11: v_cvt_f16_f32_e64_dpp v255.h, v1 op_sel:[0,1] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xff,0x40,0x8a,0xd5,0xe9,0x00,0x00,0x00,0x01,0x77,0x39,0x05]
313+
311314
v_cvt_f16_f32 v255.h, v1 quad_perm:[3,2,1,0]
312315
// GFX11: v_cvt_f16_f32_e64_dpp v255.h, v1 op_sel:[0,1] quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xff,0x40,0x8a,0xd5,0xfa,0x00,0x00,0x00,0x01,0x1b,0x00,0xff]
313316

‎llvm/test/MC/AMDGPU/gfx11_asm_vop2.s

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -4,7 +4,7 @@
44
// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32,+real-true16 -filetype=null %s 2>&1 | FileCheck --check-prefix=W32-ERR --implicit-check-not=error: %s
55
// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize64,+real-true16 -filetype=null %s 2>&1 | FileCheck --check-prefix=W64-ERR --implicit-check-not=error: %s
66

7-
v_add_co_ci_u32_e32 v5, vcc_lo, v1, v2, vcc_lo
7+
v_add_co_ci_u32 v5, vcc_lo, v1, v2, vcc_lo
88
// W32: v_add_co_ci_u32_e32 v5, vcc_lo, v1, v2, vcc_lo ; encoding: [0x01,0x05,0x0a,0x40]
99
// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
1010

‎llvm/test/MC/AMDGPU/gfx11_asm_vop2_dpp16.s

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -4,7 +4,7 @@
44
// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32,+real-true16 -filetype=null %s 2>&1 | FileCheck --check-prefix=W32-ERR --implicit-check-not=error: %s
55
// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize64,+real-true16 -filetype=null %s 2>&1 | FileCheck --check-prefix=W64-ERR --implicit-check-not=error: %s
66

7-
v_add_co_ci_u32_dpp v5, vcc_lo, v1, v2, vcc_lo quad_perm:[3,2,1,0]
7+
v_add_co_ci_u32 v5, vcc_lo, v1, v2, vcc_lo quad_perm:[3,2,1,0]
88
// W32: v_add_co_ci_u32_dpp v5, vcc_lo, v1, v2, vcc_lo quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x40,0x01,0x1b,0x00,0xff]
99
// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
1010

@@ -459,15 +459,15 @@ v_cndmask_b32 v255, v255, v255, vcc row_xmask:15 row_mask:0x3 bank_mask:0x0 boun
459459
// W64: v_cndmask_b32_dpp v255, v255, v255, vcc row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0xff,0x03,0xff,0x6f,0x05,0x30]
460460
// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
461461

462-
v_cndmask_b32_dpp v5, -v1, |v2|, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
462+
v_cndmask_b32 v5, -v1, |v2|, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
463463
// W64: v_cndmask_b32_dpp v5, -v1, |v2|, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x02,0x01,0xe4,0x90,0x00]
464464
// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
465465

466-
v_cndmask_b32_dpp v5, |v1|, -v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
466+
v_cndmask_b32 v5, |v1|, -v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
467467
// W64: v_cndmask_b32_dpp v5, |v1|, -v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x02,0x01,0xe4,0x60,0x00]
468468
// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
469469

470-
v_cndmask_b32_dpp v5, -|v1|, -|v2|, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
470+
v_cndmask_b32 v5, -|v1|, -|v2|, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
471471
// W64: v_cndmask_b32_dpp v5, -|v1|, -|v2|, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x02,0x01,0xe4,0xf0,0x00]
472472
// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
473473

‎llvm/test/MC/AMDGPU/gfx11_asm_vop2_dpp8.s

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -4,7 +4,7 @@
44
// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32,+real-true16 -filetype=null %s 2>&1 | FileCheck --check-prefix=W32-ERR --implicit-check-not=error: %s
55
// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize64,+real-true16 -filetype=null %s 2>&1 | FileCheck --check-prefix=W64-ERR --implicit-check-not=error: %s
66

7-
v_add_co_ci_u32_dpp v5, vcc_lo, v1, v2, vcc_lo dpp8:[7,6,5,4,3,2,1,0]
7+
v_add_co_ci_u32 v5, vcc_lo, v1, v2, vcc_lo dpp8:[7,6,5,4,3,2,1,0]
88
// W32: v_add_co_ci_u32_dpp v5, vcc_lo, v1, v2, vcc_lo dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x0a,0x40,0x01,0x77,0x39,0x05]
99
// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
1010

‎llvm/test/MC/AMDGPU/gfx11_asm_vop2_err.s

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -3,11 +3,11 @@
33
v_fmaak_f32 v0, 0xff32, v0, 0
44
// GFX11: :[[@LINE-1]]:{{[0-9]+}}: error: only one unique literal operand is allowed
55

6-
v_fmaak_f16 v0, 0xff32, v0, 0
6+
v_fmaak_f16 v0.l, 0xff32, v0.l, 0
77
// GFX11: :[[@LINE-1]]:{{[0-9]+}}: error: only one unique literal operand is allowed
88

99
v_fmamk_f32 v0, 0xff32, 1, v0
1010
// GFX11: :[[@LINE-1]]:{{[0-9]+}}: error: only one unique literal operand is allowed
1111

12-
v_fmamk_f16 v0, 0xff32, 1, v0
12+
v_fmamk_f16 v0.l, 0xff32, 1, v0.l
1313
// GFX11: :[[@LINE-1]]:{{[0-9]+}}: error: only one unique literal operand is allowed

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