Skip to content

Commit 3173a4f

Browse files
authored
[llvm-exegesis] Remove implicit conversions of MCRegister to unsigned. NFC (#123223)
-Use MCRegister::id() for BitVector index. -Replace std::unordered_set<unsigned> with std::set<MCRegister. There are other std::sets for Register. None for MCRegister before this. I'm assuming we can have operator<(MCRegister, MCRegister). This avoids needing to add std::hash<MCRegister>. -Use MCRegister::isValid() to avoid comparing to 0.
1 parent 01d7f43 commit 3173a4f

File tree

1 file changed

+7
-7
lines changed

1 file changed

+7
-7
lines changed

llvm/unittests/tools/llvm-exegesis/X86/SnippetGeneratorTest.cpp

Lines changed: 7 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -183,7 +183,7 @@ TEST_F(X86SerialSnippetGeneratorTest,
183183
ASSERT_THAT(IT.getVariableValues(), SizeIs(3));
184184
for (const auto &Var : IT.getVariableValues()) {
185185
if (Var.isReg()) {
186-
EXPECT_FALSE(ForbiddenRegisters[Var.getReg()]);
186+
EXPECT_FALSE(ForbiddenRegisters[Var.getReg().id()]);
187187
}
188188
}
189189
}
@@ -288,8 +288,8 @@ TEST_F(X86ParallelSnippetGeneratorTest, ReadAfterWrite_CMOV32rr) {
288288
EXPECT_THAT(CT.Info, HasSubstr("avoiding Read-After-Write issue"));
289289
EXPECT_THAT(CT.Execution, ExecutionMode::UNKNOWN);
290290
ASSERT_GT(CT.Instructions.size(), 1U);
291-
std::unordered_set<unsigned> AllDefRegisters;
292-
std::unordered_set<unsigned> AllUseRegisters;
291+
std::set<MCRegister> AllDefRegisters;
292+
std::set<MCRegister> AllUseRegisters;
293293
for (const auto &IT : CT.Instructions) {
294294
ASSERT_THAT(IT.getVariableValues(), SizeIs(3));
295295
AllDefRegisters.insert(IT.getVariableValues()[0].getReg());
@@ -328,8 +328,8 @@ TEST_F(X86ParallelSnippetGeneratorTest, ReadAfterWrite_VFMADD132PDr) {
328328
EXPECT_THAT(CT.Info, HasSubstr("avoiding Read-After-Write issue"));
329329
EXPECT_THAT(CT.Execution, ExecutionMode::UNKNOWN);
330330
ASSERT_GT(CT.Instructions.size(), 1U);
331-
std::unordered_set<unsigned> AllDefRegisters;
332-
std::unordered_set<unsigned> AllUseRegisters;
331+
std::set<MCRegister> AllDefRegisters;
332+
std::set<MCRegister> AllUseRegisters;
333333
for (const auto &IT : CT.Instructions) {
334334
ASSERT_THAT(IT.getVariableValues(), SizeIs(3));
335335
AllDefRegisters.insert(IT.getVariableValues()[0].getReg());
@@ -412,9 +412,9 @@ TEST_F(X86ParallelSnippetGeneratorTest, MemoryUse) {
412412
EXPECT_THAT(IT.getOpcode(), Opcode);
413413
ASSERT_THAT(IT.getVariableValues(), SizeIs(6));
414414
EXPECT_EQ(IT.getVariableValues()[2].getImm(), 1);
415-
EXPECT_EQ(IT.getVariableValues()[3].getReg(), 0u);
415+
EXPECT_FALSE(IT.getVariableValues()[3].getReg().isValid());
416416
EXPECT_EQ(IT.getVariableValues()[4].getImm(), 0);
417-
EXPECT_EQ(IT.getVariableValues()[5].getReg(), 0u);
417+
EXPECT_FALSE(IT.getVariableValues()[5].getReg().isValid());
418418
}
419419
}
420420

0 commit comments

Comments
 (0)