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[X86][test] Add a separate test for NDD CMOV
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+125
-139
lines changed

2 files changed

+125
-139
lines changed

llvm/test/CodeGen/X86/apx/cmov.ll

Lines changed: 125 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,125 @@
1+
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
2+
; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd -x86-cmov-converter=false -show-mc-encoding -verify-machineinstrs | FileCheck %s
3+
4+
define i8 @cmov8(i8 %a, i8 %b, i8 %x, ptr %y.ptr) {
5+
; CHECK-LABEL: cmov8:
6+
; CHECK: # %bb.0: # %entry
7+
; CHECK-NEXT: cmpb %sil, %dil # encoding: [0x40,0x38,0xf7]
8+
; CHECK-NEXT: cmoval %edi, %edx, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x47,0xd7]
9+
; CHECK-NEXT: movzbl (%rcx), %ecx # encoding: [0x0f,0xb6,0x09]
10+
; CHECK-NEXT: cmovbel %edx, %ecx # EVEX TO LEGACY Compression encoding: [0x0f,0x46,0xca]
11+
; CHECK-NEXT: addb %cl, %al # EVEX TO LEGACY Compression encoding: [0x00,0xc8]
12+
; CHECK-NEXT: retq # encoding: [0xc3]
13+
entry:
14+
%cond = icmp ugt i8 %a, %b
15+
%y = load i8, ptr %y.ptr
16+
%z2 = select i1 %cond, i8 %a, i8 %x
17+
%z1 = select i1 %cond, i8 %y, i8 %x
18+
%s1 = add i8 %z1, %z2
19+
ret i8 %s1
20+
}
21+
22+
define i16 @cmov16(i16 %a, i16 %b, i16 %x, ptr %y.ptr) {
23+
; CHECK-LABEL: cmov16:
24+
; CHECK: # %bb.0: # %entry
25+
; CHECK-NEXT: cmpw %si, %di # encoding: [0x66,0x39,0xf7]
26+
; CHECK-NEXT: cmoval %edi, %edx, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x47,0xd7]
27+
; CHECK-NEXT: cmovaw (%rcx), %dx, %cx # encoding: [0x62,0xf4,0x75,0x18,0x47,0x11]
28+
; CHECK-NEXT: addw %cx, %ax # EVEX TO LEGACY Compression encoding: [0x66,0x01,0xc8]
29+
; CHECK-NEXT: retq # encoding: [0xc3]
30+
entry:
31+
%cond = icmp ugt i16 %a, %b
32+
%y = load i16, ptr %y.ptr
33+
%z2 = select i1 %cond, i16 %a, i16 %x
34+
%z1 = select i1 %cond, i16 %y, i16 %x
35+
%s1 = add i16 %z1, %z2
36+
ret i16 %s1
37+
}
38+
39+
define i32 @cmov32(i32 %a, i32 %b, i32 %x, ptr %y.ptr) {
40+
; CHECK-LABEL: cmov32:
41+
; CHECK: # %bb.0: # %entry
42+
; CHECK-NEXT: cmpl %esi, %edi # encoding: [0x39,0xf7]
43+
; CHECK-NEXT: cmoval %edi, %edx, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x47,0xd7]
44+
; CHECK-NEXT: cmoval (%rcx), %edx, %ecx # encoding: [0x62,0xf4,0x74,0x18,0x47,0x11]
45+
; CHECK-NEXT: addl %ecx, %eax # EVEX TO LEGACY Compression encoding: [0x01,0xc8]
46+
; CHECK-NEXT: retq # encoding: [0xc3]
47+
entry:
48+
%cond = icmp ugt i32 %a, %b
49+
%y = load i32, ptr %y.ptr
50+
%z2 = select i1 %cond, i32 %a, i32 %x
51+
%z1 = select i1 %cond, i32 %y, i32 %x
52+
%s1 = add i32 %z1, %z2
53+
ret i32 %s1
54+
}
55+
56+
define i64 @cmov64(i64 %a, i64 %b, i64 %x, ptr %y.ptr) {
57+
; CHECK-LABEL: cmov64:
58+
; CHECK: # %bb.0: # %entry
59+
; CHECK-NEXT: cmpq %rsi, %rdi # encoding: [0x48,0x39,0xf7]
60+
; CHECK-NEXT: cmovaq %rdi, %rdx, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x47,0xd7]
61+
; CHECK-NEXT: cmovaq (%rcx), %rdx, %rcx # encoding: [0x62,0xf4,0xf4,0x18,0x47,0x11]
62+
; CHECK-NEXT: addq %rcx, %rax # EVEX TO LEGACY Compression encoding: [0x48,0x01,0xc8]
63+
; CHECK-NEXT: retq # encoding: [0xc3]
64+
entry:
65+
%cond = icmp ugt i64 %a, %b
66+
%y = load i64, ptr %y.ptr
67+
%z2 = select i1 %cond, i64 %a, i64 %x
68+
%z1 = select i1 %cond, i64 %y, i64 %x
69+
%s1 = add i64 %z1, %z2
70+
ret i64 %s1
71+
}
72+
73+
define i8 @cmov8rm_inv(i8 %a, i8 %x, ptr %y.ptr) {
74+
; CHECK-LABEL: cmov8rm_inv:
75+
; CHECK: # %bb.0: # %entry
76+
; CHECK-NEXT: testb %dil, %dil # encoding: [0x40,0x84,0xff]
77+
; CHECK-NEXT: movzbl (%rdx), %eax # encoding: [0x0f,0xb6,0x02]
78+
; CHECK-NEXT: cmovsl %esi, %eax # EVEX TO LEGACY Compression encoding: [0x0f,0x48,0xc6]
79+
; CHECK-NEXT: # kill: def $al killed $al killed $eax
80+
; CHECK-NEXT: retq # encoding: [0xc3]
81+
entry:
82+
%y = load i8, ptr %y.ptr
83+
%cmp = icmp slt i8 %a, 0
84+
%cmov = select i1 %cmp, i8 %x, i8 %y
85+
ret i8 %cmov
86+
}
87+
88+
define i16 @cmov16rm_inv(i16 %a, i16 %x, ptr %y.ptr) {
89+
; CHECK-LABEL: cmov16rm_inv:
90+
; CHECK: # %bb.0: # %entry
91+
; CHECK-NEXT: testw %di, %di # encoding: [0x66,0x85,0xff]
92+
; CHECK-NEXT: cmovnsw (%rdx), %si, %ax # encoding: [0x62,0xf4,0x7d,0x18,0x49,0x32]
93+
; CHECK-NEXT: retq # encoding: [0xc3]
94+
entry:
95+
%y = load i16, ptr %y.ptr
96+
%cmp = icmp slt i16 %a, 0
97+
%cmov = select i1 %cmp, i16 %x, i16 %y
98+
ret i16 %cmov
99+
}
100+
101+
define i32 @cmov32rm_inv(i32 %a, i32 %x, ptr %y.ptr) {
102+
; CHECK-LABEL: cmov32rm_inv:
103+
; CHECK: # %bb.0: # %entry
104+
; CHECK-NEXT: testl %edi, %edi # encoding: [0x85,0xff]
105+
; CHECK-NEXT: cmovnsl (%rdx), %esi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x49,0x32]
106+
; CHECK-NEXT: retq # encoding: [0xc3]
107+
entry:
108+
%y = load i32, ptr %y.ptr
109+
%cmp = icmp slt i32 %a, 0
110+
%cmov = select i1 %cmp, i32 %x, i32 %y
111+
ret i32 %cmov
112+
}
113+
114+
define i64 @cmov64rm_inv(i64 %a, i64 %x, ptr %y.ptr) {
115+
; CHECK-LABEL: cmov64rm_inv:
116+
; CHECK: # %bb.0: # %entry
117+
; CHECK-NEXT: testq %rdi, %rdi # encoding: [0x48,0x85,0xff]
118+
; CHECK-NEXT: cmovnsq (%rdx), %rsi, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x49,0x32]
119+
; CHECK-NEXT: retq # encoding: [0xc3]
120+
entry:
121+
%y = load i64, ptr %y.ptr
122+
%cmp = icmp slt i64 %a, 0
123+
%cmov = select i1 %cmp, i64 %x, i64 %y
124+
ret i64 %cmov
125+
}

llvm/test/CodeGen/X86/cmov.ll

Lines changed: 0 additions & 139 deletions
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,5 @@
11
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
22
; RUN: llc < %s -verify-machineinstrs -mtriple=x86_64-unknown-unknown -disable-cgp-select2branch -x86-cmov-converter=false | FileCheck %s
3-
; RUN: llc < %s -verify-machineinstrs -mtriple=x86_64-unknown-unknown -disable-cgp-select2branch -x86-cmov-converter=false -mattr=+ndd --show-mc-encoding | FileCheck %s --check-prefix=NDD
43
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
54

65
define i32 @test1(i32 %x, i32 %n, i32 %w, ptr %vp) nounwind readnone {
@@ -10,13 +9,6 @@ define i32 @test1(i32 %x, i32 %n, i32 %w, ptr %vp) nounwind readnone {
109
; CHECK-NEXT: movl $12, %eax
1110
; CHECK-NEXT: cmovael (%rcx), %eax
1211
; CHECK-NEXT: retq
13-
;
14-
; NDD-LABEL: test1:
15-
; NDD: # %bb.0: # %entry
16-
; NDD-NEXT: btl %esi, %edi # encoding: [0x0f,0xa3,0xf7]
17-
; NDD-NEXT: movl $12, %eax # encoding: [0xb8,0x0c,0x00,0x00,0x00]
18-
; NDD-NEXT: cmovael (%rcx), %eax # EVEX TO LEGACY Compression encoding: [0x0f,0x43,0x01]
19-
; NDD-NEXT: retq # encoding: [0xc3]
2012
entry:
2113
%0 = lshr i32 %x, %n
2214
%1 = and i32 %0, 1
@@ -33,13 +25,6 @@ define i32 @test2(i32 %x, i32 %n, i32 %w, ptr %vp) nounwind readnone {
3325
; CHECK-NEXT: movl $12, %eax
3426
; CHECK-NEXT: cmovbl (%rcx), %eax
3527
; CHECK-NEXT: retq
36-
;
37-
; NDD-LABEL: test2:
38-
; NDD: # %bb.0: # %entry
39-
; NDD-NEXT: btl %esi, %edi # encoding: [0x0f,0xa3,0xf7]
40-
; NDD-NEXT: movl $12, %eax # encoding: [0xb8,0x0c,0x00,0x00,0x00]
41-
; NDD-NEXT: cmovbl (%rcx), %eax # EVEX TO LEGACY Compression encoding: [0x0f,0x42,0x01]
42-
; NDD-NEXT: retq # encoding: [0xc3]
4328
entry:
4429
%0 = lshr i32 %x, %n
4530
%1 = and i32 %0, 1
@@ -65,16 +50,6 @@ define void @test3(i64 %a, i64 %b, i1 %p) nounwind {
6550
; CHECK-NEXT: callq bar@PLT
6651
; CHECK-NEXT: popq %rax
6752
; CHECK-NEXT: retq
68-
;
69-
; NDD-LABEL: test3:
70-
; NDD: # %bb.0:
71-
; NDD-NEXT: pushq %rax # encoding: [0x50]
72-
; NDD-NEXT: testb $1, %dl # encoding: [0xf6,0xc2,0x01]
73-
; NDD-NEXT: cmovel %esi, %edi # EVEX TO LEGACY Compression encoding: [0x0f,0x44,0xfe]
74-
; NDD-NEXT: callq bar@PLT # encoding: [0xe8,A,A,A,A]
75-
; NDD-NEXT: # fixup A - offset: 1, value: bar@PLT-4, kind: FK_PCRel_4
76-
; NDD-NEXT: popq %rax # encoding: [0x58]
77-
; NDD-NEXT: retq # encoding: [0xc3]
7853
%c = trunc i64 %a to i32
7954
%d = trunc i64 %b to i32
8055
%e = select i1 %p, i32 %c, i32 %d
@@ -139,54 +114,6 @@ define i1 @test4() nounwind {
139114
; CHECK-NEXT: movl %ebx, %eax
140115
; CHECK-NEXT: popq %rbx
141116
; CHECK-NEXT: retq
142-
;
143-
; NDD-LABEL: test4:
144-
; NDD: # %bb.0: # %entry
145-
; NDD-NEXT: movsbl g_3(%rip), %eax # encoding: [0x0f,0xbe,0x05,A,A,A,A]
146-
; NDD-NEXT: # fixup A - offset: 3, value: g_3-4, kind: reloc_riprel_4byte
147-
; NDD-NEXT: movzbl %al, %ecx # encoding: [0x0f,0xb6,0xc8]
148-
; NDD-NEXT: shrl $7, %ecx # EVEX TO LEGACY Compression encoding: [0xc1,0xe9,0x07]
149-
; NDD-NEXT: xorb $1, %cl # EVEX TO LEGACY Compression encoding: [0x80,0xf1,0x01]
150-
; NDD-NEXT: sarl %cl, %eax, %ecx # encoding: [0x62,0xf4,0x74,0x18,0xd3,0xf8]
151-
; NDD-NEXT: movzbl g_96(%rip), %eax # encoding: [0x0f,0xb6,0x05,A,A,A,A]
152-
; NDD-NEXT: # fixup A - offset: 3, value: g_96-4, kind: reloc_riprel_4byte
153-
; NDD-NEXT: testb %al, %al # encoding: [0x84,0xc0]
154-
; NDD-NEXT: je .LBB3_2 # encoding: [0x74,A]
155-
; NDD-NEXT: # fixup A - offset: 1, value: .LBB3_2-1, kind: FK_PCRel_1
156-
; NDD-NEXT: # %bb.1: # %bb.i.i.i
157-
; NDD-NEXT: movzbl g_100(%rip), %edx # encoding: [0x0f,0xb6,0x15,A,A,A,A]
158-
; NDD-NEXT: # fixup A - offset: 3, value: g_100-4, kind: reloc_riprel_4byte
159-
; NDD-NEXT: .LBB3_2: # %func_4.exit.i
160-
; NDD-NEXT: pushq %rbx # encoding: [0x53]
161-
; NDD-NEXT: xorl %edx, %edx # encoding: [0x31,0xd2]
162-
; NDD-NEXT: testb %cl, %cl # encoding: [0x84,0xc9]
163-
; NDD-NEXT: setne %bl # encoding: [0x0f,0x95,0xc3]
164-
; NDD-NEXT: movzbl %al, %ecx # encoding: [0x0f,0xb6,0xc8]
165-
; NDD-NEXT: cmovnel %edx, %ecx # EVEX TO LEGACY Compression encoding: [0x0f,0x45,0xca]
166-
; NDD-NEXT: testb %al, %al # encoding: [0x84,0xc0]
167-
; NDD-NEXT: je .LBB3_5 # encoding: [0x74,A]
168-
; NDD-NEXT: # fixup A - offset: 1, value: .LBB3_5-1, kind: FK_PCRel_1
169-
; NDD-NEXT: # %bb.3: # %func_4.exit.i
170-
; NDD-NEXT: testb %bl, %bl # encoding: [0x84,0xdb]
171-
; NDD-NEXT: jne .LBB3_5 # encoding: [0x75,A]
172-
; NDD-NEXT: # fixup A - offset: 1, value: .LBB3_5-1, kind: FK_PCRel_1
173-
; NDD-NEXT: # %bb.4: # %bb.i.i
174-
; NDD-NEXT: movzbl g_100(%rip), %ecx # encoding: [0x0f,0xb6,0x0d,A,A,A,A]
175-
; NDD-NEXT: # fixup A - offset: 3, value: g_100-4, kind: reloc_riprel_4byte
176-
; NDD-NEXT: xorl %ebx, %ebx # encoding: [0x31,0xdb]
177-
; NDD-NEXT: movl %eax, %ecx # encoding: [0x89,0xc1]
178-
; NDD-NEXT: .LBB3_5: # %func_1.exit
179-
; NDD-NEXT: movb %cl, g_96(%rip) # encoding: [0x88,0x0d,A,A,A,A]
180-
; NDD-NEXT: # fixup A - offset: 2, value: g_96-4, kind: reloc_riprel_4byte
181-
; NDD-NEXT: movzbl %cl, %esi # encoding: [0x0f,0xb6,0xf1]
182-
; NDD-NEXT: movl $_2E_str, %edi # encoding: [0xbf,A,A,A,A]
183-
; NDD-NEXT: # fixup A - offset: 1, value: _2E_str, kind: FK_Data_4
184-
; NDD-NEXT: xorl %eax, %eax # encoding: [0x31,0xc0]
185-
; NDD-NEXT: callq printf@PLT # encoding: [0xe8,A,A,A,A]
186-
; NDD-NEXT: # fixup A - offset: 1, value: printf@PLT-4, kind: FK_PCRel_4
187-
; NDD-NEXT: movl %ebx, %eax # encoding: [0x89,0xd8]
188-
; NDD-NEXT: popq %rbx # encoding: [0x5b]
189-
; NDD-NEXT: retq # encoding: [0xc3]
190117
entry:
191118
%0 = load i8, ptr @g_3, align 1
192119
%1 = sext i8 %0 to i32
@@ -236,14 +163,6 @@ define i32 @test5(ptr nocapture %P) nounwind readonly {
236163
; CHECK-NEXT: setge %al
237164
; CHECK-NEXT: orl $-2, %eax
238165
; CHECK-NEXT: retq
239-
;
240-
; NDD-LABEL: test5:
241-
; NDD: # %bb.0: # %entry
242-
; NDD-NEXT: xorl %eax, %eax # encoding: [0x31,0xc0]
243-
; NDD-NEXT: cmpl $42, (%rdi) # encoding: [0x83,0x3f,0x2a]
244-
; NDD-NEXT: setge %al # encoding: [0x0f,0x9d,0xc0]
245-
; NDD-NEXT: orl $-2, %eax # EVEX TO LEGACY Compression encoding: [0x83,0xc8,0xfe]
246-
; NDD-NEXT: retq # encoding: [0xc3]
247166
entry:
248167
%0 = load i32, ptr %P, align 4
249168
%1 = icmp sgt i32 %0, 41
@@ -259,14 +178,6 @@ define i32 @test6(ptr nocapture %P) nounwind readonly {
259178
; CHECK-NEXT: setl %al
260179
; CHECK-NEXT: leal 4(%rax,%rax,8), %eax
261180
; CHECK-NEXT: retq
262-
;
263-
; NDD-LABEL: test6:
264-
; NDD: # %bb.0: # %entry
265-
; NDD-NEXT: xorl %eax, %eax # encoding: [0x31,0xc0]
266-
; NDD-NEXT: cmpl $42, (%rdi) # encoding: [0x83,0x3f,0x2a]
267-
; NDD-NEXT: setl %al # encoding: [0x0f,0x9c,0xc0]
268-
; NDD-NEXT: leal 4(%rax,%rax,8), %eax # encoding: [0x8d,0x44,0xc0,0x04]
269-
; NDD-NEXT: retq # encoding: [0xc3]
270181
entry:
271182
%0 = load i32, ptr %P, align 4
272183
%1 = icmp sgt i32 %0, 41
@@ -283,13 +194,6 @@ define i8 @test7(i1 inreg %c, i8 inreg %a, i8 inreg %b) nounwind {
283194
; CHECK-NEXT: cmovel %edx, %eax
284195
; CHECK-NEXT: # kill: def $al killed $al killed $eax
285196
; CHECK-NEXT: retq
286-
;
287-
; NDD-LABEL: test7:
288-
; NDD: # %bb.0:
289-
; NDD-NEXT: testb $1, %dil # encoding: [0x40,0xf6,0xc7,0x01]
290-
; NDD-NEXT: cmovnel %esi, %edx, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x45,0xd6]
291-
; NDD-NEXT: # kill: def $al killed $al killed $eax
292-
; NDD-NEXT: retq # encoding: [0xc3]
293197
%d = select i1 %c, i8 %a, i8 %b
294198
ret i8 %d
295199
}
@@ -301,13 +205,6 @@ define i64 @test8(i64 %0, i64 %1, i64 %2) {
301205
; CHECK-NEXT: cmpq $-2147483648, %rdi # imm = 0x80000000
302206
; CHECK-NEXT: cmovlq %rdx, %rax
303207
; CHECK-NEXT: retq
304-
;
305-
; NDD-LABEL: test8:
306-
; NDD: # %bb.0:
307-
; NDD-NEXT: cmpq $-2147483648, %rdi # encoding: [0x48,0x81,0xff,0x00,0x00,0x00,0x80]
308-
; NDD-NEXT: # imm = 0x80000000
309-
; NDD-NEXT: cmovgeq %rsi, %rdx, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x4d,0xd6]
310-
; NDD-NEXT: retq # encoding: [0xc3]
311208
%4 = icmp sgt i64 %0, -2147483649
312209
%5 = select i1 %4, i64 %1, i64 %2
313210
ret i64 %5
@@ -321,14 +218,6 @@ define i32 @smin(i32 %x) {
321218
; CHECK-NEXT: movl $-1, %eax
322219
; CHECK-NEXT: cmovnsl %edi, %eax
323220
; CHECK-NEXT: retq
324-
;
325-
; NDD-LABEL: smin:
326-
; NDD: # %bb.0:
327-
; NDD-NEXT: notl %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0xf7,0xd7]
328-
; NDD-NEXT: testl %edi, %edi # encoding: [0x85,0xff]
329-
; NDD-NEXT: movl $-1, %ecx # encoding: [0xb9,0xff,0xff,0xff,0xff]
330-
; NDD-NEXT: cmovsl %ecx, %eax # EVEX TO LEGACY Compression encoding: [0x0f,0x48,0xc1]
331-
; NDD-NEXT: retq # encoding: [0xc3]
332221
%not_x = xor i32 %x, -1
333222
%1 = icmp slt i32 %not_x, -1
334223
%sel = select i1 %1, i32 %not_x, i32 -1
@@ -342,13 +231,6 @@ define i32 @pr47049_1(i32 %0) {
342231
; CHECK-NEXT: movl $1, %eax
343232
; CHECK-NEXT: cmovlel %edi, %eax
344233
; CHECK-NEXT: retq
345-
;
346-
; NDD-LABEL: pr47049_1:
347-
; NDD: # %bb.0:
348-
; NDD-NEXT: testl %edi, %edi # encoding: [0x85,0xff]
349-
; NDD-NEXT: movl $1, %eax # encoding: [0xb8,0x01,0x00,0x00,0x00]
350-
; NDD-NEXT: cmovlel %edi, %eax # EVEX TO LEGACY Compression encoding: [0x0f,0x4e,0xc7]
351-
; NDD-NEXT: retq # encoding: [0xc3]
352234
%2 = icmp slt i32 %0, 1
353235
%3 = select i1 %2, i32 %0, i32 1
354236
ret i32 %3
@@ -361,13 +243,6 @@ define i32 @pr47049_2(i32 %0) {
361243
; CHECK-NEXT: movl $-1, %eax
362244
; CHECK-NEXT: cmovnsl %edi, %eax
363245
; CHECK-NEXT: retq
364-
;
365-
; NDD-LABEL: pr47049_2:
366-
; NDD: # %bb.0:
367-
; NDD-NEXT: testl %edi, %edi # encoding: [0x85,0xff]
368-
; NDD-NEXT: movl $-1, %eax # encoding: [0xb8,0xff,0xff,0xff,0xff]
369-
; NDD-NEXT: cmovnsl %edi, %eax # EVEX TO LEGACY Compression encoding: [0x0f,0x49,0xc7]
370-
; NDD-NEXT: retq # encoding: [0xc3]
371246
%2 = icmp sgt i32 %0, -1
372247
%3 = select i1 %2, i32 %0, i32 -1
373248
ret i32 %3
@@ -380,13 +255,6 @@ define i32 @pr47049_3(i32 %0) {
380255
; CHECK-NEXT: movl $1, %eax
381256
; CHECK-NEXT: cmovgl %edi, %eax
382257
; CHECK-NEXT: retq
383-
;
384-
; NDD-LABEL: pr47049_3:
385-
; NDD: # %bb.0:
386-
; NDD-NEXT: testl %edi, %edi # encoding: [0x85,0xff]
387-
; NDD-NEXT: movl $1, %eax # encoding: [0xb8,0x01,0x00,0x00,0x00]
388-
; NDD-NEXT: cmovgl %edi, %eax # EVEX TO LEGACY Compression encoding: [0x0f,0x4f,0xc7]
389-
; NDD-NEXT: retq # encoding: [0xc3]
390258
%2 = icmp sgt i32 %0, 1
391259
%3 = select i1 %2, i32 %0, i32 1
392260
ret i32 %3
@@ -399,13 +267,6 @@ define i32 @pr47049_4(i32 %0) {
399267
; CHECK-NEXT: movl $1, %eax
400268
; CHECK-NEXT: cmovnel %edi, %eax
401269
; CHECK-NEXT: retq
402-
;
403-
; NDD-LABEL: pr47049_4:
404-
; NDD: # %bb.0:
405-
; NDD-NEXT: testl %edi, %edi # encoding: [0x85,0xff]
406-
; NDD-NEXT: movl $1, %eax # encoding: [0xb8,0x01,0x00,0x00,0x00]
407-
; NDD-NEXT: cmovnel %edi, %eax # EVEX TO LEGACY Compression encoding: [0x0f,0x45,0xc7]
408-
; NDD-NEXT: retq # encoding: [0xc3]
409270
%2 = icmp ugt i32 %0, 1
410271
%3 = select i1 %2, i32 %0, i32 1
411272
ret i32 %3

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