|
71 | 71 | exit:
|
72 | 72 | ret void
|
73 | 73 | }
|
| 74 | + |
| 75 | +define amdgpu_ps i32 @test_if(i1 inreg %cond) { |
| 76 | +; SDAG-LABEL: test_if: |
| 77 | +; SDAG: ; %bb.0: ; %entry |
| 78 | +; SDAG-NEXT: s_bitcmp0_b32 s0, 0 |
| 79 | +; SDAG-NEXT: s_mov_b32 s0, src_pops_exiting_wave_id |
| 80 | +; SDAG-NEXT: ; return to shader part epilog |
| 81 | +; |
| 82 | +; GFX9-GISEL-LABEL: test_if: |
| 83 | +; GFX9-GISEL: ; %bb.0: ; %entry |
| 84 | +; GFX9-GISEL-NEXT: s_mov_b32 s1, s0 |
| 85 | +; GFX9-GISEL-NEXT: s_mov_b32 s0, src_pops_exiting_wave_id |
| 86 | +; GFX9-GISEL-NEXT: s_xor_b32 s1, s1, 1 |
| 87 | +; GFX9-GISEL-NEXT: s_and_b32 s1, s1, 1 |
| 88 | +; GFX9-GISEL-NEXT: ; return to shader part epilog |
| 89 | +; |
| 90 | +; GFX10-GISEL-LABEL: test_if: |
| 91 | +; GFX10-GISEL: ; %bb.0: ; %entry |
| 92 | +; GFX10-GISEL-NEXT: s_xor_b32 s0, s0, 1 |
| 93 | +; GFX10-GISEL-NEXT: s_and_b32 s1, s0, 1 |
| 94 | +; GFX10-GISEL-NEXT: s_mov_b32 s0, src_pops_exiting_wave_id |
| 95 | +; GFX10-GISEL-NEXT: ; return to shader part epilog |
| 96 | +entry: |
| 97 | + %id1 = call i32 @llvm.amdgcn.pops.exiting.wave.id() |
| 98 | + br i1 %cond, label %body, label %exit |
| 99 | +body: |
| 100 | + %id2 = call i32 @llvm.amdgcn.pops.exiting.wave.id() |
| 101 | + br label %exit |
| 102 | +exit: |
| 103 | + %id = phi i32 [ %id1, %entry ], [ %id2, %body ] |
| 104 | + ret i32 %id |
| 105 | +} |
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