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davemgreendavemgreen
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[BasicAA] More vscale tests. NFC
This time with i8 geps and scale intrinsics, along with mutiple vscale intrinsics that can be treated as identical.
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‎llvm/test/Analysis/BasicAA/vscale.ll

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@@ -309,6 +309,174 @@ define void @v1v2types(ptr %p) vscale_range(1,16) {
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ret void
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}
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; VScale intrinsic offset tests
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; CHECK-LABEL: vscale_neg_notscalable
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; CHECK-DAG: MayAlias: <4 x i32>* %p, <4 x i32>* %vm16
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; CHECK-DAG: NoAlias: <4 x i32>* %m16, <4 x i32>* %p
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; CHECK-DAG: MayAlias: <4 x i32>* %m16, <4 x i32>* %vm16
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; CHECK-DAG: MayAlias: <4 x i32>* %p, <4 x i32>* %vm16m16
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; CHECK-DAG: NoAlias: <4 x i32>* %vm16, <4 x i32>* %vm16m16
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; CHECK-DAG: MayAlias: <4 x i32>* %m16, <4 x i32>* %vm16m16
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; CHECK-DAG: MayAlias: <4 x i32>* %m16pv16, <4 x i32>* %p
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; CHECK-DAG: NoAlias: <4 x i32>* %m16pv16, <4 x i32>* %vm16
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; CHECK-DAG: MayAlias: <4 x i32>* %m16, <4 x i32>* %m16pv16
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; CHECK-DAG: MayAlias: <4 x i32>* %m16pv16, <4 x i32>* %vm16m16
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define void @vscale_neg_notscalable(ptr %p) {
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%v = call i64 @llvm.vscale.i64()
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%vp = mul i64 %v, 16
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%vm = mul i64 %v, -16
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%vm16 = getelementptr i8, ptr %p, i64 %vm
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%m16 = getelementptr <4 x i32>, ptr %p, i64 -1
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%vm16m16 = getelementptr <4 x i32>, ptr %vm16, i64 -1
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%m16pv16 = getelementptr i8, ptr %m16, i64 %vp
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load <4 x i32>, ptr %p
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load <4 x i32>, ptr %vm16
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load <4 x i32>, ptr %m16
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load <4 x i32>, ptr %vm16m16
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load <4 x i32>, ptr %m16pv16
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ret void
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}
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; CHECK-LABEL: vscale_neg_scalable
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; CHECK-DAG: MayAlias: <vscale x 4 x i32>* %p, <vscale x 4 x i32>* %vm16
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; CHECK-DAG: MayAlias: <vscale x 4 x i32>* %m16, <vscale x 4 x i32>* %p
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; CHECK-DAG: MayAlias: <vscale x 4 x i32>* %m16, <vscale x 4 x i32>* %vm16
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; CHECK-DAG: MayAlias: <vscale x 4 x i32>* %p, <vscale x 4 x i32>* %vm16m16
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; CHECK-DAG: MayAlias: <vscale x 4 x i32>* %vm16, <vscale x 4 x i32>* %vm16m16
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; CHECK-DAG: MayAlias: <vscale x 4 x i32>* %m16, <vscale x 4 x i32>* %vm16m16
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; CHECK-DAG: MayAlias: <vscale x 4 x i32>* %m16pv16, <vscale x 4 x i32>* %p
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; CHECK-DAG: MayAlias: <vscale x 4 x i32>* %m16pv16, <vscale x 4 x i32>* %vm16
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; CHECK-DAG: MayAlias: <vscale x 4 x i32>* %m16, <vscale x 4 x i32>* %m16pv16
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; CHECK-DAG: MayAlias: <vscale x 4 x i32>* %m16pv16, <vscale x 4 x i32>* %vm16m16
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define void @vscale_neg_scalable(ptr %p) {
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%v = call i64 @llvm.vscale.i64()
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%vp = mul i64 %v, 16
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%vm = mul i64 %v, -16
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%vm16 = getelementptr i8, ptr %p, i64 %vm
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%m16 = getelementptr <4 x i32>, ptr %p, i64 -1
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%vm16m16 = getelementptr <4 x i32>, ptr %vm16, i64 -1
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%m16pv16 = getelementptr i8, ptr %m16, i64 %vp
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load <vscale x 4 x i32>, ptr %p
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load <vscale x 4 x i32>, ptr %vm16
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load <vscale x 4 x i32>, ptr %m16
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load <vscale x 4 x i32>, ptr %vm16m16
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load <vscale x 4 x i32>, ptr %m16pv16
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ret void
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}
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; CHECK-LABEL: vscale_pos_notscalable
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; CHECK-DAG: MayAlias: <4 x i32>* %p, <4 x i32>* %vm16
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; CHECK-DAG: NoAlias: <4 x i32>* %m16, <4 x i32>* %p
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; CHECK-DAG: MayAlias: <4 x i32>* %m16, <4 x i32>* %vm16
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; CHECK-DAG: MayAlias: <4 x i32>* %p, <4 x i32>* %vm16m16
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; CHECK-DAG: NoAlias: <4 x i32>* %vm16, <4 x i32>* %vm16m16
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; CHECK-DAG: MayAlias: <4 x i32>* %m16, <4 x i32>* %vm16m16
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; CHECK-DAG: MayAlias: <4 x i32>* %m16pv16, <4 x i32>* %p
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; CHECK-DAG: NoAlias: <4 x i32>* %m16pv16, <4 x i32>* %vm16
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; CHECK-DAG: MayAlias: <4 x i32>* %m16, <4 x i32>* %m16pv16
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; CHECK-DAG: MayAlias: <4 x i32>* %m16pv16, <4 x i32>* %vm16m16
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define void @vscale_pos_notscalable(ptr %p) {
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%v = call i64 @llvm.vscale.i64()
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%vp = mul i64 %v, 16
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%vm = mul i64 %v, -16
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%vm16 = getelementptr i8, ptr %p, i64 %vp
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%m16 = getelementptr <4 x i32>, ptr %p, i64 1
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%vm16m16 = getelementptr <4 x i32>, ptr %vm16, i64 1
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%m16pv16 = getelementptr i8, ptr %m16, i64 %vm
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load <4 x i32>, ptr %p
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load <4 x i32>, ptr %vm16
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load <4 x i32>, ptr %m16
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load <4 x i32>, ptr %vm16m16
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load <4 x i32>, ptr %m16pv16
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ret void
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}
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; CHECK-LABEL: vscale_pos_scalable
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; CHECK-DAG: MayAlias: <vscale x 4 x i32>* %p, <vscale x 4 x i32>* %vm16
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; CHECK-DAG: MayAlias: <vscale x 4 x i32>* %m16, <vscale x 4 x i32>* %p
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; CHECK-DAG: MayAlias: <vscale x 4 x i32>* %m16, <vscale x 4 x i32>* %vm16
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; CHECK-DAG: MayAlias: <vscale x 4 x i32>* %p, <vscale x 4 x i32>* %vm16m16
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; CHECK-DAG: MayAlias: <vscale x 4 x i32>* %vm16, <vscale x 4 x i32>* %vm16m16
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; CHECK-DAG: MayAlias: <vscale x 4 x i32>* %m16, <vscale x 4 x i32>* %vm16m16
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; CHECK-DAG: MayAlias: <vscale x 4 x i32>* %m16pv16, <vscale x 4 x i32>* %p
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; CHECK-DAG: MayAlias: <vscale x 4 x i32>* %m16pv16, <vscale x 4 x i32>* %vm16
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; CHECK-DAG: MayAlias: <vscale x 4 x i32>* %m16, <vscale x 4 x i32>* %m16pv16
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; CHECK-DAG: MayAlias: <vscale x 4 x i32>* %m16pv16, <vscale x 4 x i32>* %vm16m16
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define void @vscale_pos_scalable(ptr %p) {
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%v = call i64 @llvm.vscale.i64()
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%vp = mul i64 %v, 16
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%vm = mul i64 %v, -16
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%vm16 = getelementptr i8, ptr %p, i64 %vp
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%m16 = getelementptr <4 x i32>, ptr %p, i64 1
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%vm16m16 = getelementptr <4 x i32>, ptr %vm16, i64 1
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%m16pv16 = getelementptr i8, ptr %m16, i64 %vm
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load <vscale x 4 x i32>, ptr %p
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load <vscale x 4 x i32>, ptr %vm16
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load <vscale x 4 x i32>, ptr %m16
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load <vscale x 4 x i32>, ptr %vm16m16
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load <vscale x 4 x i32>, ptr %m16pv16
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ret void
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}
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; CHECK-LABEL: vscale_v1v2types
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; CHECK-DAG: MayAlias: <4 x i32>* %p, <vscale x 4 x i32>* %p
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; CHECK-DAG: MayAlias: <vscale x 4 x i32>* %p, <vscale x 4 x i32>* %vm16
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; CHECK-DAG: MayAlias: <4 x i32>* %p, <vscale x 4 x i32>* %vm16
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; CHECK-DAG: MayAlias: <vscale x 4 x i32>* %p, <4 x i32>* %vm16
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; CHECK-DAG: MayAlias: <4 x i32>* %p, <4 x i32>* %vm16
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; CHECK-DAG: MayAlias: <4 x i32>* %vm16, <vscale x 4 x i32>* %vm16
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; CHECK-DAG: MayAlias: <vscale x 4 x i32>* %m16, <vscale x 4 x i32>* %p
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; CHECK-DAG: MayAlias: <vscale x 4 x i32>* %m16, <4 x i32>* %p
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; CHECK-DAG: MayAlias: <vscale x 4 x i32>* %m16, <vscale x 4 x i32>* %vm16
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; CHECK-DAG: MayAlias: <vscale x 4 x i32>* %m16, <4 x i32>* %vm16
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; CHECK-DAG: MayAlias: <4 x i32>* %m16, <vscale x 4 x i32>* %p
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; CHECK-DAG: MayAlias: <4 x i32>* %m16, <4 x i32>* %p
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; CHECK-DAG: MayAlias: <4 x i32>* %m16, <vscale x 4 x i32>* %vm16
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; CHECK-DAG: MayAlias: <4 x i32>* %m16, <4 x i32>* %vm16
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; CHECK-DAG: MayAlias: <4 x i32>* %m16, <vscale x 4 x i32>* %m16
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; CHECK-DAG: MayAlias: <vscale x 4 x i32>* %p, <vscale x 4 x i32>* %vp16
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; CHECK-DAG: MayAlias: <4 x i32>* %p, <vscale x 4 x i32>* %vp16
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; CHECK-DAG: MayAlias: <vscale x 4 x i32>* %vm16, <vscale x 4 x i32>* %vp16
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; CHECK-DAG: MayAlias: <4 x i32>* %vm16, <vscale x 4 x i32>* %vp16
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; CHECK-DAG: MayAlias: <vscale x 4 x i32>* %m16, <vscale x 4 x i32>* %vp16
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; CHECK-DAG: MayAlias: <4 x i32>* %m16, <vscale x 4 x i32>* %vp16
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define void @vscale_v1v2types(ptr %p) {
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%v = call i64 @llvm.vscale.i64()
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%vp = mul i64 %v, 16
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%vm = mul i64 %v, -16
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%vp16 = getelementptr i8, ptr %p, i64 %vp
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%vm16 = getelementptr i8, ptr %p, i64 %vm
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%m16 = getelementptr <4 x i32>, ptr %p, i64 -1
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load <vscale x 4 x i32>, ptr %p
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load <4 x i32>, ptr %p
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load <vscale x 4 x i32>, ptr %vm16
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load <4 x i32>, ptr %vm16
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load <vscale x 4 x i32>, ptr %m16
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load <4 x i32>, ptr %m16
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load <vscale x 4 x i32>, ptr %vp16
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ret void
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}
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; CHECK-LABEL: twovscales
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; CHECK-DAG: MayAlias: <vscale x 4 x i32>* %vp161, <vscale x 4 x i32>* %vp162
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; CHECK-DAG: MayAlias: <vscale x 4 x i32>* %vp161, <vscale x 4 x i32>* %vp161b
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; CHECK-DAG: MayAlias: <vscale x 4 x i32>* %vp161b, <vscale x 4 x i32>* %vp162
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define void @twovscales(ptr %p) {
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%v1 = call i64 @llvm.vscale.i64()
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%v2 = call i64 @llvm.vscale.i64()
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%vp1 = mul i64 %v1, 16
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%vp2 = mul i64 %v2, 16
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%vp3 = mul i64 %v1, 17
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%vp161 = getelementptr i8, ptr %p, i64 %vp1
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%vp162 = getelementptr i8, ptr %p, i64 %vp2
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%vp161b = getelementptr i8, ptr %vp161, i64 %vp3
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load <vscale x 4 x i32>, ptr %vp161
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load <vscale x 4 x i32>, ptr %vp162
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load <vscale x 4 x i32>, ptr %vp161b
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ret void
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}
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; getelementptr recursion
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; CHECK-LABEL: gep_recursion_level_1

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