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[LLD][COFF][NFC] Use getMachineArchType helper.
1 parent 51107be commit 347f0f7

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2 files changed

+18
-16
lines changed

2 files changed

+18
-16
lines changed

lld/COFF/Chunks.cpp

Lines changed: 12 additions & 16 deletions
Original file line numberDiff line numberDiff line change
@@ -437,19 +437,17 @@ void SectionChunk::applyRelocation(uint8_t *off,
437437
// Compute the RVA of the relocation for relative relocations.
438438
uint64_t p = rva + rel.VirtualAddress;
439439
uint64_t imageBase = file->ctx.config.imageBase;
440-
switch (getMachine()) {
441-
case AMD64:
440+
switch (getArch()) {
441+
case Triple::x86_64:
442442
applyRelX64(off, rel.Type, os, s, p, imageBase);
443443
break;
444-
case I386:
444+
case Triple::x86:
445445
applyRelX86(off, rel.Type, os, s, p, imageBase);
446446
break;
447-
case ARMNT:
447+
case Triple::thumb:
448448
applyRelARM(off, rel.Type, os, s, p, imageBase);
449449
break;
450-
case ARM64:
451-
case ARM64EC:
452-
case ARM64X:
450+
case Triple::aarch64:
453451
applyRelARM64(off, rel.Type, os, s, p, imageBase);
454452
break;
455453
default:
@@ -516,27 +514,25 @@ void SectionChunk::addAssociative(SectionChunk *child) {
516514
}
517515

518516
static uint8_t getBaserelType(const coff_relocation &rel,
519-
llvm::COFF::MachineTypes machine) {
520-
switch (machine) {
521-
case AMD64:
517+
Triple::ArchType arch) {
518+
switch (arch) {
519+
case Triple::x86_64:
522520
if (rel.Type == IMAGE_REL_AMD64_ADDR64)
523521
return IMAGE_REL_BASED_DIR64;
524522
if (rel.Type == IMAGE_REL_AMD64_ADDR32)
525523
return IMAGE_REL_BASED_HIGHLOW;
526524
return IMAGE_REL_BASED_ABSOLUTE;
527-
case I386:
525+
case Triple::x86:
528526
if (rel.Type == IMAGE_REL_I386_DIR32)
529527
return IMAGE_REL_BASED_HIGHLOW;
530528
return IMAGE_REL_BASED_ABSOLUTE;
531-
case ARMNT:
529+
case Triple::thumb:
532530
if (rel.Type == IMAGE_REL_ARM_ADDR32)
533531
return IMAGE_REL_BASED_HIGHLOW;
534532
if (rel.Type == IMAGE_REL_ARM_MOV32T)
535533
return IMAGE_REL_BASED_ARM_MOV32T;
536534
return IMAGE_REL_BASED_ABSOLUTE;
537-
case ARM64:
538-
case ARM64EC:
539-
case ARM64X:
535+
case Triple::aarch64:
540536
if (rel.Type == IMAGE_REL_ARM64_ADDR64)
541537
return IMAGE_REL_BASED_DIR64;
542538
return IMAGE_REL_BASED_ABSOLUTE;
@@ -551,7 +547,7 @@ static uint8_t getBaserelType(const coff_relocation &rel,
551547
// Only called when base relocation is enabled.
552548
void SectionChunk::getBaserels(std::vector<Baserel> *res) {
553549
for (const coff_relocation &rel : getRelocs()) {
554-
uint8_t ty = getBaserelType(rel, getMachine());
550+
uint8_t ty = getBaserelType(rel, getArch());
555551
if (ty == IMAGE_REL_BASED_ABSOLUTE)
556552
continue;
557553
Symbol *target = file->getSymbol(rel.SymbolTableIndex);

lld/COFF/Chunks.h

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -18,6 +18,7 @@
1818
#include "llvm/ADT/iterator_range.h"
1919
#include "llvm/MC/StringTableBuilder.h"
2020
#include "llvm/Object/COFF.h"
21+
#include "llvm/Object/WindowsMachineFlag.h"
2122
#include <utility>
2223
#include <vector>
2324

@@ -116,6 +117,7 @@ class Chunk {
116117
bool isHotPatchable() const;
117118

118119
MachineTypes getMachine() const;
120+
llvm::Triple::ArchType getArch() const;
119121
std::optional<chpe_range_type> getArm64ECRangeType() const;
120122

121123
protected:
@@ -437,6 +439,10 @@ inline MachineTypes Chunk::getMachine() const {
437439
return static_cast<const NonSectionChunk *>(this)->getMachine();
438440
}
439441

442+
inline llvm::Triple::ArchType Chunk::getArch() const {
443+
return llvm::getMachineArchType(getMachine());
444+
}
445+
440446
inline std::optional<chpe_range_type> Chunk::getArm64ECRangeType() const {
441447
// Data sections don't need codemap entries.
442448
if (!(getOutputCharacteristics() & llvm::COFF::IMAGE_SCN_MEM_EXECUTE))

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