[X86] getGFNICtrlMask - create a vXi8 mask instead of a bitcasted vXi64 mask.

Summary: Helps avoid some missed load-folds by stripping away bitcasts and make it easier to grok the GF2P8AFFINEQB masks.

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Differential Revision: https://phabricator.intern.facebook.com/D60250855

Author: RKSimon

llvm/lib/Target/X86/X86ISelLowering.cpp

@@ -29102,8 +29102,12 @@ SDValue getGFNICtrlMask(unsigned Opcode, SelectionDAG &DAG, const SDLoc &DL, MVT
   assert(VT.getVectorElementType() == MVT::i8 &&
          (VT.getSizeInBits() % 64) == 0 && "Illegal GFNI control type");
   uint64_t Imm = getGFNICtrlImm(Opcode, Amt);
-  MVT MaskVT = MVT::getVectorVT(MVT::i64, VT.getSizeInBits() / 64);
-  return DAG.getBitcast(VT, DAG.getConstant(Imm, DL, MaskVT));
+  SmallVector<SDValue> MaskBits;
+  for (unsigned I = 0, E = VT.getSizeInBits(); I != E; I += 8) {
+    uint64_t Bits = (Imm >> (I % 64)) & 255;
+    MaskBits.push_back(DAG.getConstant(Bits, DL, MVT::i8));
+  }
+  return DAG.getBuildVector(VT, DL, MaskBits);
 }
 
 // Return true if the required (according to Opcode) shift-imm form is natively

llvm/test/CodeGen/X86/bitreverse.ll

@@ -1340,7 +1340,7 @@ define i528 @large_promotion(i528 %A) nounwind {
 ; GFNI-NEXT:    pushq %r14
 ; GFNI-NEXT:    pushq %rbx
 ; GFNI-NEXT:    movq %rdi, %rax
-; GFNI-NEXT:    vpbroadcastq {{.*#+}} xmm0 = [9241421688590303745,9241421688590303745]
+; GFNI-NEXT:    vpbroadcastq {{.*#+}} xmm0 = [1,2,4,8,16,32,64,128,1,2,4,8,16,32,64,128]
 ; GFNI-NEXT:    vmovq {{.*#+}} xmm1 = mem[0],zero
 ; GFNI-NEXT:    vgf2p8affineqb $0, %xmm0, %xmm1, %xmm1
 ; GFNI-NEXT:    vmovq %xmm1, %r10