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| 1 | +; NOTE: Assertions have been autogenerated by utils/update_analyze_test_checks.py UTC_ARGS: --version 4 |
| 2 | +; RUN: opt -passes="print<cost-model>" 2>&1 -disable-output -mtriple=arm64-apple-macosx < %s | FileCheck %s |
| 3 | + |
| 4 | +define <3 x i32> @fptoui_v3f32_to_v3i32(<3 x float> %in, ptr %dst) { |
| 5 | +; CHECK-LABEL: 'fptoui_v3f32_to_v3i32' |
| 6 | +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %conv = fptoui <3 x float> %in to <3 x i32> |
| 7 | +; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <3 x i32> %conv |
| 8 | +; |
| 9 | + %conv = fptoui <3 x float> %in to <3 x i32> |
| 10 | + ret <3 x i32> %conv |
| 11 | +} |
| 12 | + |
| 13 | +define <3 x i16> @fptoui_v3f32_to_v3i16(<3 x float> %in, ptr %dst) { |
| 14 | +; CHECK-LABEL: 'fptoui_v3f32_to_v3i16' |
| 15 | +; CHECK-NEXT: Cost Model: Found an estimated cost of 15 for instruction: %conv = fptoui <3 x float> %in to <3 x i16> |
| 16 | +; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <3 x i16> %conv |
| 17 | +; |
| 18 | + %conv = fptoui <3 x float> %in to <3 x i16> |
| 19 | + ret <3 x i16> %conv |
| 20 | +} |
| 21 | + |
| 22 | +define <3 x i8> @fptoui_v3f32_to_v3i8(<3 x float> %in, ptr %dst) { |
| 23 | +; CHECK-LABEL: 'fptoui_v3f32_to_v3i8' |
| 24 | +; CHECK-NEXT: Cost Model: Found an estimated cost of 15 for instruction: %conv = fptoui <3 x float> %in to <3 x i8> |
| 25 | +; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <3 x i8> %conv |
| 26 | +; |
| 27 | + %conv = fptoui <3 x float> %in to <3 x i8> |
| 28 | + ret <3 x i8> %conv |
| 29 | +} |
| 30 | + |
| 31 | +define <3 x i32> @fptosi_v3f32_to_v3i32(<3 x float> %in, ptr %dst) { |
| 32 | +; CHECK-LABEL: 'fptosi_v3f32_to_v3i32' |
| 33 | +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %conv = fptosi <3 x float> %in to <3 x i32> |
| 34 | +; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <3 x i32> %conv |
| 35 | +; |
| 36 | + %conv = fptosi <3 x float> %in to <3 x i32> |
| 37 | + ret <3 x i32> %conv |
| 38 | +} |
| 39 | + |
| 40 | +define <3 x i16> @fptosi_v3f32_to_v3i16(<3 x float> %in, ptr %dst) { |
| 41 | +; CHECK-LABEL: 'fptosi_v3f32_to_v3i16' |
| 42 | +; CHECK-NEXT: Cost Model: Found an estimated cost of 15 for instruction: %conv = fptosi <3 x float> %in to <3 x i16> |
| 43 | +; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <3 x i16> %conv |
| 44 | +; |
| 45 | + %conv = fptosi <3 x float> %in to <3 x i16> |
| 46 | + ret <3 x i16> %conv |
| 47 | +} |
| 48 | + |
| 49 | +define <3 x i8> @fptosi_v3f32_to_v3i8(<3 x float> %in, ptr %dst) { |
| 50 | +; CHECK-LABEL: 'fptosi_v3f32_to_v3i8' |
| 51 | +; CHECK-NEXT: Cost Model: Found an estimated cost of 15 for instruction: %conv = fptosi <3 x float> %in to <3 x i8> |
| 52 | +; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <3 x i8> %conv |
| 53 | +; |
| 54 | + %conv = fptosi <3 x float> %in to <3 x i8> |
| 55 | + ret <3 x i8> %conv |
| 56 | +} |
| 57 | + |
| 58 | +define <3 x float> @uitofp_v3i32_to_v3f32(<3 x i32> %in, ptr %dst) { |
| 59 | +; CHECK-LABEL: 'uitofp_v3i32_to_v3f32' |
| 60 | +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %conv = uitofp <3 x i32> %in to <3 x float> |
| 61 | +; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <3 x float> %conv |
| 62 | +; |
| 63 | + %conv = uitofp <3 x i32> %in to <3 x float> |
| 64 | + ret <3 x float> %conv |
| 65 | +} |
| 66 | + |
| 67 | +define <3 x float> @uitofp_v3i16_to_v3f32(<3 x i16> %in, ptr %dst) { |
| 68 | +; CHECK-LABEL: 'uitofp_v3i16_to_v3f32' |
| 69 | +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %conv = uitofp <3 x i16> %in to <3 x float> |
| 70 | +; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <3 x float> %conv |
| 71 | +; |
| 72 | + %conv = uitofp <3 x i16> %in to <3 x float> |
| 73 | + ret <3 x float> %conv |
| 74 | +} |
| 75 | + |
| 76 | +define <3 x float> @uitofp_v3i8_to_v3f32(<3 x i8> %in, ptr %dst) { |
| 77 | +; CHECK-LABEL: 'uitofp_v3i8_to_v3f32' |
| 78 | +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %conv = uitofp <3 x i8> %in to <3 x float> |
| 79 | +; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <3 x float> %conv |
| 80 | +; |
| 81 | + %conv = uitofp <3 x i8> %in to <3 x float> |
| 82 | + ret <3 x float> %conv |
| 83 | +} |
| 84 | + |
| 85 | +define <3 x float> @sitofp_v3i32_to_v3f32(<3 x i32> %in, ptr %dst) { |
| 86 | +; CHECK-LABEL: 'sitofp_v3i32_to_v3f32' |
| 87 | +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %conv = sitofp <3 x i32> %in to <3 x float> |
| 88 | +; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <3 x float> %conv |
| 89 | +; |
| 90 | + %conv = sitofp <3 x i32> %in to <3 x float> |
| 91 | + ret <3 x float> %conv |
| 92 | +} |
| 93 | + |
| 94 | +define <3 x float> @sitofp_v3i16_to_v3f32(<3 x i16> %in, ptr %dst) { |
| 95 | +; CHECK-LABEL: 'sitofp_v3i16_to_v3f32' |
| 96 | +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %conv = sitofp <3 x i16> %in to <3 x float> |
| 97 | +; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <3 x float> %conv |
| 98 | +; |
| 99 | + %conv = sitofp <3 x i16> %in to <3 x float> |
| 100 | + ret <3 x float> %conv |
| 101 | +} |
| 102 | + |
| 103 | +define <3 x float> @sitofp_v3i8_to_v3f32(<3 x i8> %in, ptr %dst) { |
| 104 | +; CHECK-LABEL: 'sitofp_v3i8_to_v3f32' |
| 105 | +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %conv = sitofp <3 x i8> %in to <3 x float> |
| 106 | +; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <3 x float> %conv |
| 107 | +; |
| 108 | + %conv = sitofp <3 x i8> %in to <3 x float> |
| 109 | + ret <3 x float> %conv |
| 110 | +} |
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