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Add an assert and common up code from load/stores
1 parent bc60aa8 commit 3563b6a

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2 files changed

+17
-32
lines changed

2 files changed

+17
-32
lines changed

llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp

Lines changed: 15 additions & 30 deletions
Original file line numberDiff line numberDiff line change
@@ -1526,37 +1526,11 @@ void PPCAsmPrinter::emitInstruction(const MachineInstr *MI) {
15261526
const DataLayout &DL = MO.getGlobal()->getParent()->getDataLayout();
15271527
if (MO.getGlobal()->getPointerAlignment(DL) < 4)
15281528
llvm_unreachable("Global must be word-aligned for LD, STD, LWA!");
1529-
1530-
// A faster non-TOC-based local-exec sequence is represented by
1531-
// directly loading or storing off of the thread pointer and with
1532-
// an immediate operand having the MO_TPREL_FLAG.
1533-
// Such instructions do not otherwise arise.
1534-
unsigned Flag = MO.getTargetFlags();
1535-
if (Flag == PPCII::MO_TPREL_FLAG) {
1536-
assert(HasAIXSmallLocalExecTLS &&
1537-
"loads/stores with thread-pointer only expected with "
1538-
"local-exec small TLS");
1539-
int64_t Offset = MO.getOffset();
1540-
LowerPPCMachineInstrToMCInst(MI, TmpInst, *this);
1541-
const MCExpr *Expr = getAdjustedLocalExecExpr(MO, Offset);
1542-
if (Expr)
1543-
TmpInst.getOperand(OpNum) = MCOperand::createExpr(Expr);
1544-
EmitToStreamer(*OutStreamer, TmpInst);
1545-
return;
1546-
}
15471529
}
1548-
// Now process the instruction normally.
1549-
break;
1550-
}
1551-
case PPC::PseudoEIEIO: {
1552-
EmitToStreamer(
1553-
*OutStreamer,
1554-
MCInstBuilder(PPC::ORI).addReg(PPC::X2).addReg(PPC::X2).addImm(0));
1555-
EmitToStreamer(
1556-
*OutStreamer,
1557-
MCInstBuilder(PPC::ORI).addReg(PPC::X2).addReg(PPC::X2).addImm(0));
1558-
EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::EnforceIEIO));
1559-
return;
1530+
// As these load/stores share common code with the following load/stores,
1531+
// fall through to the subsequent cases in order to either process the
1532+
// non-TOC-based local-exec sequence or to process the instruction normally.
1533+
[[fallthrough]];
15601534
}
15611535
case PPC::LBZ:
15621536
case PPC::LBZ8:
@@ -1605,8 +1579,19 @@ void PPCAsmPrinter::emitInstruction(const MachineInstr *MI) {
16051579
EmitToStreamer(*OutStreamer, TmpInst);
16061580
return;
16071581
}
1582+
// Now process the instruction normally.
16081583
break;
16091584
}
1585+
case PPC::PseudoEIEIO: {
1586+
EmitToStreamer(
1587+
*OutStreamer,
1588+
MCInstBuilder(PPC::ORI).addReg(PPC::X2).addReg(PPC::X2).addImm(0));
1589+
EmitToStreamer(
1590+
*OutStreamer,
1591+
MCInstBuilder(PPC::ORI).addReg(PPC::X2).addReg(PPC::X2).addImm(0));
1592+
EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::EnforceIEIO));
1593+
return;
1594+
}
16101595
}
16111596

16121597
LowerPPCMachineInstrToMCInst(MI, TmpInst, *this);

llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -7833,8 +7833,8 @@ void PPCDAGToDAGISel::PeepholePPC64() {
78337833
// Add the non-zero offset information into the load or store
78347834
// instruction to be used for non-TOC-based local-exec accesses.
78357835
GlobalAddressSDNode *GA = dyn_cast<GlobalAddressSDNode>(ImmOpnd);
7836-
if (!GA)
7837-
continue;
7836+
assert(GA && "Expecting a valid GlobalAddressSDNode when folding "
7837+
"addi into local-exec accesses!");
78387838
ImmOpnd = CurDAG->getTargetGlobalAddress(GA->getGlobal(), SDLoc(GA),
78397839
MVT::i64, Offset,
78407840
GA->getTargetFlags());

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