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[X86][FP16] Bitcast v8f16/v16f16 to vXi8 to use vXi8 vselect (#143484)
Fixes: https://godbolt.org/z/fbPYzjxTs
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llvm/lib/Target/X86/X86ISelLowering.cpp

Lines changed: 3 additions & 1 deletion
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@@ -18555,7 +18555,9 @@ SDValue X86TargetLowering::LowerVSELECT(SDValue Op, SelectionDAG &DAG) const {
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return SDValue();
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case MVT::v8i16:
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case MVT::v16i16: {
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case MVT::v16i16:
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case MVT::v8f16:
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case MVT::v16f16: {
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// Bitcast everything to the vXi8 type and use a vXi8 vselect.
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MVT CastVT = MVT::getVectorVT(MVT::i8, NumElts * 2);
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Cond = DAG.getBitcast(CastVT, Cond);

llvm/test/CodeGen/X86/avx512fp16-novl.ll

Lines changed: 15 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -207,3 +207,18 @@ entry:
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%s = select <8 x i1> %c, <8 x half> splat (half 0xH3C00), <8 x half> %x
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ret <8 x half> %s
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}
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define <4 x half> @select2(<4 x i32> %0, <4 x half> %1) {
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; CHECK-LABEL: select2:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: vpxor %xmm2, %xmm2, %xmm2
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; CHECK-NEXT: vpcmpeqd %xmm2, %xmm0, %xmm0
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; CHECK-NEXT: vpackssdw %xmm0, %xmm0, %xmm0
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; CHECK-NEXT: vmovq {{.*#+}} xmm2 = [9.6E+1,9.7E+1,9.8E+1,9.9E+1,0.0E+0,0.0E+0,0.0E+0,0.0E+0]
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; CHECK-NEXT: vpblendvb %xmm0, %xmm1, %xmm2, %xmm0
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; CHECK-NEXT: retq
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entry:
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%2 = icmp eq <4 x i32> %0, zeroinitializer
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%3 = select <4 x i1> %2, <4 x half> %1, <4 x half> <half 0xH5600, half 0xH5610, half 0xH5620, half 0xH5630>
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ret <4 x half> %3
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}

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